diff options
Diffstat (limited to 'llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll')
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll | 1486 |
1 files changed, 1486 insertions, 0 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll b/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll new file mode 100644 index 0000000..5fc9f4a --- /dev/null +++ b/llvm/test/CodeGen/AMDGPU/atomics-system-scope.ll @@ -0,0 +1,1486 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN:llc -mtriple=amdgcn -mcpu=gfx1250 < %s | FileCheck --check-prefix=GFX1250 %s + +define float @global_system_atomic_fadd_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_system_atomic_fadd_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_add_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr addrspace(1) %ptr, float %val monotonic + ret float %result +} + +define float @global_one_as_atomic_fadd_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_one_as_atomic_fadd_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_add_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr addrspace(1) %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @global_system_atomic_fadd_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_system_atomic_fadd_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_add_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr addrspace(1) %ptr, double %val monotonic + ret double %result +} + +define double @global_one_as_atomic_fadd_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_one_as_atomic_fadd_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_add_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr addrspace(1) %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define float @global_system_atomic_fmin_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_system_atomic_fmin_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_num_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr addrspace(1) %ptr, float %val monotonic + ret float %result +} + +define float @global_one_as_atomic_fmin_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_one_as_atomic_fmin_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_num_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr addrspace(1) %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @global_system_atomic_fmin_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_system_atomic_fmin_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_num_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr addrspace(1) %ptr, double %val monotonic + ret double %result +} + +define double @global_one_as_atomic_fmin_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_one_as_atomic_fmin_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_num_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr addrspace(1) %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define float @global_system_atomic_fmax_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_system_atomic_fmax_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_num_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr addrspace(1) %ptr, float %val monotonic + ret float %result +} + +define float @global_one_as_atomic_fmax_f32(ptr addrspace(1) %ptr, float %val) { +; GFX1250-LABEL: global_one_as_atomic_fmax_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_num_f32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr addrspace(1) %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @global_system_atomic_fmax_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_system_atomic_fmax_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_num_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr addrspace(1) %ptr, double %val monotonic + ret double %result +} + +define double @global_one_as_atomic_fmax_f64(ptr addrspace(1) %ptr, double %val) { +; GFX1250-LABEL: global_one_as_atomic_fmax_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_num_f64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr addrspace(1) %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define i32 @global_one_as_atomic_min_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_one_as_atomic_min_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_i32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr addrspace(1) %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @global_system_atomic_min_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_system_atomic_min_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_i32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr addrspace(1) %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @global_one_as_atomic_max_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_one_as_atomic_max_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_i32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr addrspace(1) %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @global_system_atomic_max_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_system_atomic_max_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_i32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr addrspace(1) %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @global_one_as_atomic_umin_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_one_as_atomic_umin_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr addrspace(1) %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @global_system_atomic_umin_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_system_atomic_umin_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr addrspace(1) %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @global_one_as_atomic_umax_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_one_as_atomic_umax_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr addrspace(1) %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @global_system_atomic_umax_i32(ptr addrspace(1) %ptr, i32 %val) { +; GFX1250-LABEL: global_system_atomic_umax_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_u32 v0, v[0:1], v2, off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr addrspace(1) %ptr, i32 %val monotonic + ret i32 %result +} + +define i64 @global_one_as_atomic_min_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_one_as_atomic_min_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_i64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr addrspace(1) %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @global_system_atomic_min_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_system_atomic_min_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_i64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr addrspace(1) %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @global_one_as_atomic_max_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_one_as_atomic_max_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_i64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr addrspace(1) %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @global_system_atomic_max_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_system_atomic_max_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_i64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr addrspace(1) %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @global_one_as_atomic_umin_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_one_as_atomic_umin_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_u64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr addrspace(1) %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @global_system_atomic_umin_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_system_atomic_umin_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_min_u64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr addrspace(1) %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @global_one_as_atomic_umax_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_one_as_atomic_umax_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_u64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr addrspace(1) %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @global_system_atomic_umax_i64(ptr addrspace(1) %ptr, i64 %val) { +; GFX1250-LABEL: global_system_atomic_umax_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: global_atomic_max_u64 v[0:1], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr addrspace(1) %ptr, i64 %val monotonic + ret i64 %result +} + +define i16 @global_one_as_atomic_min_i16(ptr addrspace(1) %ptr, i16 %val) { +; GFX1250-LABEL: global_one_as_atomic_min_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: global_load_b32 v5, v[0:1], off +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB28_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_min_i16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[6:7], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB28_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr addrspace(1) %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @global_one_as_atomic_umin_i16(ptr addrspace(1) %ptr, i16 %val) { +; GFX1250-LABEL: global_one_as_atomic_umin_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: global_load_b32 v5, v[0:1], off +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB29_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_min_u16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[6:7], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB29_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr addrspace(1) %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @global_one_as_atomic_max_i16(ptr addrspace(1) %ptr, i16 %val) { +; GFX1250-LABEL: global_one_as_atomic_max_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: global_load_b32 v5, v[0:1], off +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB30_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_max_i16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[6:7], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB30_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr addrspace(1) %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @global_one_as_atomic_umax_i16(ptr addrspace(1) %ptr, i16 %val) { +; GFX1250-LABEL: global_one_as_atomic_umax_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: global_load_b32 v5, v[0:1], off +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB31_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_max_u16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: global_atomic_cmpswap_b32 v5, v[0:1], v[6:7], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB31_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr addrspace(1) %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define float @flat_system_atomic_fadd_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_system_atomic_fadd_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_add_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr %ptr, float %val monotonic + ret float %result +} + +define float @flat_one_as_atomic_fadd_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_one_as_atomic_fadd_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_add_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @flat_system_atomic_fadd_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_system_atomic_fadd_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b64 s[0:1], src_shared_base +; GFX1250-NEXT: s_mov_b32 s0, exec_lo +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: v_cmpx_ne_u32_e64 s1, v1 +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB34_6 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.check.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s1, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s1, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s1, exec_lo, s1 +; GFX1250-NEXT: s_cbranch_execz .LBB34_3 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.global +; GFX1250-NEXT: global_atomic_add_f64 v[4:5], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB34_3: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s1, s1 +; GFX1250-NEXT: s_cbranch_execz .LBB34_5 +; GFX1250-NEXT: ; %bb.4: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s2, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s2, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_add_f64_e32 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB34_5: ; %Flow1 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s1 +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB34_6: ; %Flow2 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB34_8 +; GFX1250-NEXT: ; %bb.7: ; %atomicrmw.shared +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc_lo +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: ds_add_rtn_f64 v[4:5], v0, v[2:3] +; GFX1250-NEXT: .LBB34_8: ; %atomicrmw.phi +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr %ptr, double %val monotonic + ret double %result +} + +define double @flat_one_as_atomic_fadd_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_one_as_atomic_fadd_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b64 s[0:1], src_shared_base +; GFX1250-NEXT: s_mov_b32 s0, exec_lo +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: v_cmpx_ne_u32_e64 s1, v1 +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB35_6 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.check.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s1, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s1, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s1, exec_lo, s1 +; GFX1250-NEXT: s_cbranch_execz .LBB35_3 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.global +; GFX1250-NEXT: global_atomic_add_f64 v[4:5], v[0:1], v[2:3], off th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB35_3: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s1, s1 +; GFX1250-NEXT: s_cbranch_execz .LBB35_5 +; GFX1250-NEXT: ; %bb.4: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s2, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s2, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_add_f64_e32 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB35_5: ; %Flow1 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s1 +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB35_6: ; %Flow2 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB35_8 +; GFX1250-NEXT: ; %bb.7: ; %atomicrmw.shared +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: v_cndmask_b32_e32 v0, -1, v0, vcc_lo +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: ds_add_rtn_f64 v[4:5], v0, v[2:3] +; GFX1250-NEXT: .LBB35_8: ; %atomicrmw.phi +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fadd ptr %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define float @flat_system_atomic_fmin_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_system_atomic_fmin_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_num_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr %ptr, float %val monotonic + ret float %result +} + +define float @flat_one_as_atomic_fmin_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_one_as_atomic_fmin_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_num_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @flat_system_atomic_fmin_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_system_atomic_fmin_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB38_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB38_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB38_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5] +; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB38_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr %ptr, double %val monotonic + ret double %result +} + +define double @flat_one_as_atomic_fmin_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_one_as_atomic_fmin_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB39_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB39_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB39_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5] +; GFX1250-NEXT: v_min_num_f64_e32 v[0:1], v[0:1], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB39_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmin ptr %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define float @flat_system_atomic_fmax_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_system_atomic_fmax_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_num_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr %ptr, float %val monotonic + ret float %result +} + +define float @flat_one_as_atomic_fmax_f32(ptr %ptr, float %val) { +; GFX1250-LABEL: flat_one_as_atomic_fmax_f32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_num_f32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr %ptr, float %val syncscope("one-as") monotonic + ret float %result +} + +define double @flat_system_atomic_fmax_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_system_atomic_fmax_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB42_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB42_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB42_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5] +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB42_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr %ptr, double %val monotonic + ret double %result +} + +define double @flat_one_as_atomic_fmax_f64(ptr %ptr, double %val) { +; GFX1250-LABEL: flat_one_as_atomic_fmax_f64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB43_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_num_f64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB43_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB43_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_3) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_dual_max_num_f64 v[2:3], v[2:3], v[2:3] :: v_dual_cndmask_b32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[4:5], v[4:5] +; GFX1250-NEXT: v_max_num_f64_e32 v[0:1], v[0:1], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB43_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw fmax ptr %ptr, double %val syncscope("one-as") monotonic + ret double %result +} + +define i32 @flat_one_as_atomic_min_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_one_as_atomic_min_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_i32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @flat_system_atomic_min_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_system_atomic_min_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_i32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @flat_one_as_atomic_max_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_one_as_atomic_max_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_i32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @flat_system_atomic_max_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_system_atomic_max_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_i32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @flat_one_as_atomic_umin_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umin_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_u32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @flat_system_atomic_umin_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_system_atomic_umin_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_min_u32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr %ptr, i32 %val monotonic + ret i32 %result +} + +define i32 @flat_one_as_atomic_umax_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umax_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_u32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr %ptr, i32 %val syncscope("one-as") monotonic + ret i32 %result +} + +define i32 @flat_system_atomic_umax_i32(ptr %ptr, i32 %val) { +; GFX1250-LABEL: flat_system_atomic_umax_i32: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: flat_atomic_max_u32 v0, v[0:1], v2 th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr %ptr, i32 %val monotonic + ret i32 %result +} + +define i64 @flat_one_as_atomic_min_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_one_as_atomic_min_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB52_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_i64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB52_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB52_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_min_i64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB52_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @flat_system_atomic_min_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_system_atomic_min_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB53_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_i64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB53_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB53_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_min_i64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB53_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @flat_one_as_atomic_max_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_one_as_atomic_max_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB54_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_i64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB54_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB54_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_i64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB54_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @flat_system_atomic_max_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_system_atomic_max_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB55_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_i64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB55_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB55_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_i64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB55_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @flat_one_as_atomic_umin_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umin_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB56_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_u64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB56_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB56_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_min_u64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB56_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @flat_system_atomic_umin_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_system_atomic_umin_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB57_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_min_u64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB57_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB57_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_min_u64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB57_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr %ptr, i64 %val monotonic + ret i64 %result +} + +define i64 @flat_one_as_atomic_umax_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umax_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB58_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_u64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB58_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB58_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_u64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB58_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr %ptr, i64 %val syncscope("one-as") monotonic + ret i64 %result +} + +define i64 @flat_system_atomic_umax_i64(ptr %ptr, i64 %val) { +; GFX1250-LABEL: flat_system_atomic_umax_i64: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: s_mov_b32 s0, src_flat_scratch_base_hi +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_xor_b32_e32 v4, s0, v1 +; GFX1250-NEXT: v_cmp_lt_u32_e32 vcc_lo, 0x3ffffff, v4 +; GFX1250-NEXT: ; implicit-def: $vgpr4_vgpr5 +; GFX1250-NEXT: s_and_saveexec_b32 s0, vcc_lo +; GFX1250-NEXT: s_delay_alu instid0(SALU_CYCLE_1) +; GFX1250-NEXT: s_xor_b32 s0, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB59_2 +; GFX1250-NEXT: ; %bb.1: ; %atomicrmw.global +; GFX1250-NEXT: flat_atomic_max_u64 v[4:5], v[0:1], v[2:3] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: ; implicit-def: $vgpr0_vgpr1 +; GFX1250-NEXT: ; implicit-def: $vgpr2_vgpr3 +; GFX1250-NEXT: .LBB59_2: ; %Flow +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_saveexec_b32 s0, s0 +; GFX1250-NEXT: s_cbranch_execz .LBB59_4 +; GFX1250-NEXT: ; %bb.3: ; %atomicrmw.private +; GFX1250-NEXT: s_mov_b32 s1, src_flat_scratch_base_lo +; GFX1250-NEXT: v_cmp_ne_u64_e32 vcc_lo, 0, v[0:1] +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_subrev_nc_u32_e32 v4, s1, v0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_cndmask_b32_e32 v6, -1, v4, vcc_lo +; GFX1250-NEXT: scratch_load_b64 v[4:5], v6, off +; GFX1250-NEXT: s_wait_loadcnt 0x0 +; GFX1250-NEXT: v_max_u64 v[0:1], v[4:5], v[2:3] +; GFX1250-NEXT: scratch_store_b64 v6, v[0:1], off scope:SCOPE_SE +; GFX1250-NEXT: .LBB59_4: ; %atomicrmw.phi +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr %ptr, i64 %val monotonic + ret i64 %result +} + +define i16 @flat_one_as_atomic_min_i16(ptr %ptr, i16 %val) { +; GFX1250-LABEL: flat_one_as_atomic_min_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: flat_load_b32 v5, v[0:1] +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB60_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_min_i16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[6:7] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB60_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw min ptr %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @flat_one_as_atomic_umin_i16(ptr %ptr, i16 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umin_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: flat_load_b32 v5, v[0:1] +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB61_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_min_u16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[6:7] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB61_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umin ptr %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @flat_one_as_atomic_max_i16(ptr %ptr, i16 %val) { +; GFX1250-LABEL: flat_one_as_atomic_max_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: flat_load_b32 v5, v[0:1] +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB62_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_max_i16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[6:7] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB62_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw max ptr %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} + +define i16 @flat_one_as_atomic_umax_i16(ptr %ptr, i16 %val) { +; GFX1250-LABEL: flat_one_as_atomic_umax_i16: +; GFX1250: ; %bb.0: +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: s_wait_kmcnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v3, v0 +; GFX1250-NEXT: s_mov_b32 s0, 0 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(SKIP_1) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v0, -4, v3 +; GFX1250-NEXT: v_and_b32_e32 v3, 3, v3 +; GFX1250-NEXT: v_lshlrev_b32_e32 v3, 3, v3 +; GFX1250-NEXT: flat_load_b32 v5, v[0:1] +; GFX1250-NEXT: v_lshlrev_b32_e64 v4, v3, 0xffff +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_not_b32_e32 v4, v4 +; GFX1250-NEXT: .LBB63_1: ; %atomicrmw.start +; GFX1250-NEXT: ; =>This Inner Loop Header: Depth=1 +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_mov_b32_e32 v7, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_lshrrev_b32_e32 v5, v3, v7 +; GFX1250-NEXT: v_max_u16 v5, v5, v2 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) | instskip(NEXT) | instid1(VALU_DEP_1) +; GFX1250-NEXT: v_and_b32_e32 v5, 0xffff, v5 +; GFX1250-NEXT: v_lshlrev_b32_e32 v5, v3, v5 +; GFX1250-NEXT: s_delay_alu instid0(VALU_DEP_1) +; GFX1250-NEXT: v_and_or_b32 v6, v7, v4, v5 +; GFX1250-NEXT: flat_atomic_cmpswap_b32 v5, v[0:1], v[6:7] th:TH_ATOMIC_RETURN scope:SCOPE_SYS +; GFX1250-NEXT: s_wait_loadcnt_dscnt 0x0 +; GFX1250-NEXT: v_cmp_eq_u32_e32 vcc_lo, v5, v7 +; GFX1250-NEXT: s_or_b32 s0, vcc_lo, s0 +; GFX1250-NEXT: s_wait_xcnt 0x0 +; GFX1250-NEXT: s_and_not1_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: s_cbranch_execnz .LBB63_1 +; GFX1250-NEXT: ; %bb.2: ; %atomicrmw.end +; GFX1250-NEXT: s_or_b32 exec_lo, exec_lo, s0 +; GFX1250-NEXT: v_lshrrev_b32_e32 v0, v3, v5 +; GFX1250-NEXT: s_set_pc_i64 s[30:31] + %result = atomicrmw umax ptr %ptr, i16 %val syncscope("one-as") monotonic + ret i16 %result +} |