diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIDefines.h')
-rw-r--r-- | llvm/lib/Target/AMDGPU/SIDefines.h | 26 |
1 files changed, 21 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIDefines.h b/llvm/lib/Target/AMDGPU/SIDefines.h index a864997..40b8bcd 100644 --- a/llvm/lib/Target/AMDGPU/SIDefines.h +++ b/llvm/lib/Target/AMDGPU/SIDefines.h @@ -392,14 +392,20 @@ enum CPol { TH_ATOMIC_CASCADE = 4, // Cascading vs regular // Scope - SCOPE = 0x3 << 3, // All Scope bits - SCOPE_CU = 0 << 3, - SCOPE_SE = 1 << 3, - SCOPE_DEV = 2 << 3, - SCOPE_SYS = 3 << 3, + SCOPE_SHIFT = 3, + SCOPE_MASK = 0x3, + SCOPE = SCOPE_MASK << SCOPE_SHIFT, // All Scope bits + SCOPE_CU = 0 << SCOPE_SHIFT, + SCOPE_SE = 1 << SCOPE_SHIFT, + SCOPE_DEV = 2 << SCOPE_SHIFT, + SCOPE_SYS = 3 << SCOPE_SHIFT, + + NV = 1 << 5, // Non-volatile bit SWZ = 1 << 6, // Swizzle bit + SCAL = 1 << 11, // Scale offset bit + ALL = TH | SCOPE, // Helper bits @@ -1003,6 +1009,16 @@ enum Target : unsigned { } // namespace Exp +namespace WMMA { +enum MatrixFMT : unsigned { + MATRIX_FMT_FP8 = 0, + MATRIX_FMT_BF8 = 1, + MATRIX_FMT_FP6 = 2, + MATRIX_FMT_BF6 = 3, + MATRIX_FMT_FP4 = 4 +}; +} // namespace WMMA + namespace VOP3PEncoding { enum OpSel : uint64_t { |