diff options
| -rw-r--r-- | llvm/lib/CodeGen/CodeGenPrepare.cpp | 2 | ||||
| -rw-r--r-- | llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll | 28 | ||||
| -rw-r--r-- | llvm/test/Transforms/CodeGenPrepare/RISCV/lit.local.cfg | 2 |
3 files changed, 31 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/CodeGenPrepare.cpp b/llvm/lib/CodeGen/CodeGenPrepare.cpp index 85def4f..9fdee8f 100644 --- a/llvm/lib/CodeGen/CodeGenPrepare.cpp +++ b/llvm/lib/CodeGen/CodeGenPrepare.cpp @@ -2036,7 +2036,7 @@ static bool despeculateCountZeros(IntrinsicInst *CountZeros, // Only handle legal scalar cases. Anything else requires too much work. Type *Ty = CountZeros->getType(); - unsigned SizeInBits = Ty->getPrimitiveSizeInBits(); + unsigned SizeInBits = Ty->getScalarSizeInBits(); if (Ty->isVectorTy() || SizeInBits > DL->getLargestLegalIntTypeSizeInBits()) return false; diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll b/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll new file mode 100644 index 0000000..c70112e --- /dev/null +++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/cttz-ctlz.ll @@ -0,0 +1,28 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py +; RUN: opt -S -codegenprepare < %s | FileCheck %s + +target triple = "riscv64-unknown-unknown" + +; Check that despeculating count-zeros intrinsics doesn't crash when those +; intrinsics use scalable types. + +define <vscale x 4 x i64> @cttz_nxv4i64(<vscale x 4 x i64> %x) { +; CHECK-LABEL: @cttz_nxv4i64( +; CHECK-NEXT: [[Z:%.*]] = call <vscale x 4 x i64> @llvm.cttz.nxv4i64(<vscale x 4 x i64> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <vscale x 4 x i64> [[Z]] +; + %z = call <vscale x 4 x i64> @llvm.cttz.nxv4i64(<vscale x 4 x i64> %x, i1 false) + ret <vscale x 4 x i64> %z +} + +define <vscale x 4 x i64> @ctlz_nxv4i64(<vscale x 4 x i64> %x) { +; CHECK-LABEL: @ctlz_nxv4i64( +; CHECK-NEXT: [[Z:%.*]] = call <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64> [[X:%.*]], i1 false) +; CHECK-NEXT: ret <vscale x 4 x i64> [[Z]] +; + %z = call <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64> %x, i1 false) + ret <vscale x 4 x i64> %z +} + +declare <vscale x 4 x i64> @llvm.cttz.nxv4i64(<vscale x 4 x i64>, i1) +declare <vscale x 4 x i64> @llvm.ctlz.nxv4i64(<vscale x 4 x i64>, i1) diff --git a/llvm/test/Transforms/CodeGenPrepare/RISCV/lit.local.cfg b/llvm/test/Transforms/CodeGenPrepare/RISCV/lit.local.cfg new file mode 100644 index 0000000..c638201 --- /dev/null +++ b/llvm/test/Transforms/CodeGenPrepare/RISCV/lit.local.cfg @@ -0,0 +1,2 @@ +if not 'RISCV' in config.root.targets: + config.unsupported = True |