diff options
| -rw-r--r-- | llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp | 8 | ||||
| -rw-r--r-- | llvm/test/MC/RISCV/align.s | 7 |
2 files changed, 13 insertions, 2 deletions
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp index 821ac20..ee5f760 100644 --- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp +++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp @@ -313,8 +313,12 @@ bool RISCVAsmBackend::shouldInsertExtraNopBytesForCodeAlign( bool HasStdExtC = STI.getFeatureBits()[RISCV::FeatureStdExtC]; unsigned MinNopLen = HasStdExtC ? 2 : 4; - Size = AF.getAlignment() - MinNopLen; - return true; + if (AF.getAlignment() <= MinNopLen) { + return false; + } else { + Size = AF.getAlignment() - MinNopLen; + return true; + } } // We need to insert R_RISCV_ALIGN relocation type to indicate the diff --git a/llvm/test/MC/RISCV/align.s b/llvm/test/MC/RISCV/align.s index e62af93..b4b3e6a 100644 --- a/llvm/test/MC/RISCV/align.s +++ b/llvm/test/MC/RISCV/align.s @@ -90,6 +90,13 @@ test: ret # NORELAX-RELOC-NOT: R_RISCV # C-EXT-NORELAX-RELOC-NOT: R_RISCV +# Code alignment of a byte size less than the size of a nop must be treated +# as no alignment. This used to trigger a fatal error with relaxation enabled +# as the calculation to emit the worst-case sequence of nops would overflow. + .p2align 1 + add a0, a0, a1 + .p2align 0 + add a0, a0, a1 # We only need to insert R_RISCV_ALIGN for code section # when the linker relaxation enabled. .data |