diff options
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index cf6617f..65dc107 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -53021,12 +53021,12 @@ static SDValue combinePMULH(SDValue Src, EVT VT, const SDLoc &DL, return SDValue(); // Check if both inputs are extensions, which will be removed by truncation. - bool IsTruncateFree = (LHS.getOpcode() == ISD::SIGN_EXTEND || - LHS.getOpcode() == ISD::ZERO_EXTEND) && - (RHS.getOpcode() == ISD::SIGN_EXTEND || - RHS.getOpcode() == ISD::ZERO_EXTEND) && - LHS.getOperand(0).getScalarValueSizeInBits() <= 16 && - RHS.getOperand(0).getScalarValueSizeInBits() <= 16; + auto isOpTruncateFree = [](SDValue Op) { + return (Op.getOpcode() == ISD::SIGN_EXTEND || + Op.getOpcode() == ISD::ZERO_EXTEND) && + Op.getOperand(0).getScalarValueSizeInBits() <= 16; + }; + bool IsTruncateFree = isOpTruncateFree(LHS) && isOpTruncateFree(RHS); // For AVX2+ targets, with the upper bits known zero, we can perform MULHU on // the (bitcasted) inputs directly, and then cheaply pack/truncate the result |