diff options
| -rw-r--r-- | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 14 | ||||
| -rw-r--r-- | llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll | 3 |
2 files changed, 9 insertions, 8 deletions
diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index 14d2bcf..66608d0 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -14616,15 +14616,15 @@ public: Instruction *RedOp1, Instruction *RedOp2, bool InitStep) { - if (!isBoolLogicOp(RedOp1)) + if (!AnyBoolLogicOp) return; - if ((!InitStep && LHS == VectorizedTree) || - getRdxOperand(RedOp1, 0) == LHS || isGuaranteedNotToBePoison(LHS)) + if (isBoolLogicOp(RedOp1) && + ((!InitStep && LHS == VectorizedTree) || + getRdxOperand(RedOp1, 0) == LHS || isGuaranteedNotToBePoison(LHS))) return; - if (!isBoolLogicOp(RedOp2)) - return; - if ((!InitStep && RHS == VectorizedTree) || - getRdxOperand(RedOp2, 0) == RHS || isGuaranteedNotToBePoison(RHS)) { + if (isBoolLogicOp(RedOp2) && ((!InitStep && RHS == VectorizedTree) || + getRdxOperand(RedOp2, 0) == RHS || + isGuaranteedNotToBePoison(RHS))) { std::swap(LHS, RHS); return; } diff --git a/llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll b/llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll index e0a90e2..408ea62 100644 --- a/llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll +++ b/llvm/test/Transforms/SLPVectorizer/X86/bool-logical-op-reduction-with-poison.ll @@ -15,7 +15,8 @@ define i1 @test(i32 %0, i32 %1, i32 %p) { ; CHECK-NEXT: [[TMP7:%.*]] = call i1 @llvm.vector.reduce.or.v4i1(<4 x i1> [[TMP6]]) ; CHECK-NEXT: [[OP_RDX:%.*]] = select i1 [[TMP7]], i1 true, i1 [[CMP6]] ; CHECK-NEXT: [[OP_RDX1:%.*]] = select i1 [[CMP1]], i1 true, i1 [[CMP1]] -; CHECK-NEXT: [[OP_RDX2:%.*]] = select i1 [[OP_RDX]], i1 true, i1 [[OP_RDX1]] +; CHECK-NEXT: [[TMP8:%.*]] = freeze i1 [[OP_RDX]] +; CHECK-NEXT: [[OP_RDX2:%.*]] = select i1 [[TMP8]], i1 true, i1 [[OP_RDX1]] ; CHECK-NEXT: ret i1 [[OP_RDX2]] ; entry: |