diff options
| -rw-r--r-- | llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll | 94 |
1 files changed, 66 insertions, 28 deletions
diff --git a/llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll b/llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll index 185a192..f4c2b2f 100644 --- a/llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll +++ b/llvm/test/CodeGen/AMDGPU/local-memory.amdgcn.ll @@ -1,17 +1,29 @@ -; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=GCN %s -; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck -check-prefix=CI -check-prefix=GCN %s +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,SI +; RUN: llc -march=amdgcn -mcpu=bonaire -verify-machineinstrs < %s | FileCheck %s -check-prefixes=GCN,CI @local_memory.local_mem = internal unnamed_addr addrspace(3) global [128 x i32] undef, align 4 -; GCN-LABEL: {{^}}local_memory: - -; GCN-NOT: s_wqm_b64 -; GCN: ds_write_b32 - -; GCN: s_barrier - -; GCN: ds_read_b32 {{v[0-9]+}}, define amdgpu_kernel void @local_memory(i32 addrspace(1)* %out) #0 { +; GCN-LABEL: local_memory: +; GCN: ; %bb.0: ; %entry +; GCN-NEXT: v_lshlrev_b32_e32 v1, 2, v0 +; GCN-NEXT: s_mov_b32 m0, -1 +; GCN-NEXT: ds_write_b32 v1, v0 +; GCN-NEXT: v_add_i32_e32 v0, vcc, 1, v0 +; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 16, v0 +; GCN-NEXT: v_cndmask_b32_e32 v0, 0, v0, vcc +; GCN-NEXT: v_lshlrev_b32_e32 v0, 2, v0 +; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9 +; GCN-NEXT: s_waitcnt lgkmcnt(0) +; GCN-NEXT: s_barrier +; GCN-NEXT: ds_read_b32 v0, v0 +; GCN-NEXT: s_mov_b32 s2, 0 +; GCN-NEXT: s_mov_b32 s3, 0xf000 +; GCN-NEXT: v_mov_b32_e32 v2, 0 +; GCN-NEXT: s_waitcnt lgkmcnt(0) +; GCN-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64 +; GCN-NEXT: s_endpgm entry: %y.i = call i32 @llvm.amdgcn.workitem.id.x() #1 %arrayidx = getelementptr inbounds [128 x i32], [128 x i32] addrspace(3)* @local_memory.local_mem, i32 0, i32 %y.i @@ -31,25 +43,51 @@ entry: @local_memory_two_objects.local_mem1 = internal unnamed_addr addrspace(3) global [4 x i32] undef, align 4 ; Check that the LDS size emitted correctly -; EG: .long 166120 -; EG-NEXT: .long 8 -; GCN: .long 47180 -; GCN-NEXT: .long 32900 - -; GCN-LABEL: {{^}}local_memory_two_objects: -; GCN: v_lshlrev_b32_e32 [[ADDRW:v[0-9]+]], 2, v0 -; CI-DAG: v_sub_i32_e32 [[SUB0:v[0-9]+]], vcc, 0, [[ADDRW]] -; SI-DAG: v_sub_i32_e32 [[SUB0:v[0-9]+]], vcc, 12, [[ADDRW]] -; SI-DAG: v_sub_i32_e32 [[SUB1:v[0-9]+]], vcc, 16, [[ADDRW]] -; GCN-DAG: ds_write2_b32 [[ADDRW]], {{v[0-9]+}}, {{v[0-9]+}} offset1:4 - -; GCN: s_barrier - -; CI-DAG: v_sub_i32_e32 [[SUB1:v[0-9]+]], vcc, 16, [[ADDRW]] -; GCN-DAG: ds_read_b32 v{{[0-9]+}}, [[SUB0]] -; GCN-DAG: ds_read_b32 v{{[0-9]+}}, [[SUB1]] - define amdgpu_kernel void @local_memory_two_objects(i32 addrspace(1)* %out) #0 { +; SI-LABEL: local_memory_two_objects: +; SI: ; %bb.0: ; %entry +; SI-NEXT: v_lshlrev_b32_e32 v1, 2, v0 +; SI-NEXT: v_lshlrev_b32_e32 v2, 1, v0 +; SI-NEXT: s_mov_b32 m0, -1 +; SI-NEXT: ds_write2_b32 v1, v0, v2 offset1:4 +; SI-NEXT: v_sub_i32_e32 v0, vcc, 12, v1 +; SI-NEXT: v_sub_i32_e32 v2, vcc, 16, v1 +; SI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: s_barrier +; SI-NEXT: v_add_i32_e32 v2, vcc, 12, v2 +; SI-NEXT: ds_read_b32 v0, v0 +; SI-NEXT: ds_read_b32 v3, v2 +; SI-NEXT: s_mov_b32 s3, 0xf000 +; SI-NEXT: s_mov_b32 s2, 0 +; SI-NEXT: v_mov_b32_e32 v2, 0 +; SI-NEXT: s_waitcnt lgkmcnt(1) +; SI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64 +; SI-NEXT: s_waitcnt lgkmcnt(0) +; SI-NEXT: buffer_store_dword v3, v[1:2], s[0:3], 0 addr64 offset:16 +; SI-NEXT: s_endpgm +; +; CI-LABEL: local_memory_two_objects: +; CI: ; %bb.0: ; %entry +; CI-NEXT: v_lshlrev_b32_e32 v1, 2, v0 +; CI-NEXT: v_lshlrev_b32_e32 v2, 1, v0 +; CI-NEXT: s_mov_b32 m0, -1 +; CI-NEXT: ds_write2_b32 v1, v0, v2 offset1:4 +; CI-NEXT: v_sub_i32_e32 v0, vcc, 0, v1 +; CI-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x9 +; CI-NEXT: s_waitcnt lgkmcnt(0) +; CI-NEXT: s_barrier +; CI-NEXT: v_sub_i32_e32 v2, vcc, 16, v1 +; CI-NEXT: ds_read_b32 v0, v0 offset:12 +; CI-NEXT: ds_read_b32 v3, v2 offset:12 +; CI-NEXT: s_mov_b32 s3, 0xf000 +; CI-NEXT: s_mov_b32 s2, 0 +; CI-NEXT: v_mov_b32_e32 v2, 0 +; CI-NEXT: s_waitcnt lgkmcnt(1) +; CI-NEXT: buffer_store_dword v0, v[1:2], s[0:3], 0 addr64 +; CI-NEXT: s_waitcnt lgkmcnt(0) +; CI-NEXT: buffer_store_dword v3, v[1:2], s[0:3], 0 addr64 offset:16 +; CI-NEXT: s_endpgm entry: %x.i = call i32 @llvm.amdgcn.workitem.id.x() %arrayidx = getelementptr inbounds [4 x i32], [4 x i32] addrspace(3)* @local_memory_two_objects.local_mem0, i32 0, i32 %x.i |