diff options
-rw-r--r-- | clang/lib/Headers/CMakeLists.txt | 1 | ||||
-rw-r--r-- | clang/lib/Headers/__emmintrin_f16c.h | 124 | ||||
-rw-r--r-- | clang/lib/Headers/emmintrin.h | 2 | ||||
-rw-r--r-- | clang/lib/Headers/f16cintrin.h | 93 | ||||
-rw-r--r-- | clang/lib/Headers/module.modulemap | 5 |
5 files changed, 90 insertions, 135 deletions
diff --git a/clang/lib/Headers/CMakeLists.txt b/clang/lib/Headers/CMakeLists.txt index 8dab8ba..b34bc9b 100644 --- a/clang/lib/Headers/CMakeLists.txt +++ b/clang/lib/Headers/CMakeLists.txt @@ -46,7 +46,6 @@ set(files clflushoptintrin.h clwbintrin.h emmintrin.h - __emmintrin_f16c.h f16cintrin.h float.h fma4intrin.h diff --git a/clang/lib/Headers/__emmintrin_f16c.h b/clang/lib/Headers/__emmintrin_f16c.h deleted file mode 100644 index c9d5107..0000000 --- a/clang/lib/Headers/__emmintrin_f16c.h +++ /dev/null @@ -1,124 +0,0 @@ -/*===---- __emmintrin_f16c.h - F16C intrinsics -----------------------------=== - * - * Permission is hereby granted, free of charge, to any person obtaining a copy - * of this software and associated documentation files (the "Software"), to deal - * in the Software without restriction, including without limitation the rights - * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell - * copies of the Software, and to permit persons to whom the Software is - * furnished to do so, subject to the following conditions: - * - * The above copyright notice and this permission notice shall be included in - * all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR - * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, - * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE - * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER - * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, - * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN - * THE SOFTWARE. - * - *===-----------------------------------------------------------------------=== - */ - -#if !defined __EMMINTRIN_H -#error "Never use <__emmintrin_f16c.h> directly; include <emmintrin.h> instead." -#endif - -#ifndef __EMMINTRIN_F16C_H -#define __EMMINTRIN_F16C_H - -/* Define the default attributes for the functions in this file. */ -#define __DEFAULT_FN_ATTRS \ - __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) - -/// Converts a 16-bit half-precision float value into a 32-bit float -/// value. -/// -/// \headerfile <x86intrin.h> -/// -/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction. -/// -/// \param __a -/// A 16-bit half-precision float value. -/// \returns The converted 32-bit float value. -static __inline float __DEFAULT_FN_ATTRS -_cvtsh_ss(unsigned short __a) -{ - __v8hi v = {(short)__a, 0, 0, 0, 0, 0, 0, 0}; - __v4sf r = __builtin_ia32_vcvtph2ps(v); - return r[0]; -} - -/// Converts a 32-bit single-precision float value to a 16-bit -/// half-precision float value. -/// -/// \headerfile <x86intrin.h> -/// -/// \code -/// unsigned short _cvtss_sh(float a, const int imm); -/// \endcode -/// -/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction. -/// -/// \param a -/// A 32-bit single-precision float value to be converted to a 16-bit -/// half-precision float value. -/// \param imm -/// An immediate value controlling rounding using bits [2:0]: \n -/// 000: Nearest \n -/// 001: Down \n -/// 010: Up \n -/// 011: Truncate \n -/// 1XX: Use MXCSR.RC for rounding -/// \returns The converted 16-bit half-precision float value. -#define _cvtss_sh(a, imm) __extension__ ({ \ - (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \ - (imm)))[0]); }) - -/// Converts a 128-bit vector containing 32-bit float values into a -/// 128-bit vector containing 16-bit half-precision float values. -/// -/// \headerfile <x86intrin.h> -/// -/// \code -/// __m128i _mm_cvtps_ph(__m128 a, const int imm); -/// \endcode -/// -/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction. -/// -/// \param a -/// A 128-bit vector containing 32-bit float values. -/// \param imm -/// An immediate value controlling rounding using bits [2:0]: \n -/// 000: Nearest \n -/// 001: Down \n -/// 010: Up \n -/// 011: Truncate \n -/// 1XX: Use MXCSR.RC for rounding -/// \returns A 128-bit vector containing converted 16-bit half-precision float -/// values. The lower 64 bits are used to store the converted 16-bit -/// half-precision floating-point values. -#define _mm_cvtps_ph(a, imm) __extension__ ({ \ - (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm)); }) - -/// Converts a 128-bit vector containing 16-bit half-precision float -/// values into a 128-bit vector containing 32-bit float values. -/// -/// \headerfile <x86intrin.h> -/// -/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction. -/// -/// \param __a -/// A 128-bit vector containing 16-bit half-precision float values. The lower -/// 64 bits are used in the conversion. -/// \returns A 128-bit vector of [4 x float] containing converted float values. -static __inline __m128 __DEFAULT_FN_ATTRS -_mm_cvtph_ps(__m128i __a) -{ - return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a); -} - -#undef __DEFAULT_FN_ATTRS - -#endif /* __EMMINTRIN_F16C_H */ diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h index cd38d2e..a62bb9d 100644 --- a/clang/lib/Headers/emmintrin.h +++ b/clang/lib/Headers/emmintrin.h @@ -44,8 +44,6 @@ typedef unsigned char __v16qu __attribute__((__vector_size__(16))); * appear in the interface though. */ typedef signed char __v16qs __attribute__((__vector_size__(16))); -#include <__emmintrin_f16c.h> - /* Define the default attributes for the functions in this file. */ #define __DEFAULT_FN_ATTRS __attribute__((__always_inline__, __nodebug__, __target__("sse2"))) diff --git a/clang/lib/Headers/f16cintrin.h b/clang/lib/Headers/f16cintrin.h index c6a1b50..df7f884 100644 --- a/clang/lib/Headers/f16cintrin.h +++ b/clang/lib/Headers/f16cintrin.h @@ -32,9 +32,96 @@ #define __DEFAULT_FN_ATTRS \ __attribute__((__always_inline__, __nodebug__, __target__("f16c"))) -/* The 256-bit versions of functions in f16cintrin.h. - Intel documents these as being in immintrin.h, and - they depend on typedefs from avxintrin.h. */ +// NOTE: Intel documents the 128-bit versions of these as being in emmintrin.h, +// but that's because icc can emulate these without f16c using a library call. +// Since we don't do that let's leave these in f16cintrin.h. + +/// Converts a 16-bit half-precision float value into a 32-bit float +/// value. +/// +/// \headerfile <x86intrin.h> +/// +/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction. +/// +/// \param __a +/// A 16-bit half-precision float value. +/// \returns The converted 32-bit float value. +static __inline float __DEFAULT_FN_ATTRS +_cvtsh_ss(unsigned short __a) +{ + __v8hi v = {(short)__a, 0, 0, 0, 0, 0, 0, 0}; + __v4sf r = __builtin_ia32_vcvtph2ps(v); + return r[0]; +} + +/// Converts a 32-bit single-precision float value to a 16-bit +/// half-precision float value. +/// +/// \headerfile <x86intrin.h> +/// +/// \code +/// unsigned short _cvtss_sh(float a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction. +/// +/// \param a +/// A 32-bit single-precision float value to be converted to a 16-bit +/// half-precision float value. +/// \param imm +/// An immediate value controlling rounding using bits [2:0]: \n +/// 000: Nearest \n +/// 001: Down \n +/// 010: Up \n +/// 011: Truncate \n +/// 1XX: Use MXCSR.RC for rounding +/// \returns The converted 16-bit half-precision float value. +#define _cvtss_sh(a, imm) __extension__ ({ \ + (unsigned short)(((__v8hi)__builtin_ia32_vcvtps2ph((__v4sf){a, 0, 0, 0}, \ + (imm)))[0]); }) + +/// Converts a 128-bit vector containing 32-bit float values into a +/// 128-bit vector containing 16-bit half-precision float values. +/// +/// \headerfile <x86intrin.h> +/// +/// \code +/// __m128i _mm_cvtps_ph(__m128 a, const int imm); +/// \endcode +/// +/// This intrinsic corresponds to the <c> VCVTPS2PH </c> instruction. +/// +/// \param a +/// A 128-bit vector containing 32-bit float values. +/// \param imm +/// An immediate value controlling rounding using bits [2:0]: \n +/// 000: Nearest \n +/// 001: Down \n +/// 010: Up \n +/// 011: Truncate \n +/// 1XX: Use MXCSR.RC for rounding +/// \returns A 128-bit vector containing converted 16-bit half-precision float +/// values. The lower 64 bits are used to store the converted 16-bit +/// half-precision floating-point values. +#define _mm_cvtps_ph(a, imm) __extension__ ({ \ + (__m128i)__builtin_ia32_vcvtps2ph((__v4sf)(__m128)(a), (imm)); }) + +/// Converts a 128-bit vector containing 16-bit half-precision float +/// values into a 128-bit vector containing 32-bit float values. +/// +/// \headerfile <x86intrin.h> +/// +/// This intrinsic corresponds to the <c> VCVTPH2PS </c> instruction. +/// +/// \param __a +/// A 128-bit vector containing 16-bit half-precision float values. The lower +/// 64 bits are used in the conversion. +/// \returns A 128-bit vector of [4 x float] containing converted float values. +static __inline __m128 __DEFAULT_FN_ATTRS +_mm_cvtph_ps(__m128i __a) +{ + return (__m128)__builtin_ia32_vcvtph2ps((__v8hi)__a); +} /// Converts a 256-bit vector of [8 x float] into a 128-bit vector /// containing 16-bit half-precision float values. diff --git a/clang/lib/Headers/module.modulemap b/clang/lib/Headers/module.modulemap index fd79dd0..0f10dd4 100644 --- a/clang/lib/Headers/module.modulemap +++ b/clang/lib/Headers/module.modulemap @@ -95,14 +95,9 @@ module _Builtin_intrinsics [system] [extern_c] { explicit module sse2 { export sse - export f16c_128 header "emmintrin.h" } - explicit module f16c_128 { - header "__emmintrin_f16c.h" - } - explicit module sse3 { export sse2 header "pmmintrin.h" |