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-rw-r--r--llvm/include/llvm/IR/LLVMContext.h4
-rw-r--r--llvm/lib/IR/LLVMContext.cpp4
-rw-r--r--llvm/lib/IR/LLVMContextImpl.cpp10
-rw-r--r--llvm/lib/IR/LLVMContextImpl.h4
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp7
5 files changed, 24 insertions, 5 deletions
diff --git a/llvm/include/llvm/IR/LLVMContext.h b/llvm/include/llvm/IR/LLVMContext.h
index 558816e..6d4a59b 100644
--- a/llvm/include/llvm/IR/LLVMContext.h
+++ b/llvm/include/llvm/IR/LLVMContext.h
@@ -130,6 +130,10 @@ public:
/// scope names are ordered by increasing synchronization scope IDs.
void getSyncScopeNames(SmallVectorImpl<StringRef> &SSNs) const;
+ /// getSyncScopeName - Returns the name of a SyncScope::ID
+ /// registered with LLVMContext, if any.
+ std::optional<StringRef> getSyncScopeName(SyncScope::ID Id) const;
+
/// Define the GC for a function
void setGC(const Function &Fn, std::string GCName);
diff --git a/llvm/lib/IR/LLVMContext.cpp b/llvm/lib/IR/LLVMContext.cpp
index 22e6077..e078527 100644
--- a/llvm/lib/IR/LLVMContext.cpp
+++ b/llvm/lib/IR/LLVMContext.cpp
@@ -330,6 +330,10 @@ void LLVMContext::getSyncScopeNames(SmallVectorImpl<StringRef> &SSNs) const {
pImpl->getSyncScopeNames(SSNs);
}
+std::optional<StringRef> LLVMContext::getSyncScopeName(SyncScope::ID Id) const {
+ return pImpl->getSyncScopeName(Id);
+}
+
void LLVMContext::setGC(const Function &Fn, std::string GCName) {
pImpl->GCNames[&Fn] = std::move(GCName);
}
diff --git a/llvm/lib/IR/LLVMContextImpl.cpp b/llvm/lib/IR/LLVMContextImpl.cpp
index 4f1ef8c..f2c965a 100644
--- a/llvm/lib/IR/LLVMContextImpl.cpp
+++ b/llvm/lib/IR/LLVMContextImpl.cpp
@@ -244,6 +244,16 @@ void LLVMContextImpl::getSyncScopeNames(
SSNs[SSE.second] = SSE.first();
}
+std::optional<StringRef>
+LLVMContextImpl::getSyncScopeName(SyncScope::ID Id) const {
+ for (const auto &SSE : SSC) {
+ if (SSE.second != Id)
+ continue;
+ return SSE.first();
+ }
+ return std::nullopt;
+}
+
/// Gets the OptPassGate for this LLVMContextImpl, which defaults to the
/// singleton OptBisect if not explicitly set.
OptPassGate &LLVMContextImpl::getOptPassGate() const {
diff --git a/llvm/lib/IR/LLVMContextImpl.h b/llvm/lib/IR/LLVMContextImpl.h
index e76f004..971091f 100644
--- a/llvm/lib/IR/LLVMContextImpl.h
+++ b/llvm/lib/IR/LLVMContextImpl.h
@@ -1665,6 +1665,10 @@ public:
/// scope names are ordered by increasing synchronization scope IDs.
void getSyncScopeNames(SmallVectorImpl<StringRef> &SSNs) const;
+ /// getSyncScopeName - Returns the name of a SyncScope::ID
+ /// registered with LLVMContext, if any.
+ std::optional<StringRef> getSyncScopeName(SyncScope::ID Id) const;
+
/// Maintain the GC name for each function.
///
/// This saves allocating an additional word in Function for programs which
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 2464361..885ecab 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -16144,11 +16144,8 @@ static bool atomicIgnoresDenormalModeOrFPModeIsFTZ(const AtomicRMWInst *RMW) {
static OptimizationRemark emitAtomicRMWLegalRemark(const AtomicRMWInst *RMW) {
LLVMContext &Ctx = RMW->getContext();
- SmallVector<StringRef> SSNs;
- Ctx.getSyncScopeNames(SSNs);
- StringRef MemScope = SSNs[RMW->getSyncScopeID()].empty()
- ? "system"
- : SSNs[RMW->getSyncScopeID()];
+ StringRef SS = Ctx.getSyncScopeName(RMW->getSyncScopeID()).value_or("");
+ StringRef MemScope = SS.empty() ? StringRef("system") : SS;
return OptimizationRemark(DEBUG_TYPE, "Passed", RMW)
<< "Hardware instruction generated for atomic "