diff options
346 files changed, 9559 insertions, 4018 deletions
diff --git a/.ci/generate_test_report_github.py b/.ci/generate_test_report_github.py index 4b7f3a2..7242264 100644 --- a/.ci/generate_test_report_github.py +++ b/.ci/generate_test_report_github.py @@ -16,11 +16,13 @@ PLATFORM_TITLES = { if __name__ == "__main__": parser = argparse.ArgumentParser() parser.add_argument("return_code", help="The build's return code.", type=int) - parser.add_argument("junit_files", help="Paths to JUnit report files.", nargs="*") + parser.add_argument( + "build_test_logs", help="Paths to JUnit report files and ninja logs.", nargs="*" + ) args = parser.parse_args() report = generate_test_report_lib.generate_report_from_files( - PLATFORM_TITLES[platform.system()], args.return_code, args.junit_files + PLATFORM_TITLES[platform.system()], args.return_code, args.build_test_logs ) print(report) diff --git a/.ci/generate_test_report_lib.py b/.ci/generate_test_report_lib.py index 25d810f..d868c08 100644 --- a/.ci/generate_test_report_lib.py +++ b/.ci/generate_test_report_lib.py @@ -12,6 +12,84 @@ UNRELATED_FAILURES_STR = ( "https://github.com/llvm/llvm-project/issues and add the " "`infrastructure` label." ) +# The maximum number of lines to pull from a ninja failure. +NINJA_LOG_SIZE_THRESHOLD = 500 + + +def _parse_ninja_log(ninja_log: list[str]) -> list[tuple[str, str]]: + """Parses an individual ninja log.""" + failures = [] + index = 0 + while index < len(ninja_log): + while index < len(ninja_log) and not ninja_log[index].startswith("FAILED:"): + index += 1 + if index == len(ninja_log): + # We hit the end of the log without finding a build failure, go to + # the next log. + return failures + # We are trying to parse cases like the following: + # + # [4/5] test/4.stamp + # FAILED: touch test/4.stamp + # touch test/4.stamp + # + # index will point to the line that starts with Failed:. The progress + # indicator is the line before this ([4/5] test/4.stamp) and contains a pretty + # printed version of the target being built (test/4.stamp). We use this line + # and remove the progress information to get a succinct name for the target. + failing_action = ninja_log[index - 1].split("] ")[1] + failure_log = [] + while ( + index < len(ninja_log) + and not ninja_log[index].startswith("[") + and not ninja_log[index].startswith("ninja: build stopped:") + and len(failure_log) < NINJA_LOG_SIZE_THRESHOLD + ): + failure_log.append(ninja_log[index]) + index += 1 + failures.append((failing_action, "\n".join(failure_log))) + return failures + + +def find_failure_in_ninja_logs(ninja_logs: list[list[str]]) -> list[tuple[str, str]]: + """Extracts failure messages from ninja output. + + This function takes stdout/stderr from ninja in the form of a list of files + represented as a list of lines. This function then returns tuples containing + the name of the target and the error message. + + Args: + ninja_logs: A list of files in the form of a list of lines representing the log + files captured from ninja. + + Returns: + A list of tuples. The first string is the name of the target that failed. The + second string is the error message. + """ + failures = [] + for ninja_log in ninja_logs: + log_failures = _parse_ninja_log(ninja_log) + failures.extend(log_failures) + return failures + + +def _format_ninja_failures(ninja_failures: list[tuple[str, str]]) -> list[str]: + """Formats ninja failures into summary views for the report.""" + output = [] + for build_failure in ninja_failures: + failed_action, failure_message = build_failure + output.extend( + [ + "<details>", + f"<summary>{failed_action}</summary>", + "", + "```", + failure_message, + "```", + "</details>", + ] + ) + return output # Set size_limit to limit the byte size of the report. The default is 1MB as this @@ -24,6 +102,7 @@ def generate_report( title, return_code, junit_objects, + ninja_logs: list[list[str]], size_limit=1024 * 1024, list_failures=True, ): @@ -61,15 +140,34 @@ def generate_report( ] ) else: - report.extend( - [ - "The build failed before running any tests.", - "", - SEE_BUILD_FILE_STR, - "", - UNRELATED_FAILURES_STR, - ] - ) + ninja_failures = find_failure_in_ninja_logs(ninja_logs) + if not ninja_failures: + report.extend( + [ + "The build failed before running any tests. Detailed " + "information about the build failure could not be " + "automatically obtained.", + "", + SEE_BUILD_FILE_STR, + "", + UNRELATED_FAILURES_STR, + ] + ) + else: + report.extend( + [ + "The build failed before running any tests. Click on a " + "failure below to see the details.", + "", + ] + ) + report.extend(_format_ninja_failures(ninja_failures)) + report.extend( + [ + "", + UNRELATED_FAILURES_STR, + ] + ) return "\n".join(report) tests_passed = tests_run - tests_skipped - tests_failed @@ -114,14 +212,28 @@ def generate_report( elif return_code != 0: # No tests failed but the build was in a failed state. Bring this to the user's # attention. - report.extend( - [ - "", - "All tests passed but another part of the build **failed**.", - "", - SEE_BUILD_FILE_STR, - ] - ) + ninja_failures = find_failure_in_ninja_logs(ninja_logs) + if not ninja_failures: + report.extend( + [ + "", + "All tests passed but another part of the build **failed**. " + "Information about the build failure could not be automatically " + "obtained.", + "", + SEE_BUILD_FILE_STR, + ] + ) + else: + report.extend( + [ + "", + "All tests passed but another part of the build **failed**. Click on " + "a failure below to see the details.", + "", + ] + ) + report.extend(_format_ninja_failures(ninja_failures)) if failures or return_code != 0: report.extend(["", UNRELATED_FAILURES_STR]) @@ -139,9 +251,19 @@ def generate_report( return report -def generate_report_from_files(title, return_code, junit_files): +def generate_report_from_files(title, return_code, build_log_files): + junit_files = [ + junit_file for junit_file in build_log_files if junit_file.endswith(".xml") + ] + ninja_log_files = [ + ninja_log for ninja_log in build_log_files if ninja_log.endswith(".log") + ] + ninja_logs = [] + for ninja_log_file in ninja_log_files: + with open(ninja_log_file, "r") as ninja_log_file_handle: + ninja_logs.append( + [log_line.strip() for log_line in ninja_log_file_handle.readlines()] + ) return generate_report( - title, - return_code, - [JUnitXml.fromfile(p) for p in junit_files], + title, return_code, [JUnitXml.fromfile(p) for p in junit_files], ninja_logs ) diff --git a/.ci/generate_test_report_lib_test.py b/.ci/generate_test_report_lib_test.py index eda76ead..466a823 100644 --- a/.ci/generate_test_report_lib_test.py +++ b/.ci/generate_test_report_lib_test.py @@ -8,6 +8,8 @@ import unittest from io import StringIO from textwrap import dedent +import tempfile +import os from junitparser import JUnitXml @@ -19,9 +21,114 @@ def junit_from_xml(xml): class TestReports(unittest.TestCase): + def test_find_failure_ninja_logs(self): + failures = generate_test_report_lib.find_failure_in_ninja_logs( + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: touch test/4.stamp", + "Wow! This system is really broken!", + "[5/5] test/5.stamp", + ], + ] + ) + self.assertEqual(len(failures), 1) + self.assertEqual( + failures[0], + ( + "test/4.stamp", + dedent( + """\ + FAILED: touch test/4.stamp + Wow! This system is really broken!""" + ), + ), + ) + + def test_no_failure_ninja_log(self): + failures = generate_test_report_lib.find_failure_in_ninja_logs( + [ + [ + "[1/3] test/1.stamp", + "[2/3] test/2.stamp", + "[3/3] test/3.stamp", + ] + ] + ) + self.assertEqual(failures, []) + + def test_ninja_log_end(self): + failures = generate_test_report_lib.find_failure_in_ninja_logs( + [ + [ + "[1/3] test/1.stamp", + "[2/3] test/2.stamp", + "[3/3] test/3.stamp", + "FAILED: touch test/3.stamp", + "Wow! This system is really broken!", + "ninja: build stopped: subcommand failed.", + ] + ] + ) + self.assertEqual(len(failures), 1) + self.assertEqual( + failures[0], + ( + "test/3.stamp", + dedent( + """\ + FAILED: touch test/3.stamp + Wow! This system is really broken!""" + ), + ), + ) + + def test_ninja_log_multiple_failures(self): + failures = generate_test_report_lib.find_failure_in_ninja_logs( + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "FAILED: touch test/2.stamp", + "Wow! This system is really broken!", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: touch test/4.stamp", + "Wow! This system is maybe broken!", + "[5/5] test/5.stamp", + ] + ] + ) + self.assertEqual(len(failures), 2) + self.assertEqual( + failures[0], + ( + "test/2.stamp", + dedent( + """\ + FAILED: touch test/2.stamp + Wow! This system is really broken!""" + ), + ), + ) + self.assertEqual( + failures[1], + ( + "test/4.stamp", + dedent( + """\ + FAILED: touch test/4.stamp + Wow! This system is maybe broken!""" + ), + ), + ) + def test_title_only(self): self.assertEqual( - generate_test_report_lib.generate_report("Foo", 0, []), + generate_test_report_lib.generate_report("Foo", 0, [], []), dedent( """\ # Foo @@ -32,12 +139,12 @@ class TestReports(unittest.TestCase): def test_title_only_failure(self): self.assertEqual( - generate_test_report_lib.generate_report("Foo", 1, []), + generate_test_report_lib.generate_report("Foo", 1, [], []), dedent( """\ # Foo - The build failed before running any tests. + The build failed before running any tests. Detailed information about the build failure could not be automatically obtained. Download the build's log file to see the details. @@ -45,6 +152,45 @@ class TestReports(unittest.TestCase): ), ) + def test_title_only_failure_ninja_log(self): + self.assertEqual( + generate_test_report_lib.generate_report( + "Foo", + 1, + [], + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: test/4.stamp", + "touch test/4.stamp", + "Wow! Risk!", + "[5/5] test/5.stamp", + ] + ], + ), + dedent( + """\ + # Foo + + The build failed before running any tests. Click on a failure below to see the details. + + <details> + <summary>test/4.stamp</summary> + + ``` + FAILED: test/4.stamp + touch test/4.stamp + Wow! Risk! + ``` + </details> + + If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.""" + ), + ) + def test_no_tests_in_testsuite(self): self.assertEqual( generate_test_report_lib.generate_report( @@ -62,12 +208,13 @@ class TestReports(unittest.TestCase): ) ) ], + [], ), dedent( """\ # Foo - The build failed before running any tests. + The build failed before running any tests. Detailed information about the build failure could not be automatically obtained. Download the build's log file to see the details. @@ -93,6 +240,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], ), ( dedent( @@ -122,6 +270,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], ), ( dedent( @@ -130,7 +279,7 @@ class TestReports(unittest.TestCase): * 1 test passed - All tests passed but another part of the build **failed**. + All tests passed but another part of the build **failed**. Information about the build failure could not be automatically obtained. Download the build's log file to see the details. @@ -139,6 +288,155 @@ class TestReports(unittest.TestCase): ), ) + def test_no_failures_build_failed_ninja_log(self): + self.assertEqual( + generate_test_report_lib.generate_report( + "Foo", + 1, + [ + junit_from_xml( + dedent( + """\ + <?xml version="1.0" encoding="UTF-8"?> + <testsuites time="0.00"> + <testsuite name="Passed" tests="1" failures="0" skipped="0" time="0.00"> + <testcase classname="Bar/test_1" name="test_1" time="0.00"/> + </testsuite> + </testsuites>""" + ) + ) + ], + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: test/4.stamp", + "touch test/4.stamp", + "Wow! Close To You!", + "[5/5] test/5.stamp", + ] + ], + ), + ( + dedent( + """\ + # Foo + + * 1 test passed + + All tests passed but another part of the build **failed**. Click on a failure below to see the details. + + <details> + <summary>test/4.stamp</summary> + + ``` + FAILED: test/4.stamp + touch test/4.stamp + Wow! Close To You! + ``` + </details> + + If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.""" + ) + ), + ) + + def test_no_failures_multiple_build_failed_ninja_log(self): + test = generate_test_report_lib.generate_report( + "Foo", + 1, + [ + junit_from_xml( + dedent( + """\ + <?xml version="1.0" encoding="UTF-8"?> + <testsuites time="0.00"> + <testsuite name="Passed" tests="1" failures="0" skipped="0" time="0.00"> + <testcase classname="Bar/test_1" name="test_1" time="0.00"/> + </testsuite> + </testsuites>""" + ) + ) + ], + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "FAILED: touch test/2.stamp", + "Wow! Be Kind!", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: touch test/4.stamp", + "Wow! I Dare You!", + "[5/5] test/5.stamp", + ] + ], + ) + print(test) + self.assertEqual( + generate_test_report_lib.generate_report( + "Foo", + 1, + [ + junit_from_xml( + dedent( + """\ + <?xml version="1.0" encoding="UTF-8"?> + <testsuites time="0.00"> + <testsuite name="Passed" tests="1" failures="0" skipped="0" time="0.00"> + <testcase classname="Bar/test_1" name="test_1" time="0.00"/> + </testsuite> + </testsuites>""" + ) + ) + ], + [ + [ + "[1/5] test/1.stamp", + "[2/5] test/2.stamp", + "FAILED: touch test/2.stamp", + "Wow! Be Kind!", + "[3/5] test/3.stamp", + "[4/5] test/4.stamp", + "FAILED: touch test/4.stamp", + "Wow! I Dare You!", + "[5/5] test/5.stamp", + ] + ], + ), + ( + dedent( + """\ + # Foo + + * 1 test passed + + All tests passed but another part of the build **failed**. Click on a failure below to see the details. + + <details> + <summary>test/2.stamp</summary> + + ``` + FAILED: touch test/2.stamp + Wow! Be Kind! + ``` + </details> + <details> + <summary>test/4.stamp</summary> + + ``` + FAILED: touch test/4.stamp + Wow! I Dare You! + ``` + </details> + + If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.""" + ) + ), + ) + def test_report_single_file_single_testsuite(self): self.assertEqual( generate_test_report_lib.generate_report( @@ -166,6 +464,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], ), ( dedent( @@ -261,6 +560,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], ), self.MULTI_SUITE_OUTPUT, ) @@ -302,6 +602,7 @@ class TestReports(unittest.TestCase): ) ), ], + [], ), self.MULTI_SUITE_OUTPUT, ) @@ -326,6 +627,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], list_failures=False, ), ( @@ -362,6 +664,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], list_failures=False, ), ( @@ -401,6 +704,7 @@ class TestReports(unittest.TestCase): ) ) ], + [], size_limit=512, ), ( @@ -416,3 +720,59 @@ class TestReports(unittest.TestCase): ) ), ) + + def test_generate_report_end_to_end(self): + with tempfile.TemporaryDirectory() as temp_dir: + junit_xml_file = os.path.join(temp_dir, "junit.xml") + with open(junit_xml_file, "w") as junit_xml_handle: + junit_xml_handle.write( + dedent( + """\ + <?xml version="1.0" encoding="UTF-8"?> + <testsuites time="0.00"> + <testsuite name="Passed" tests="1" failures="0" skipped="0" time="0.00"> + <testcase classname="Bar/test_1" name="test_1" time="0.00"/> + </testsuite> + </testsuites>""" + ) + ) + ninja_log_file = os.path.join(temp_dir, "ninja.log") + with open(ninja_log_file, "w") as ninja_log_handle: + ninja_log_handle.write( + dedent( + """\ + [1/5] test/1.stamp + [2/5] test/2.stamp + [3/5] test/3.stamp + [4/5] test/4.stamp + FAILED: test/4.stamp + touch test/4.stamp + Wow! That's so True! + [5/5] test/5.stamp""" + ) + ) + self.assertEqual( + generate_test_report_lib.generate_report_from_files( + "Foo", 1, [junit_xml_file, ninja_log_file] + ), + dedent( + """\ + # Foo + + * 1 test passed + + All tests passed but another part of the build **failed**. Click on a failure below to see the details. + + <details> + <summary>test/4.stamp</summary> + + ``` + FAILED: test/4.stamp + touch test/4.stamp + Wow! That's so True! + ``` + </details> + + If these failures are unrelated to your changes (for example tests are broken or flaky at HEAD), please open an issue at https://github.com/llvm/llvm-project/issues and add the `infrastructure` label.""" + ), + ) diff --git a/.ci/utils.sh b/.ci/utils.sh index 6656ffe..30bf2d9 100644 --- a/.ci/utils.sh +++ b/.ci/utils.sh @@ -33,7 +33,8 @@ function at-exit { if [[ "$GITHUB_STEP_SUMMARY" != "" ]]; then python "${MONOREPO_ROOT}"/.ci/generate_test_report_github.py \ - $retcode "${BUILD_DIR}"/test-results.*.xml >> $GITHUB_STEP_SUMMARY + $retcode "${BUILD_DIR}"/test-results.*.xml "${BUILD_DIR}"/ninja*.log \ + >> $GITHUB_STEP_SUMMARY fi } trap at-exit EXIT diff --git a/.github/workflows/premerge.yaml b/.github/workflows/premerge.yaml index d0518fa..6e59841 100644 --- a/.github/workflows/premerge.yaml +++ b/.github/workflows/premerge.yaml @@ -35,9 +35,6 @@ jobs: with: fetch-depth: 2 - name: Build and Test - # Mark the job as a success even if the step fails so that people do - # not get notified while the new premerge pipeline is in an - # experimental state. run: | git config --global --add safe.directory '*' @@ -109,9 +106,6 @@ jobs: echo "windows-projects=${projects_to_build}" >> $GITHUB_OUTPUT echo "windows-check-targets=${project_check_targets}" >> $GITHUB_OUTPUT - name: Build and Test - # Mark the job as a success even if the step fails so that people do - # not get notified while the new premerge pipeline is in an - # experimental state. if: ${{ steps.vars.outputs.windows-projects != '' }} shell: cmd run: | diff --git a/clang-tools-extra/clangd/CMakeLists.txt b/clang-tools-extra/clangd/CMakeLists.txt index a1e9da4..06920a9 100644 --- a/clang-tools-extra/clangd/CMakeLists.txt +++ b/clang-tools-extra/clangd/CMakeLists.txt @@ -108,6 +108,7 @@ add_clang_library(clangDaemon STATIC SemanticHighlighting.cpp SemanticSelection.cpp SourceCode.cpp + SymbolDocumentation.cpp SystemIncludeExtractor.cpp TidyProvider.cpp TUScheduler.cpp diff --git a/clang-tools-extra/clangd/CodeCompletionStrings.cpp b/clang-tools-extra/clangd/CodeCompletionStrings.cpp index 9b4442b..d657964 100644 --- a/clang-tools-extra/clangd/CodeCompletionStrings.cpp +++ b/clang-tools-extra/clangd/CodeCompletionStrings.cpp @@ -7,13 +7,18 @@ //===----------------------------------------------------------------------===// #include "CodeCompletionStrings.h" +#include "Config.h" +#include "SymbolDocumentation.h" #include "clang-c/Index.h" #include "clang/AST/ASTContext.h" +#include "clang/AST/Comment.h" +#include "clang/AST/Decl.h" #include "clang/AST/RawCommentList.h" #include "clang/Basic/SourceManager.h" #include "clang/Sema/CodeCompleteConsumer.h" #include "llvm/Support/Compiler.h" #include "llvm/Support/JSON.h" +#include "llvm/Support/raw_ostream.h" #include <limits> #include <utility> @@ -100,16 +105,51 @@ std::string getDeclComment(const ASTContext &Ctx, const NamedDecl &Decl) { // the comments for namespaces. return ""; } - const RawComment *RC = getCompletionComment(Ctx, &Decl); - if (!RC) - return ""; - // Sanity check that the comment does not come from the PCH. We choose to not - // write them into PCH, because they are racy and slow to load. - assert(!Ctx.getSourceManager().isLoadedSourceLocation(RC->getBeginLoc())); - std::string Doc = - RC->getFormattedText(Ctx.getSourceManager(), Ctx.getDiagnostics()); - if (!looksLikeDocComment(Doc)) - return ""; + + const RawComment *RC = nullptr; + const Config &Cfg = Config::current(); + + std::string Doc; + + if (Cfg.Documentation.CommentFormat == Config::CommentFormatPolicy::Doxygen && + isa<ParmVarDecl>(Decl)) { + // Parameters are documented in their declaration context (function or + // template function). + const NamedDecl *ND = dyn_cast<NamedDecl>(Decl.getDeclContext()); + if (!ND) + return ""; + + RC = getCompletionComment(Ctx, ND); + if (!RC) + return ""; + + // Sanity check that the comment does not come from the PCH. We choose to + // not write them into PCH, because they are racy and slow to load. + assert(!Ctx.getSourceManager().isLoadedSourceLocation(RC->getBeginLoc())); + + comments::FullComment *FC = RC->parse(Ctx, /*PP=*/nullptr, ND); + if (!FC) + return ""; + + SymbolDocCommentVisitor V(FC, Ctx.getLangOpts().CommentOpts); + std::string RawDoc; + llvm::raw_string_ostream OS(RawDoc); + + V.parameterDocToString(dyn_cast<ParmVarDecl>(&Decl)->getName(), OS); + + Doc = StringRef(RawDoc).trim().str(); + } else { + RC = getCompletionComment(Ctx, &Decl); + if (!RC) + return ""; + // Sanity check that the comment does not come from the PCH. We choose to + // not write them into PCH, because they are racy and slow to load. + assert(!Ctx.getSourceManager().isLoadedSourceLocation(RC->getBeginLoc())); + Doc = RC->getFormattedText(Ctx.getSourceManager(), Ctx.getDiagnostics()); + if (!looksLikeDocComment(Doc)) + return ""; + } + // Clang requires source to be UTF-8, but doesn't enforce this in comments. if (!llvm::json::isUTF8(Doc)) Doc = llvm::json::fixUTF8(Doc); diff --git a/clang-tools-extra/clangd/Hover.cpp b/clang-tools-extra/clangd/Hover.cpp index 1e0718d..0afa902 100644 --- a/clang-tools-extra/clangd/Hover.cpp +++ b/clang-tools-extra/clangd/Hover.cpp @@ -18,6 +18,7 @@ #include "Protocol.h" #include "Selection.h" #include "SourceCode.h" +#include "SymbolDocumentation.h" #include "clang-include-cleaner/Analysis.h" #include "clang-include-cleaner/IncludeSpeller.h" #include "clang-include-cleaner/Types.h" @@ -41,6 +42,7 @@ #include "clang/AST/Type.h" #include "clang/Basic/CharInfo.h" #include "clang/Basic/LLVM.h" +#include "clang/Basic/LangOptions.h" #include "clang/Basic/SourceLocation.h" #include "clang/Basic/SourceManager.h" #include "clang/Basic/Specifiers.h" @@ -627,6 +629,9 @@ HoverInfo getHoverContents(const NamedDecl *D, const PrintingPolicy &PP, HI.Name = printName(Ctx, *D); const auto *CommentD = getDeclForComment(D); HI.Documentation = getDeclComment(Ctx, *CommentD); + // save the language options to be able to create the comment::CommandTraits + // to parse the documentation + HI.CommentOpts = D->getASTContext().getLangOpts().CommentOpts; enhanceFromIndex(HI, *CommentD, Index); if (HI.Documentation.empty()) HI.Documentation = synthesizeDocumentation(D); @@ -1388,9 +1393,100 @@ static std::string formatOffset(uint64_t OffsetInBits) { return Offset; } -markup::Document HoverInfo::present() const { - markup::Document Output; +void HoverInfo::calleeArgInfoToMarkupParagraph(markup::Paragraph &P) const { + assert(CallPassType); + std::string Buffer; + llvm::raw_string_ostream OS(Buffer); + OS << "Passed "; + if (CallPassType->PassBy != HoverInfo::PassType::Value) { + OS << "by "; + if (CallPassType->PassBy == HoverInfo::PassType::ConstRef) + OS << "const "; + OS << "reference "; + } + if (CalleeArgInfo->Name) + OS << "as " << CalleeArgInfo->Name; + else if (CallPassType->PassBy == HoverInfo::PassType::Value) + OS << "by value"; + if (CallPassType->Converted && CalleeArgInfo->Type) + OS << " (converted to " << CalleeArgInfo->Type->Type << ")"; + P.appendText(OS.str()); +} + +void HoverInfo::usedSymbolNamesToMarkup(markup::Document &Output) const { + markup::Paragraph &P = Output.addParagraph(); + P.appendText("provides "); + + const std::vector<std::string>::size_type SymbolNamesLimit = 5; + auto Front = llvm::ArrayRef(UsedSymbolNames).take_front(SymbolNamesLimit); + + llvm::interleave( + Front, [&](llvm::StringRef Sym) { P.appendCode(Sym); }, + [&] { P.appendText(", "); }); + if (UsedSymbolNames.size() > Front.size()) { + P.appendText(" and "); + P.appendText(std::to_string(UsedSymbolNames.size() - Front.size())); + P.appendText(" more"); + } +} + +void HoverInfo::providerToMarkupParagraph(markup::Document &Output) const { + markup::Paragraph &DI = Output.addParagraph(); + DI.appendText("provided by"); + DI.appendSpace(); + DI.appendCode(Provider); +} + +void HoverInfo::definitionScopeToMarkup(markup::Document &Output) const { + std::string Buffer; + + // Append scope comment, dropping trailing "::". + // Note that we don't print anything for global namespace, to not annoy + // non-c++ projects or projects that are not making use of namespaces. + if (!LocalScope.empty()) { + // Container name, e.g. class, method, function. + // We might want to propagate some info about container type to print + // function foo, class X, method X::bar, etc. + Buffer += "// In " + llvm::StringRef(LocalScope).rtrim(':').str() + '\n'; + } else if (NamespaceScope && !NamespaceScope->empty()) { + Buffer += "// In namespace " + + llvm::StringRef(*NamespaceScope).rtrim(':').str() + '\n'; + } + + if (!AccessSpecifier.empty()) { + Buffer += AccessSpecifier + ": "; + } + Buffer += Definition; + + Output.addCodeBlock(Buffer, DefinitionLanguage); +} + +void HoverInfo::valueToMarkupParagraph(markup::Paragraph &P) const { + P.appendText("Value = "); + P.appendCode(*Value); +} + +void HoverInfo::offsetToMarkupParagraph(markup::Paragraph &P) const { + P.appendText("Offset: " + formatOffset(*Offset)); +} + +void HoverInfo::sizeToMarkupParagraph(markup::Paragraph &P) const { + P.appendText("Size: " + formatSize(*Size)); + if (Padding && *Padding != 0) { + P.appendText(llvm::formatv(" (+{0} padding)", formatSize(*Padding)).str()); + } + if (Align) + P.appendText(", alignment " + formatSize(*Align)); +} + +markup::Document HoverInfo::presentDoxygen() const { + // NOTE: this function is currently almost identical to presentDefault(). + // This is to have a minimal change when introducing the doxygen parser. + // This function will be changed when rearranging the output for doxygen + // parsed documentation. + + markup::Document Output; // Header contains a text of the form: // variable `var` // @@ -1407,14 +1503,99 @@ markup::Document HoverInfo::present() const { if (Kind != index::SymbolKind::Unknown) Header.appendText(index::getSymbolKindString(Kind)).appendSpace(); assert(!Name.empty() && "hover triggered on a nameless symbol"); + Header.appendCode(Name); if (!Provider.empty()) { - markup::Paragraph &DI = Output.addParagraph(); - DI.appendText("provided by"); - DI.appendSpace(); - DI.appendCode(Provider); + providerToMarkupParagraph(Output); + } + + // Put a linebreak after header to increase readability. + Output.addRuler(); + // Print Types on their own lines to reduce chances of getting line-wrapped by + // editor, as they might be long. + if (ReturnType) { + // For functions we display signature in a list form, e.g.: + // → `x` + // Parameters: + // - `bool param1` + // - `int param2 = 5` + Output.addParagraph().appendText("→ ").appendCode( + llvm::to_string(*ReturnType)); + } + + SymbolDocCommentVisitor SymbolDoc(Documentation, CommentOpts); + + if (Parameters && !Parameters->empty()) { + Output.addParagraph().appendText("Parameters:"); + markup::BulletList &L = Output.addBulletList(); + for (const auto &Param : *Parameters) { + markup::Paragraph &P = L.addItem().addParagraph(); + P.appendCode(llvm::to_string(Param)); + + if (SymbolDoc.isParameterDocumented(llvm::to_string(Param.Name))) { + P.appendText(" -"); + SymbolDoc.parameterDocToMarkup(llvm::to_string(Param.Name), P); + } + } + } + // Don't print Type after Parameters or ReturnType as this will just duplicate + // the information + if (Type && !ReturnType && !Parameters) + Output.addParagraph().appendText("Type: ").appendCode( + llvm::to_string(*Type)); + + if (Value) { + valueToMarkupParagraph(Output.addParagraph()); + } + + if (Offset) + offsetToMarkupParagraph(Output.addParagraph()); + if (Size) { + sizeToMarkupParagraph(Output.addParagraph()); + } + + if (CalleeArgInfo) { + calleeArgInfoToMarkupParagraph(Output.addParagraph()); + } + + SymbolDoc.docToMarkup(Output); + + if (!Definition.empty()) { Output.addRuler(); + definitionScopeToMarkup(Output); + } + + if (!UsedSymbolNames.empty()) { + Output.addRuler(); + usedSymbolNamesToMarkup(Output); + } + + return Output; +} + +markup::Document HoverInfo::presentDefault() const { + markup::Document Output; + // Header contains a text of the form: + // variable `var` + // + // class `X` + // + // function `foo` + // + // expression + // + // Note that we are making use of a level-3 heading because VSCode renders + // level 1 and 2 headers in a huge font, see + // https://github.com/microsoft/vscode/issues/88417 for details. + markup::Paragraph &Header = Output.addHeading(3); + if (Kind != index::SymbolKind::Unknown) + Header.appendText(index::getSymbolKindString(Kind)).appendSpace(); + assert(!Name.empty() && "hover triggered on a nameless symbol"); + Header.appendCode(Name); + + if (!Provider.empty()) { + providerToMarkupParagraph(Output); } // Put a linebreak after header to increase readability. @@ -1445,41 +1626,17 @@ markup::Document HoverInfo::present() const { llvm::to_string(*Type)); if (Value) { - markup::Paragraph &P = Output.addParagraph(); - P.appendText("Value = "); - P.appendCode(*Value); + valueToMarkupParagraph(Output.addParagraph()); } if (Offset) - Output.addParagraph().appendText("Offset: " + formatOffset(*Offset)); + offsetToMarkupParagraph(Output.addParagraph()); if (Size) { - auto &P = Output.addParagraph().appendText("Size: " + formatSize(*Size)); - if (Padding && *Padding != 0) { - P.appendText( - llvm::formatv(" (+{0} padding)", formatSize(*Padding)).str()); - } - if (Align) - P.appendText(", alignment " + formatSize(*Align)); + sizeToMarkupParagraph(Output.addParagraph()); } if (CalleeArgInfo) { - assert(CallPassType); - std::string Buffer; - llvm::raw_string_ostream OS(Buffer); - OS << "Passed "; - if (CallPassType->PassBy != HoverInfo::PassType::Value) { - OS << "by "; - if (CallPassType->PassBy == HoverInfo::PassType::ConstRef) - OS << "const "; - OS << "reference "; - } - if (CalleeArgInfo->Name) - OS << "as " << CalleeArgInfo->Name; - else if (CallPassType->PassBy == HoverInfo::PassType::Value) - OS << "by value"; - if (CallPassType->Converted && CalleeArgInfo->Type) - OS << " (converted to " << CalleeArgInfo->Type->Type << ")"; - Output.addParagraph().appendText(OS.str()); + calleeArgInfoToMarkupParagraph(Output.addParagraph()); } if (!Documentation.empty()) @@ -1487,49 +1644,12 @@ markup::Document HoverInfo::present() const { if (!Definition.empty()) { Output.addRuler(); - std::string Buffer; - - if (!Definition.empty()) { - // Append scope comment, dropping trailing "::". - // Note that we don't print anything for global namespace, to not annoy - // non-c++ projects or projects that are not making use of namespaces. - if (!LocalScope.empty()) { - // Container name, e.g. class, method, function. - // We might want to propagate some info about container type to print - // function foo, class X, method X::bar, etc. - Buffer += - "// In " + llvm::StringRef(LocalScope).rtrim(':').str() + '\n'; - } else if (NamespaceScope && !NamespaceScope->empty()) { - Buffer += "// In namespace " + - llvm::StringRef(*NamespaceScope).rtrim(':').str() + '\n'; - } - - if (!AccessSpecifier.empty()) { - Buffer += AccessSpecifier + ": "; - } - - Buffer += Definition; - } - - Output.addCodeBlock(Buffer, DefinitionLanguage); + definitionScopeToMarkup(Output); } if (!UsedSymbolNames.empty()) { Output.addRuler(); - markup::Paragraph &P = Output.addParagraph(); - P.appendText("provides "); - - const std::vector<std::string>::size_type SymbolNamesLimit = 5; - auto Front = llvm::ArrayRef(UsedSymbolNames).take_front(SymbolNamesLimit); - - llvm::interleave( - Front, [&](llvm::StringRef Sym) { P.appendCode(Sym); }, - [&] { P.appendText(", "); }); - if (UsedSymbolNames.size() > Front.size()) { - P.appendText(" and "); - P.appendText(std::to_string(UsedSymbolNames.size() - Front.size())); - P.appendText(" more"); - } + usedSymbolNamesToMarkup(Output); } return Output; @@ -1538,21 +1658,19 @@ markup::Document HoverInfo::present() const { std::string HoverInfo::present(MarkupKind Kind) const { if (Kind == MarkupKind::Markdown) { const Config &Cfg = Config::current(); - if ((Cfg.Documentation.CommentFormat == - Config::CommentFormatPolicy::Markdown) || - (Cfg.Documentation.CommentFormat == - Config::CommentFormatPolicy::Doxygen)) - // If the user prefers Markdown, we use the present() method to generate - // the Markdown output. - return present().asMarkdown(); + if (Cfg.Documentation.CommentFormat == + Config::CommentFormatPolicy::Markdown) + return presentDefault().asMarkdown(); + if (Cfg.Documentation.CommentFormat == Config::CommentFormatPolicy::Doxygen) + return presentDoxygen().asMarkdown(); if (Cfg.Documentation.CommentFormat == Config::CommentFormatPolicy::PlainText) // If the user prefers plain text, we use the present() method to generate // the plain text output. - return present().asEscapedMarkdown(); + return presentDefault().asEscapedMarkdown(); } - return present().asPlainText(); + return presentDefault().asPlainText(); } // If the backtick at `Offset` starts a probable quoted range, return the range diff --git a/clang-tools-extra/clangd/Hover.h b/clang-tools-extra/clangd/Hover.h index 2f65431..614180a 100644 --- a/clang-tools-extra/clangd/Hover.h +++ b/clang-tools-extra/clangd/Hover.h @@ -74,6 +74,8 @@ struct HoverInfo { std::optional<Range> SymRange; index::SymbolKind Kind = index::SymbolKind::Unknown; std::string Documentation; + // required to create a comments::CommandTraits object without the ASTContext + CommentOptions CommentOpts; /// Source code containing the definition of the symbol. std::string Definition; const char *DefinitionLanguage = "cpp"; @@ -118,10 +120,23 @@ struct HoverInfo { // alphabetical order. std::vector<std::string> UsedSymbolNames; - /// Produce a user-readable information. - markup::Document present() const; - + /// Produce a user-readable information based on the specified markup kind. std::string present(MarkupKind Kind) const; + +private: + void usedSymbolNamesToMarkup(markup::Document &Output) const; + void providerToMarkupParagraph(markup::Document &Output) const; + void definitionScopeToMarkup(markup::Document &Output) const; + void calleeArgInfoToMarkupParagraph(markup::Paragraph &P) const; + void valueToMarkupParagraph(markup::Paragraph &P) const; + void offsetToMarkupParagraph(markup::Paragraph &P) const; + void sizeToMarkupParagraph(markup::Paragraph &P) const; + + /// Parse and render the hover information as Doxygen documentation. + markup::Document presentDoxygen() const; + + /// Render the hover information as a default documentation. + markup::Document presentDefault() const; }; inline bool operator==(const HoverInfo::PrintedType &LHS, diff --git a/clang-tools-extra/clangd/SymbolDocumentation.cpp b/clang-tools-extra/clangd/SymbolDocumentation.cpp new file mode 100644 index 0000000..dea637b --- /dev/null +++ b/clang-tools-extra/clangd/SymbolDocumentation.cpp @@ -0,0 +1,297 @@ +//===--- SymbolDocumentation.cpp ==-------------------------------*- C++-*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SymbolDocumentation.h" + +#include "support/Markup.h" +#include "clang/AST/Comment.h" +#include "clang/AST/CommentCommandTraits.h" +#include "clang/AST/CommentVisitor.h" +#include "llvm/ADT/DenseMap.h" +#include "llvm/ADT/StringRef.h" + +namespace clang { +namespace clangd { +namespace { + +std::string commandMarkerAsString(comments::CommandMarkerKind CommandMarker) { + switch (CommandMarker) { + case comments::CommandMarkerKind::CMK_At: + return "@"; + case comments::CommandMarkerKind::CMK_Backslash: + return "\\"; + } + llvm_unreachable("Unknown command marker kind"); +} + +void commandToMarkup(markup::Paragraph &Out, StringRef Command, + comments::CommandMarkerKind CommandMarker, + StringRef Args) { + Out.appendBoldText(commandMarkerAsString(CommandMarker) + Command.str()); + if (!Args.empty()) { + Out.appendSpace(); + Out.appendEmphasizedText(Args.str()); + } +} +} // namespace + +class ParagraphToMarkupDocument + : public comments::ConstCommentVisitor<ParagraphToMarkupDocument> { +public: + ParagraphToMarkupDocument(markup::Paragraph &Out, + const comments::CommandTraits &Traits) + : Out(Out), Traits(Traits) {} + + void visitParagraphComment(const comments::ParagraphComment *C) { + if (!C) + return; + + for (const auto *Child = C->child_begin(); Child != C->child_end(); + ++Child) { + visit(*Child); + } + } + + void visitTextComment(const comments::TextComment *C) { + // Always trim leading space after a newline. + StringRef Text = C->getText(); + if (LastChunkEndsWithNewline && C->getText().starts_with(' ')) + Text = Text.drop_front(); + + LastChunkEndsWithNewline = C->hasTrailingNewline(); + Out.appendText(Text.str() + (LastChunkEndsWithNewline ? "\n" : "")); + } + + void visitInlineCommandComment(const comments::InlineCommandComment *C) { + + if (C->getNumArgs() > 0) { + std::string ArgText; + for (unsigned I = 0; I < C->getNumArgs(); ++I) { + if (!ArgText.empty()) + ArgText += " "; + ArgText += C->getArgText(I); + } + + switch (C->getRenderKind()) { + case comments::InlineCommandRenderKind::Monospaced: + Out.appendCode(ArgText); + break; + case comments::InlineCommandRenderKind::Bold: + Out.appendBoldText(ArgText); + break; + case comments::InlineCommandRenderKind::Emphasized: + Out.appendEmphasizedText(ArgText); + break; + default: + commandToMarkup(Out, C->getCommandName(Traits), C->getCommandMarker(), + ArgText); + break; + } + } else { + if (C->getCommandName(Traits) == "n") { + // \n is a special case, it is used to create a new line. + Out.appendText(" \n"); + LastChunkEndsWithNewline = true; + return; + } + + commandToMarkup(Out, C->getCommandName(Traits), C->getCommandMarker(), + ""); + } + } + + void visitHTMLStartTagComment(const comments::HTMLStartTagComment *STC) { + std::string TagText = "<" + STC->getTagName().str(); + + for (unsigned I = 0; I < STC->getNumAttrs(); ++I) { + const comments::HTMLStartTagComment::Attribute &Attr = STC->getAttr(I); + TagText += " " + Attr.Name.str() + "=\"" + Attr.Value.str() + "\""; + } + + if (STC->isSelfClosing()) + TagText += " /"; + TagText += ">"; + + LastChunkEndsWithNewline = STC->hasTrailingNewline(); + Out.appendText(TagText + (LastChunkEndsWithNewline ? "\n" : "")); + } + + void visitHTMLEndTagComment(const comments::HTMLEndTagComment *ETC) { + LastChunkEndsWithNewline = ETC->hasTrailingNewline(); + Out.appendText("</" + ETC->getTagName().str() + ">" + + (LastChunkEndsWithNewline ? "\n" : "")); + } + +private: + markup::Paragraph &Out; + const comments::CommandTraits &Traits; + + /// If true, the next leading space after a new line is trimmed. + bool LastChunkEndsWithNewline = false; +}; + +class ParagraphToString + : public comments::ConstCommentVisitor<ParagraphToString> { +public: + ParagraphToString(llvm::raw_string_ostream &Out, + const comments::CommandTraits &Traits) + : Out(Out), Traits(Traits) {} + + void visitParagraphComment(const comments::ParagraphComment *C) { + if (!C) + return; + + for (const auto *Child = C->child_begin(); Child != C->child_end(); + ++Child) { + visit(*Child); + } + } + + void visitTextComment(const comments::TextComment *C) { Out << C->getText(); } + + void visitInlineCommandComment(const comments::InlineCommandComment *C) { + Out << commandMarkerAsString(C->getCommandMarker()); + Out << C->getCommandName(Traits); + if (C->getNumArgs() > 0) { + for (unsigned I = 0; I < C->getNumArgs(); ++I) + Out << " " << C->getArgText(I); + } + Out << " "; + } + + void visitHTMLStartTagComment(const comments::HTMLStartTagComment *STC) { + Out << "<" << STC->getTagName().str(); + + for (unsigned I = 0; I < STC->getNumAttrs(); ++I) { + const comments::HTMLStartTagComment::Attribute &Attr = STC->getAttr(I); + Out << " " << Attr.Name.str(); + if (!Attr.Value.str().empty()) + Out << "=\"" << Attr.Value.str() << "\""; + } + + if (STC->isSelfClosing()) + Out << " /"; + Out << ">"; + + Out << (STC->hasTrailingNewline() ? "\n" : ""); + } + + void visitHTMLEndTagComment(const comments::HTMLEndTagComment *ETC) { + Out << "</" << ETC->getTagName().str() << ">" + << (ETC->hasTrailingNewline() ? "\n" : ""); + } + +private: + llvm::raw_string_ostream &Out; + const comments::CommandTraits &Traits; +}; + +class BlockCommentToMarkupDocument + : public comments::ConstCommentVisitor<BlockCommentToMarkupDocument> { +public: + BlockCommentToMarkupDocument(markup::Document &Out, + const comments::CommandTraits &Traits) + : Out(Out), Traits(Traits) {} + + void visitBlockCommandComment(const comments::BlockCommandComment *B) { + + switch (B->getCommandID()) { + case comments::CommandTraits::KCI_arg: + case comments::CommandTraits::KCI_li: + // \li and \arg are special cases, they are used to create a list item. + // In markdown it is a bullet list. + ParagraphToMarkupDocument(Out.addBulletList().addItem().addParagraph(), + Traits) + .visit(B->getParagraph()); + break; + default: { + // Some commands have arguments, like \throws. + // The arguments are not part of the paragraph. + // We need reconstruct them here. + std::string ArgText; + for (unsigned I = 0; I < B->getNumArgs(); ++I) { + if (!ArgText.empty()) + ArgText += " "; + ArgText += B->getArgText(I); + } + auto &P = Out.addParagraph(); + commandToMarkup(P, B->getCommandName(Traits), B->getCommandMarker(), + ArgText); + if (B->getParagraph() && !B->getParagraph()->isWhitespace()) { + // For commands with arguments, the paragraph starts after the first + // space. Therefore we need to append a space manually in this case. + if (!ArgText.empty()) + P.appendSpace(); + ParagraphToMarkupDocument(P, Traits).visit(B->getParagraph()); + } + } + } + } + + void visitVerbatimBlockComment(const comments::VerbatimBlockComment *VB) { + commandToMarkup(Out.addParagraph(), VB->getCommandName(Traits), + VB->getCommandMarker(), ""); + + std::string VerbatimText; + + for (const auto *LI = VB->child_begin(); LI != VB->child_end(); ++LI) { + if (const auto *Line = cast<comments::VerbatimBlockLineComment>(*LI)) { + VerbatimText += Line->getText().str() + "\n"; + } + } + + Out.addCodeBlock(VerbatimText, ""); + + commandToMarkup(Out.addParagraph(), VB->getCloseName(), + VB->getCommandMarker(), ""); + } + + void visitVerbatimLineComment(const comments::VerbatimLineComment *VL) { + auto &P = Out.addParagraph(); + commandToMarkup(P, VL->getCommandName(Traits), VL->getCommandMarker(), ""); + P.appendSpace().appendCode(VL->getText().str(), true).appendSpace(); + } + +private: + markup::Document &Out; + const comments::CommandTraits &Traits; + StringRef CommentEscapeMarker; +}; + +void SymbolDocCommentVisitor::parameterDocToMarkup(StringRef ParamName, + markup::Paragraph &Out) { + if (ParamName.empty()) + return; + + if (const auto *P = Parameters.lookup(ParamName)) { + ParagraphToMarkupDocument(Out, Traits).visit(P->getParagraph()); + } +} + +void SymbolDocCommentVisitor::parameterDocToString( + StringRef ParamName, llvm::raw_string_ostream &Out) { + if (ParamName.empty()) + return; + + if (const auto *P = Parameters.lookup(ParamName)) { + ParagraphToString(Out, Traits).visit(P->getParagraph()); + } +} + +void SymbolDocCommentVisitor::docToMarkup(markup::Document &Out) { + for (unsigned I = 0; I < CommentPartIndex; ++I) { + if (const auto *BC = BlockCommands.lookup(I)) { + BlockCommentToMarkupDocument(Out, Traits).visit(BC); + } else if (const auto *P = FreeParagraphs.lookup(I)) { + ParagraphToMarkupDocument(Out.addParagraph(), Traits).visit(P); + } + } +} + +} // namespace clangd +} // namespace clang diff --git a/clang-tools-extra/clangd/SymbolDocumentation.h b/clang-tools-extra/clangd/SymbolDocumentation.h new file mode 100644 index 0000000..b5120ba --- /dev/null +++ b/clang-tools-extra/clangd/SymbolDocumentation.h @@ -0,0 +1,155 @@ +//===--- SymbolDocumentation.h ==---------------------------------*- C++-*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// Class to parse doxygen comments into a flat structure for consumption +// in e.g. Hover and Code Completion +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_CLANG_TOOLS_EXTRA_CLANGD_SYMBOLDOCUMENTATION_H +#define LLVM_CLANG_TOOLS_EXTRA_CLANGD_SYMBOLDOCUMENTATION_H + +#include "support/Markup.h" +#include "clang/AST/Comment.h" +#include "clang/AST/CommentLexer.h" +#include "clang/AST/CommentParser.h" +#include "clang/AST/CommentSema.h" +#include "clang/AST/CommentVisitor.h" +#include "clang/Basic/SourceManager.h" +#include "llvm/Support/raw_ostream.h" +#include <string> + +namespace clang { +namespace clangd { + +class SymbolDocCommentVisitor + : public comments::ConstCommentVisitor<SymbolDocCommentVisitor> { +public: + SymbolDocCommentVisitor(comments::FullComment *FC, + const CommentOptions &CommentOpts) + : Traits(Allocator, CommentOpts), Allocator() { + if (!FC) + return; + + for (auto *Block : FC->getBlocks()) { + visit(Block); + } + } + + SymbolDocCommentVisitor(llvm::StringRef Documentation, + const CommentOptions &CommentOpts) + : Traits(Allocator, CommentOpts), Allocator() { + + if (Documentation.empty()) + return; + + CommentWithMarkers.reserve(Documentation.size() + + Documentation.count('\n') * 3); + + // The comment lexer expects doxygen markers, so add them back. + // We need to use the /// style doxygen markers because the comment could + // contain the closing the closing tag "*/" of a C Style "/** */" comment + // which would break the parsing if we would just enclose the comment text + // with "/** */". + CommentWithMarkers = "///"; + bool NewLine = true; + for (char C : Documentation) { + if (C == '\n') { + CommentWithMarkers += "\n///"; + NewLine = true; + } else { + if (NewLine && (C == '<')) { + // A comment line starting with '///<' is treated as a doxygen + // comment. Therefore add a space to separate the '<' from the comment + // marker. This allows to parse html tags at the beginning of a line + // and the escape marker prevents adding the artificial space in the + // markup documentation. The extra space will not be rendered, since + // we render it as markdown. + CommentWithMarkers += ' '; + } + CommentWithMarkers += C; + NewLine = false; + } + } + SourceManagerForFile SourceMgrForFile("mock_file.cpp", CommentWithMarkers); + + SourceManager &SourceMgr = SourceMgrForFile.get(); + // The doxygen Sema requires a Diagostics consumer, since it reports + // warnings e.g. when parameters are not documented correctly. These + // warnings are not relevant for us, so we can ignore them. + SourceMgr.getDiagnostics().setClient(new IgnoringDiagConsumer); + + comments::Sema S(Allocator, SourceMgr, SourceMgr.getDiagnostics(), Traits, + /*PP=*/nullptr); + comments::Lexer L(Allocator, SourceMgr.getDiagnostics(), Traits, + SourceMgr.getLocForStartOfFile(SourceMgr.getMainFileID()), + CommentWithMarkers.data(), + CommentWithMarkers.data() + CommentWithMarkers.size()); + comments::Parser P(L, S, Allocator, SourceMgr, SourceMgr.getDiagnostics(), + Traits); + comments::FullComment *FC = P.parseFullComment(); + + if (!FC) + return; + + for (auto *Block : FC->getBlocks()) { + visit(Block); + } + } + + bool isParameterDocumented(StringRef ParamName) const { + return Parameters.contains(ParamName); + } + + void parameterDocToMarkup(StringRef ParamName, markup::Paragraph &Out); + + void parameterDocToString(StringRef ParamName, llvm::raw_string_ostream &Out); + + void docToMarkup(markup::Document &Out); + + void visitBlockCommandComment(const comments::BlockCommandComment *B) { + BlockCommands[CommentPartIndex] = B; + CommentPartIndex++; + } + + void visitParagraphComment(const comments::ParagraphComment *P) { + FreeParagraphs[CommentPartIndex] = P; + CommentPartIndex++; + } + + void visitParamCommandComment(const comments::ParamCommandComment *P) { + Parameters[P->getParamNameAsWritten()] = P; + } + +private: + comments::CommandTraits Traits; + llvm::BumpPtrAllocator Allocator; + std::string CommentWithMarkers; + + /// Index to keep track of the order of the comments. + /// We want to rearange some commands like \\param. + /// This index allows us to keep the order of the other comment parts. + unsigned CommentPartIndex = 0; + + /// Parsed paragaph(s) of the "param" comamnd(s) + llvm::SmallDenseMap<StringRef, const comments::ParamCommandComment *> + Parameters; + + /// All the block commands. + llvm::SmallDenseMap<unsigned, const comments::BlockCommandComment *> + BlockCommands; + + /// All "free" text paragraphs. + llvm::SmallDenseMap<unsigned, const comments::ParagraphComment *> + FreeParagraphs; +}; + +} // namespace clangd +} // namespace clang + +#endif // LLVM_CLANG_TOOLS_EXTRA_CLANGD_SYMBOLDOCUMENTATION_H diff --git a/clang-tools-extra/clangd/support/Markup.cpp b/clang-tools-extra/clangd/support/Markup.cpp index a130830..89bdc65 100644 --- a/clang-tools-extra/clangd/support/Markup.cpp +++ b/clang-tools-extra/clangd/support/Markup.cpp @@ -363,7 +363,12 @@ public: void renderMarkdown(llvm::raw_ostream &OS) const override { std::string Marker = getMarkerForCodeBlock(Contents); // No need to pad from previous blocks, as they should end with a new line. - OS << Marker << Language << '\n' << Contents << '\n' << Marker << '\n'; + OS << Marker << Language << '\n' << Contents; + if (!Contents.empty() && Contents.back() != '\n') + OS << '\n'; + // Always end with an empty line to separate code blocks from following + // paragraphs. + OS << Marker << "\n\n"; } void renderPlainText(llvm::raw_ostream &OS) const override { diff --git a/clang-tools-extra/clangd/unittests/CMakeLists.txt b/clang-tools-extra/clangd/unittests/CMakeLists.txt index d425070..9656eea 100644 --- a/clang-tools-extra/clangd/unittests/CMakeLists.txt +++ b/clang-tools-extra/clangd/unittests/CMakeLists.txt @@ -92,6 +92,7 @@ add_unittest(ClangdUnitTests ClangdTests SourceCodeTests.cpp StdLibTests.cpp SymbolCollectorTests.cpp + SymbolDocumentationTests.cpp SymbolInfoTests.cpp SyncAPI.cpp TUSchedulerTests.cpp diff --git a/clang-tools-extra/clangd/unittests/HoverTests.cpp b/clang-tools-extra/clangd/unittests/HoverTests.cpp index 12d260d..3331164 100644 --- a/clang-tools-extra/clangd/unittests/HoverTests.cpp +++ b/clang-tools-extra/clangd/unittests/HoverTests.cpp @@ -3762,6 +3762,127 @@ provides Foo, Bar, Baz, Foobar, Qux and 1 more)"}}; } } +TEST(Hover, PresentDocumentation) { + struct { + const std::function<void(HoverInfo &)> Builder; + llvm::StringRef ExpectedRender; + } Cases[] = { + {[](HoverInfo &HI) { + HI.Kind = index::SymbolKind::Function; + HI.Documentation = "@brief brief doc\n\n" + "longer doc"; + HI.Definition = "void foo()"; + HI.Name = "foo"; + }, + R"(### function `foo` + +--- +**@brief** brief doc + +longer doc + +--- +```cpp +void foo() +```)"}, + {[](HoverInfo &HI) { + HI.Kind = index::SymbolKind::Function; + HI.Documentation = "@brief brief doc\n\n" + "longer doc"; + HI.Definition = "int foo()"; + HI.ReturnType = "int"; + HI.Name = "foo"; + }, + R"(### function `foo` + +--- +→ `int` + +**@brief** brief doc + +longer doc + +--- +```cpp +int foo() +```)"}, + {[](HoverInfo &HI) { + HI.Kind = index::SymbolKind::Function; + HI.Documentation = "@brief brief doc\n\n" + "longer doc\n@param a this is a param\n@return it " + "returns something"; + HI.Definition = "int foo(int a)"; + HI.ReturnType = "int"; + HI.Name = "foo"; + HI.Parameters.emplace(); + HI.Parameters->emplace_back(); + HI.Parameters->back().Type = "int"; + HI.Parameters->back().Name = "a"; + }, + R"(### function `foo` + +--- +→ `int` + +Parameters: + +- `int a` - this is a param + +**@brief** brief doc + +longer doc + +**@return** it returns something + +--- +```cpp +int foo(int a) +```)"}, + {[](HoverInfo &HI) { + HI.Kind = index::SymbolKind::Function; + HI.Documentation = "@brief brief doc\n\n" + "longer doc\n@param a this is a param\n@param b " + "does not exist\n@return it returns something"; + HI.Definition = "int foo(int a)"; + HI.ReturnType = "int"; + HI.Name = "foo"; + HI.Parameters.emplace(); + HI.Parameters->emplace_back(); + HI.Parameters->back().Type = "int"; + HI.Parameters->back().Name = "a"; + }, + R"(### function `foo` + +--- +→ `int` + +Parameters: + +- `int a` - this is a param + +**@brief** brief doc + +longer doc + +**@return** it returns something + +--- +```cpp +int foo(int a) +```)"}, + }; + + for (const auto &C : Cases) { + HoverInfo HI; + C.Builder(HI); + Config Cfg; + Cfg.Hover.ShowAKA = true; + Cfg.Documentation.CommentFormat = Config::CommentFormatPolicy::Doxygen; + WithContextValue WithCfg(Config::Key, std::move(Cfg)); + EXPECT_EQ(HI.present(MarkupKind::Markdown), C.ExpectedRender); + } +} + TEST(Hover, ParseDocumentation) { struct Case { llvm::StringRef Documentation; @@ -4339,6 +4460,149 @@ constexpr u64 pow_with_mod(u64 a, u64 b, u64 p) { EXPECT_TRUE(H->Value); EXPECT_TRUE(H->Type); } + +TEST(Hover, FunctionParameters) { + struct { + const char *const Code; + const std::function<void(HoverInfo &)> ExpectedBuilder; + std::string ExpectedRender; + } Cases[] = { + {R"cpp(/// Function doc + void foo(int [[^a]]); + )cpp", + [](HoverInfo &HI) { + HI.Name = "a"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "int"; + HI.Definition = "int a"; + HI.Documentation = ""; + }, + "### param `a`\n\n---\nType: `int`\n\n---\n```cpp\n// In foo\nint " + "a\n```"}, + {R"cpp(/// Function doc + /// @param a this is doc for a + void foo(int [[^a]]); + )cpp", + [](HoverInfo &HI) { + HI.Name = "a"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "int"; + HI.Definition = "int a"; + HI.Documentation = "this is doc for a"; + }, + "### param `a`\n\n---\nType: `int`\n\nthis is doc for " + "a\n\n---\n```cpp\n// In foo\nint a\n```"}, + {R"cpp(/// Function doc + /// @param b this is doc for b + void foo(int [[^a]], int b); + )cpp", + [](HoverInfo &HI) { + HI.Name = "a"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "int"; + HI.Definition = "int a"; + HI.Documentation = ""; + }, + "### param `a`\n\n---\nType: `int`\n\n---\n```cpp\n// In foo\nint " + "a\n```"}, + {R"cpp(/// Function doc + /// @param b this is doc for \p b + void foo(int a, int [[^b]]); + )cpp", + [](HoverInfo &HI) { + HI.Name = "b"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "int"; + HI.Definition = "int b"; + HI.Documentation = "this is doc for \\p b"; + }, + "### param `b`\n\n---\nType: `int`\n\nthis is doc for " + "`b`\n\n---\n```cpp\n// In foo\nint b\n```"}, + {R"cpp(/// Function doc + /// @param b this is doc for \p b + template <typename T> + void foo(T a, T [[^b]]); + )cpp", + [](HoverInfo &HI) { + HI.Name = "b"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "T"; + HI.Definition = "T b"; + HI.Documentation = "this is doc for \\p b"; + }, + "### param `b`\n\n---\nType: `T`\n\nthis is doc for " + "`b`\n\n---\n```cpp\n// In foo\nT b\n```"}, + {R"cpp(/// Function doc + /// @param b this is <b>doc</b> <html-tag attribute/> <another-html-tag attribute="value">for</another-html-tag> \p b + void foo(int a, int [[^b]]); + )cpp", + [](HoverInfo &HI) { + HI.Name = "b"; + HI.Kind = index::SymbolKind::Parameter; + HI.NamespaceScope = ""; + HI.LocalScope = "foo::"; + HI.Type = "int"; + HI.Definition = "int b"; + HI.Documentation = + "this is <b>doc</b> <html-tag attribute/> <another-html-tag " + "attribute=\"value\">for</another-html-tag> \\p b"; + }, + "### param `b`\n\n---\nType: `int`\n\nthis is \\<b>doc\\</b> " + "\\<html-tag attribute/> \\<another-html-tag " + "attribute=\"value\">for\\</another-html-tag> " + "`b`\n\n---\n```cpp\n// In foo\nint b\n```"}, + }; + + // Create a tiny index, so tests above can verify documentation is fetched. + Symbol IndexSym = func("indexSymbol"); + IndexSym.Documentation = "comment from index"; + SymbolSlab::Builder Symbols; + Symbols.insert(IndexSym); + auto Index = + MemIndex::build(std::move(Symbols).build(), RefSlab(), RelationSlab()); + + for (const auto &Case : Cases) { + SCOPED_TRACE(Case.Code); + + Annotations T(Case.Code); + TestTU TU = TestTU::withCode(T.code()); + auto AST = TU.build(); + Config Cfg; + Cfg.Hover.ShowAKA = true; + Cfg.Documentation.CommentFormat = Config::CommentFormatPolicy::Doxygen; + WithContextValue WithCfg(Config::Key, std::move(Cfg)); + auto H = getHover(AST, T.point(), format::getLLVMStyle(), Index.get()); + ASSERT_TRUE(H); + HoverInfo Expected; + Expected.SymRange = T.range(); + Case.ExpectedBuilder(Expected); + + EXPECT_EQ(H->present(MarkupKind::Markdown), Case.ExpectedRender); + EXPECT_EQ(H->NamespaceScope, Expected.NamespaceScope); + EXPECT_EQ(H->LocalScope, Expected.LocalScope); + EXPECT_EQ(H->Name, Expected.Name); + EXPECT_EQ(H->Kind, Expected.Kind); + EXPECT_EQ(H->Documentation, Expected.Documentation); + EXPECT_EQ(H->Definition, Expected.Definition); + EXPECT_EQ(H->Type, Expected.Type); + EXPECT_EQ(H->ReturnType, Expected.ReturnType); + EXPECT_EQ(H->Parameters, Expected.Parameters); + EXPECT_EQ(H->TemplateParameters, Expected.TemplateParameters); + EXPECT_EQ(H->SymRange, Expected.SymRange); + EXPECT_EQ(H->Value, Expected.Value); + } +} + } // namespace } // namespace clangd } // namespace clang diff --git a/clang-tools-extra/clangd/unittests/SymbolDocumentationTests.cpp b/clang-tools-extra/clangd/unittests/SymbolDocumentationTests.cpp new file mode 100644 index 0000000..69eb13b --- /dev/null +++ b/clang-tools-extra/clangd/unittests/SymbolDocumentationTests.cpp @@ -0,0 +1,161 @@ +//===-- SymbolDocumentationTests.cpp --------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +#include "SymbolDocumentation.h" + +#include "support/Markup.h" +#include "clang/Basic/CommentOptions.h" +#include "llvm/ADT/StringRef.h" +#include "gtest/gtest.h" + +namespace clang { +namespace clangd { + +TEST(SymbolDocumentation, Parse) { + + CommentOptions CommentOpts; + + struct Case { + llvm::StringRef Documentation; + llvm::StringRef ExpectedRenderEscapedMarkdown; + llvm::StringRef ExpectedRenderMarkdown; + llvm::StringRef ExpectedRenderPlainText; + } Cases[] = { + { + "foo bar", + "foo bar", + "foo bar", + "foo bar", + }, + { + "foo\nbar\n", + "foo\nbar", + "foo\nbar", + "foo bar", + }, + { + "foo\n\nbar\n", + "foo\n\nbar", + "foo\n\nbar", + "foo\n\nbar", + }, + { + "foo \\p bar baz", + "foo `bar` baz", + "foo `bar` baz", + "foo bar baz", + }, + { + "foo \\e bar baz", + "foo \\*bar\\* baz", + "foo *bar* baz", + "foo *bar* baz", + }, + { + "foo \\b bar baz", + "foo \\*\\*bar\\*\\* baz", + "foo **bar** baz", + "foo **bar** baz", + }, + { + "foo \\ref bar baz", + "foo \\*\\*\\\\ref\\*\\* \\*bar\\* baz", + "foo **\\ref** *bar* baz", + "foo **\\ref** *bar* baz", + }, + { + "foo @ref bar baz", + "foo \\*\\*@ref\\*\\* \\*bar\\* baz", + "foo **@ref** *bar* baz", + "foo **@ref** *bar* baz", + }, + { + "\\brief this is a \\n\nbrief description", + "\\*\\*\\\\brief\\*\\* this is a \nbrief description", + "**\\brief** this is a \nbrief description", + "**\\brief** this is a\nbrief description", + }, + { + "\\throw exception foo", + "\\*\\*\\\\throw\\*\\* \\*exception\\* foo", + "**\\throw** *exception* foo", + "**\\throw** *exception* foo", + }, + { + "\\brief this is a brief description\n\n\\li item 1\n\\li item " + "2\n\\arg item 3", + "\\*\\*\\\\brief\\*\\* this is a brief description\n\n- item 1\n\n- " + "item " + "2\n\n- " + "item 3", + "**\\brief** this is a brief description\n\n- item 1\n\n- item " + "2\n\n- " + "item 3", + "**\\brief** this is a brief description\n\n- item 1\n\n- item " + "2\n\n- " + "item 3", + }, + { + "\\defgroup mygroup this is a group\nthis is not a group description", + "\\*\\*@defgroup\\*\\* `mygroup this is a group`\n\nthis is not a " + "group " + "description", + "**@defgroup** `mygroup this is a group`\n\nthis is not a group " + "description", + "**@defgroup** `mygroup this is a group`\n\nthis is not a group " + "description", + }, + { + "\\verbatim\nthis is a\nverbatim block containing\nsome verbatim " + "text\n\\endverbatim", + "\\*\\*@verbatim\\*\\*\n\n```\nthis is a\nverbatim block " + "containing\nsome " + "verbatim text\n```\n\n\\*\\*@endverbatim\\*\\*", + "**@verbatim**\n\n```\nthis is a\nverbatim block containing\nsome " + "verbatim text\n```\n\n**@endverbatim**", + "**@verbatim**\n\nthis is a\nverbatim block containing\nsome " + "verbatim text\n\n**@endverbatim**", + }, + { + "@param foo this is a parameter\n@param bar this is another " + "parameter", + "", + "", + "", + }, + { + "@brief brief docs\n\n@param foo this is a parameter\n\nMore " + "description\ndocumentation", + "\\*\\*@brief\\*\\* brief docs\n\nMore description\ndocumentation", + "**@brief** brief docs\n\nMore description\ndocumentation", + "**@brief** brief docs\n\nMore description documentation", + }, + { + "<b>this is a bold text</b>\nnormal text\n<i>this is an italic " + "text</i>\n<code>this is a code block</code>", + "\\<b>this is a bold text\\</b>\nnormal text\n\\<i>this is an italic " + "text\\</i>\n\\<code>this is a code block\\</code>", + "\\<b>this is a bold text\\</b>\nnormal text\n\\<i>this is an italic " + "text\\</i>\n\\<code>this is a code block\\</code>", + "<b>this is a bold text</b> normal text <i>this is an italic " + "text</i> <code>this is a code block</code>", + }, + }; + for (const auto &C : Cases) { + markup::Document Doc; + SymbolDocCommentVisitor SymbolDoc(C.Documentation, CommentOpts); + + SymbolDoc.docToMarkup(Doc); + + EXPECT_EQ(Doc.asPlainText(), C.ExpectedRenderPlainText); + EXPECT_EQ(Doc.asMarkdown(), C.ExpectedRenderMarkdown); + EXPECT_EQ(Doc.asEscapedMarkdown(), C.ExpectedRenderEscapedMarkdown); + } +} + +} // namespace clangd +} // namespace clang diff --git a/clang-tools-extra/clangd/unittests/support/MarkupTests.cpp b/clang-tools-extra/clangd/unittests/support/MarkupTests.cpp index 482f230..5f91f31 100644 --- a/clang-tools-extra/clangd/unittests/support/MarkupTests.cpp +++ b/clang-tools-extra/clangd/unittests/support/MarkupTests.cpp @@ -463,6 +463,7 @@ TEST(Document, Separators) { ```cpp test ``` + bar)md"; EXPECT_EQ(D.asEscapedMarkdown(), ExpectedMarkdown); EXPECT_EQ(D.asMarkdown(), ExpectedMarkdown); @@ -559,6 +560,7 @@ foo bar baz ``` + ```cpp foo ```)md"; @@ -571,6 +573,12 @@ foo foo)pt"; EXPECT_EQ(D.asPlainText(), ExpectedPlainText); + + Document D2; + D2.addCodeBlock(""); + EXPECT_EQ(D2.asEscapedMarkdown(), "```cpp\n```"); + EXPECT_EQ(D2.asMarkdown(), "```cpp\n```"); + EXPECT_EQ(D2.asPlainText(), ""); } TEST(BulletList, Render) { diff --git a/clang/docs/OpenMPSupport.rst b/clang/docs/OpenMPSupport.rst index 58cd10a..670eb82 100644 --- a/clang/docs/OpenMPSupport.rst +++ b/clang/docs/OpenMPSupport.rst @@ -256,7 +256,7 @@ implementation. +------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| device | device-specific environment variables | :none:`unclaimed` | |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
-| device | omp_target_is_accessible routine | :none:`unclaimed` | |
+| device | omp_target_is_accessible routine | :part:`In Progress` | https://github.com/llvm/llvm-project/pull/138294 |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
| device | omp_get_mapped_ptr routine | :good:`done` | D141545 |
+------------------------------+--------------------------------------------------------------+--------------------------+-----------------------------------------------------------------------+
@@ -449,7 +449,7 @@ implementation. +-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| Clarifications to Fortran map semantics | :none:`unclaimed` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
-| default clause at target construct | :part:`In Progress` | :none:`unclaimed` | |
+| default clause at target construct | :part:`In Progress` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| ref count update use_device_{ptr, addr} | :none:`unclaimed` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
@@ -476,6 +476,8 @@ implementation. +-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
| Local clause on declare target | :part:`In Progress` | :none:`unclaimed` | |
+-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
+| Changes to omp_target_is_accessible | :part:`In Progress` | :part:`In Progress` | |
++-------------------------------------------------------------+---------------------------+---------------------------+--------------------------------------------------------------------------+
OpenMP Extensions
=================
diff --git a/clang/include/clang/AST/Comment.h b/clang/include/clang/AST/Comment.h index dd99067..5ba95c8 100644 --- a/clang/include/clang/AST/Comment.h +++ b/clang/include/clang/AST/Comment.h @@ -19,6 +19,7 @@ #include "clang/Basic/SourceLocation.h" #include "llvm/ADT/ArrayRef.h" #include "llvm/ADT/StringRef.h" +#include "llvm/Support/Compiler.h" namespace clang { class Decl; @@ -119,6 +120,11 @@ protected: LLVM_PREFERRED_TYPE(CommandTraits::KnownCommandIDs) unsigned CommandID : CommandInfo::NumCommandIDBits; + + /// Describes the syntax that was used in a documentation command. + /// Contains values from CommandMarkerKind enum. + LLVM_PREFERRED_TYPE(CommandMarkerKind) + unsigned CommandMarker : 1; }; enum { NumInlineCommandCommentBits = NumInlineContentCommentBits + 3 + CommandInfo::NumCommandIDBits }; @@ -347,6 +353,16 @@ public: InlineCommandCommentBits.RenderKind = llvm::to_underlying(RK); InlineCommandCommentBits.CommandID = CommandID; } + InlineCommandComment(SourceLocation LocBegin, SourceLocation LocEnd, + unsigned CommandID, InlineCommandRenderKind RK, + CommandMarkerKind CommandMarker, ArrayRef<Argument> Args) + : InlineContentComment(CommentKind::InlineCommandComment, LocBegin, + LocEnd), + Args(Args) { + InlineCommandCommentBits.RenderKind = llvm::to_underlying(RK); + InlineCommandCommentBits.CommandID = CommandID; + InlineCommandCommentBits.CommandMarker = llvm::to_underlying(CommandMarker); + } static bool classof(const Comment *C) { return C->getCommentKind() == CommentKind::InlineCommandComment; @@ -384,6 +400,11 @@ public: SourceRange getArgRange(unsigned Idx) const { return Args[Idx].Range; } + + CommandMarkerKind getCommandMarker() const { + return static_cast<CommandMarkerKind>( + InlineCommandCommentBits.CommandMarker); + } }; /// Abstract class for opening and closing HTML tags. HTML tags are always diff --git a/clang/include/clang/AST/CommentSema.h b/clang/include/clang/AST/CommentSema.h index 916d794..3169e2b 100644 --- a/clang/include/clang/AST/CommentSema.h +++ b/clang/include/clang/AST/CommentSema.h @@ -131,6 +131,7 @@ public: InlineCommandComment *actOnInlineCommand(SourceLocation CommandLocBegin, SourceLocation CommandLocEnd, unsigned CommandID, + CommandMarkerKind CommandMarker, ArrayRef<Comment::Argument> Args); InlineContentComment *actOnUnknownCommand(SourceLocation LocBegin, diff --git a/clang/include/clang/Basic/BuiltinsX86.td b/clang/include/clang/Basic/BuiltinsX86.td index a4acc72..3efc0be 100644 --- a/clang/include/clang/Basic/BuiltinsX86.td +++ b/clang/include/clang/Basic/BuiltinsX86.td @@ -93,13 +93,11 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in { } let Features = "sse2" in { - def pmulhw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">; def pavgb128 : X86Builtin<"_Vector<16, char>(_Vector<16, char>, _Vector<16, char>)">; def pavgw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">; def packsswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">; def packssdw128 : X86Builtin<"_Vector<8, short>(_Vector<4, int>, _Vector<4, int>)">; def packuswb128 : X86Builtin<"_Vector<16, char>(_Vector<8, short>, _Vector<8, short>)">; - def pmulhuw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">; def vec_ext_v2di : X86Builtin<"long long int(_Vector<2, long long int>, _Constant int)">; def vec_ext_v4si : X86Builtin<"int(_Vector<4, int>, _Constant int)">; def vec_ext_v4sf : X86Builtin<"float(_Vector<4, float>, _Constant int)">; @@ -107,6 +105,11 @@ let Attributes = [Const, NoThrow, RequiredVectorWidth<128>] in { def vec_set_v8hi : X86Builtin<"_Vector<8, short>(_Vector<8, short>, short, _Constant int)">; } + let Features = "sse2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<128>] in { + def pmulhw128 : X86Builtin<"_Vector<8, short>(_Vector<8, short>, _Vector<8, short>)">; + def pmulhuw128 : X86Builtin<"_Vector<8, unsigned short>(_Vector<8, unsigned short>, _Vector<8, unsigned short>)">; + } + let Features = "sse3" in { foreach Op = ["addsub", "hadd", "hsub"] in { def Op#ps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>)">; @@ -579,8 +582,6 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i def pmovmskb256 : X86Builtin<"int(_Vector<32, char>)">; def pmuldq256 : X86Builtin<"_Vector<4, long long int>(_Vector<8, int>, _Vector<8, int>)">; def pmulhrsw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">; - def pmulhuw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">; - def pmulhw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">; def pmuludq256 : X86Builtin<"_Vector<4, long long int>(_Vector<8, int>, _Vector<8, int>)">; def psadbw256 : X86Builtin<"_Vector<4, long long int>(_Vector<32, char>, _Vector<32, char>)">; def pshufb256 : X86Builtin<"_Vector<32, char>(_Vector<32, char>, _Vector<32, char>)">; @@ -619,6 +620,11 @@ let Features = "avx2", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] i def insert128i256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int>, _Vector<2, long long int>, _Constant int)">; } +let Features = "avx2", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<256>] in { + def pmulhuw256 : X86Builtin<"_Vector<16, unsigned short>(_Vector<16, unsigned short>, _Vector<16, unsigned short>)">; + def pmulhw256 : X86Builtin<"_Vector<16, short>(_Vector<16, short>, _Vector<16, short>)">; +} + let Features = "avx2", Attributes = [NoThrow, RequiredVectorWidth<256>] in { def maskloadd256 : X86Builtin<"_Vector<8, int>(_Vector<8, int const *>, _Vector<8, int>)">; def maskloadq256 : X86Builtin<"_Vector<4, long long int>(_Vector<4, long long int const *>, _Vector<4, long long int>)">; @@ -878,11 +884,6 @@ let Features = "sha", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in def sha256msg2 : X86Builtin<"_Vector<4, int>(_Vector<4, int>, _Vector<4, int>)">; } -let Features = "fma|fma4", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vfmaddps : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>)">; - def vfmaddpd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>)">; -} - let Features = "fma", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { def vfmaddss3 : X86Builtin<"_Vector<4, float>(_Vector<4, float>, _Vector<4, float>, _Vector<4, float>)">; def vfmaddsd3 : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>)">; @@ -898,9 +899,8 @@ let Features = "fma|fma4", Attributes = [NoThrow, Const, RequiredVectorWidth<128 def vfmaddsubpd : X86Builtin<"_Vector<2, double>(_Vector<2, double>, _Vector<2, double>, _Vector<2, double>)">; } -let Features = "fma|fma4", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vfmaddps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Vector<8, float>)">; - def vfmaddpd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Vector<4, double>)">; +let Features = "fma|fma4", + Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { def vfmaddsubps256 : X86Builtin<"_Vector<8, float>(_Vector<8, float>, _Vector<8, float>, _Vector<8, float>)">; def vfmaddsubpd256 : X86Builtin<"_Vector<4, double>(_Vector<4, double>, _Vector<4, double>, _Vector<4, double>)">; } @@ -1429,7 +1429,10 @@ let Features = "avx512bitalg,evex512", Attributes = [NoThrow, Const, RequiredVec let Features = "avx512bw,evex512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { def pmulhrsw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">; - def pmulhuw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">; +} + +let Features = "avx512bw,evex512", Attributes = [NoThrow, Const, Constexpr, RequiredVectorWidth<512>] in { + def pmulhuw512 : X86Builtin<"_Vector<32, unsigned short>(_Vector<32, unsigned short>, _Vector<32, unsigned short>)">; def pmulhw512 : X86Builtin<"_Vector<32, short>(_Vector<32, short>, _Vector<32, short>)">; } @@ -4140,14 +4143,6 @@ let Features = "avx512fp16,evex512", Attributes = [NoThrow, Const, RequiredVecto def vcvtps2phx512_mask : X86Builtin<"_Vector<16, _Float16>(_Vector<16, float>, _Vector<16, _Float16>, unsigned short, _Constant int)">; } -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vfmaddph : X86Builtin<"_Vector<8, _Float16>(_Vector<8, _Float16>, _Vector<8, _Float16>, _Vector<8, _Float16>)">; -} - -let Features = "avx512fp16,avx512vl", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vfmaddph256 : X86Builtin<"_Vector<16, _Float16>(_Vector<16, _Float16>, _Vector<16, _Float16>, _Vector<16, _Float16>)">; -} - let Features = "avx512fp16,evex512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { def vfmaddph512_mask : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Vector<32, _Float16>, unsigned int, _Constant int)">; def vfmaddph512_mask3 : X86Builtin<"_Vector<32, _Float16>(_Vector<32, _Float16>, _Vector<32, _Float16>, _Vector<32, _Float16>, unsigned int, _Constant int)">; @@ -5373,13 +5368,4 @@ let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth< let Features = "avx10.2-512", Attributes = [NoThrow, Const, RequiredVectorWidth<512>] in { def vsqrtbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>)">; - def vfmaddbf16512 : X86Builtin<"_Vector<32, __bf16>(_Vector<32, __bf16>, _Vector<32, __bf16>, _Vector<32, __bf16>)">; -} - -let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<256>] in { - def vfmaddbf16256 : X86Builtin<"_Vector<16, __bf16>(_Vector<16, __bf16>, _Vector<16, __bf16>, _Vector<16, __bf16>)">; -} - -let Features = "avx10.2-256", Attributes = [NoThrow, Const, RequiredVectorWidth<128>] in { - def vfmaddbf16128 : X86Builtin<"_Vector<8, __bf16>(_Vector<8, __bf16>, _Vector<8, __bf16>, _Vector<8, __bf16>)">; } diff --git a/clang/include/clang/Basic/Features.def b/clang/include/clang/Basic/Features.def index 72f2361..c58e3f2 100644 --- a/clang/include/clang/Basic/Features.def +++ b/clang/include/clang/Basic/Features.def @@ -303,6 +303,14 @@ FEATURE(is_trivially_assignable, LangOpts.CPlusPlus) FEATURE(is_trivially_constructible, LangOpts.CPlusPlus) FEATURE(is_trivially_copyable, LangOpts.CPlusPlus) FEATURE(is_union, LangOpts.CPlusPlus) +FEATURE(cfi_sanitizer, LangOpts.Sanitize.hasOneOf(SanitizerKind::CFI)) +FEATURE(cfi_cast_strict_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFICastStrict)) +FEATURE(cfi_derived_cast_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFIDerivedCast)) +FEATURE(cfi_icall_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFIICall)) +FEATURE(cfi_mfcall_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFIMFCall)) +FEATURE(cfi_unrelated_cast_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFIUnrelatedCast)) +FEATURE(cfi_nvcall_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFINVCall)) +FEATURE(cfi_vcall_sanitizer, LangOpts.Sanitize.has(SanitizerKind::CFIVCall)) FEATURE(kcfi, LangOpts.Sanitize.has(SanitizerKind::KCFI)) FEATURE(kcfi_arity, LangOpts.Sanitize.has(SanitizerKind::KCFI)) FEATURE(modules, LangOpts.Modules) diff --git a/clang/include/clang/Basic/arm_sve.td b/clang/include/clang/Basic/arm_sve.td index 07786c6..7513a3e 100644 --- a/clang/include/clang/Basic/arm_sve.td +++ b/clang/include/clang/Basic/arm_sve.td @@ -980,8 +980,8 @@ defm SVCLASTA_N : SVEPerm<"svclasta[_n_{d}]", "sPsd", "aarch64_sve_clasta_n">; defm SVCLASTB : SVEPerm<"svclastb[_{d}]", "dPdd", "aarch64_sve_clastb">; defm SVCLASTB_N : SVEPerm<"svclastb[_n_{d}]", "sPsd", "aarch64_sve_clastb_n">; -let SVETargetGuard = "sve", SMETargetGuard = InvalidMode in { -def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNone, "aarch64_sve_compact">; +let SVETargetGuard = "sve", SMETargetGuard = "sme2p2" in { +def SVCOMPACT : SInst<"svcompact[_{d}]", "dPd", "ilUiUlfd", MergeNone, "aarch64_sve_compact", [VerifyRuntimeMode]>; } // Note: svdup_lane is implemented using the intrinsic for TBL to represent a diff --git a/clang/include/clang/StaticAnalyzer/Core/Checker.h b/clang/include/clang/StaticAnalyzer/Core/Checker.h index 31cc095c..d9a7c00 100644 --- a/clang/include/clang/StaticAnalyzer/Core/Checker.h +++ b/clang/include/clang/StaticAnalyzer/Core/Checker.h @@ -209,8 +209,8 @@ public: class Bind { template <typename CHECKER> static void _checkBind(void *checker, SVal location, SVal val, const Stmt *S, - CheckerContext &C) { - ((const CHECKER *)checker)->checkBind(location, val, S, C); + bool AtDeclInit, CheckerContext &C) { + ((const CHECKER *)checker)->checkBind(location, val, S, AtDeclInit, C); } public: diff --git a/clang/include/clang/StaticAnalyzer/Core/CheckerManager.h b/clang/include/clang/StaticAnalyzer/Core/CheckerManager.h index c8e6f12..bf33ce6 100644 --- a/clang/include/clang/StaticAnalyzer/Core/CheckerManager.h +++ b/clang/include/clang/StaticAnalyzer/Core/CheckerManager.h @@ -338,10 +338,9 @@ public: ExprEngine &Eng); /// Run checkers for binding of a value to a location. - void runCheckersForBind(ExplodedNodeSet &Dst, - const ExplodedNodeSet &Src, - SVal location, SVal val, - const Stmt *S, ExprEngine &Eng, + void runCheckersForBind(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, + SVal location, SVal val, const Stmt *S, + bool AtDeclInit, ExprEngine &Eng, const ProgramPoint &PP); /// Run checkers after taking a control flow edge. @@ -499,8 +498,8 @@ public: using CheckLocationFunc = CheckerFn<void(SVal location, bool isLoad, const Stmt *S, CheckerContext &)>; - using CheckBindFunc = - CheckerFn<void(SVal location, SVal val, const Stmt *S, CheckerContext &)>; + using CheckBindFunc = CheckerFn<void(SVal location, SVal val, const Stmt *S, + bool AtDeclInit, CheckerContext &)>; using CheckBlockEntranceFunc = CheckerFn<void(const BlockEntrance &, CheckerContext &)>; diff --git a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h index fbb3434..2335588 100644 --- a/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h +++ b/clang/include/clang/StaticAnalyzer/Core/PathSensitive/ExprEngine.h @@ -660,7 +660,7 @@ private: /// evalBind - Handle the semantics of binding a value to a specific location. /// This method is used by evalStore, VisitDeclStmt, and others. void evalBind(ExplodedNodeSet &Dst, const Stmt *StoreE, ExplodedNode *Pred, - SVal location, SVal Val, bool atDeclInit = false, + SVal location, SVal Val, bool AtDeclInit = false, const ProgramPoint *PP = nullptr); ProgramStateRef diff --git a/clang/lib/AST/ByteCode/Compiler.cpp b/clang/lib/AST/ByteCode/Compiler.cpp index cc99efa..f656687 100644 --- a/clang/lib/AST/ByteCode/Compiler.cpp +++ b/clang/lib/AST/ByteCode/Compiler.cpp @@ -2063,12 +2063,9 @@ bool Compiler<Emitter>::visitCallArgs(ArrayRef<const Expr *> Args, const FunctionDecl *FuncDecl, bool Activate) { assert(VarScope->getKind() == ScopeKind::Call); - bool HasNonNullAttr = false; llvm::BitVector NonNullArgs; - if (FuncDecl && FuncDecl->hasAttr<NonNullAttr>()) { - HasNonNullAttr = true; + if (FuncDecl && FuncDecl->hasAttr<NonNullAttr>()) NonNullArgs = collectNonNullArgs(FuncDecl, Args); - } unsigned ArgIndex = 0; for (const Expr *Arg : Args) { @@ -2094,7 +2091,7 @@ bool Compiler<Emitter>::visitCallArgs(ArrayRef<const Expr *> Args, return false; } - if (HasNonNullAttr && NonNullArgs[ArgIndex]) { + if (!NonNullArgs.empty() && NonNullArgs[ArgIndex]) { PrimType ArgT = classify(Arg).value_or(PT_Ptr); if (ArgT == PT_Ptr) { if (!this->emitCheckNonNullArg(ArgT, Arg)) diff --git a/clang/lib/AST/ByteCode/Interp.cpp b/clang/lib/AST/ByteCode/Interp.cpp index bc14bd3d..b5c044c 100644 --- a/clang/lib/AST/ByteCode/Interp.cpp +++ b/clang/lib/AST/ByteCode/Interp.cpp @@ -518,7 +518,7 @@ bool CheckNull(InterpState &S, CodePtr OpPC, const Pointer &Ptr, bool CheckRange(InterpState &S, CodePtr OpPC, const Pointer &Ptr, AccessKinds AK) { - if (!Ptr.isOnePastEnd()) + if (!Ptr.isOnePastEnd() && !Ptr.isZeroSizeArray()) return true; if (S.getLangOpts().CPlusPlus) { const SourceInfo &Loc = S.Current->getSource(OpPC); @@ -829,8 +829,6 @@ bool CheckFinalLoad(InterpState &S, CodePtr OpPC, const Pointer &Ptr) { return false; if (!CheckExtern(S, OpPC, Ptr)) return false; - if (!CheckRange(S, OpPC, Ptr, AK_Read)) - return false; if (!CheckActive(S, OpPC, Ptr, AK_Read)) return false; if (!CheckLifetime(S, OpPC, Ptr.getLifetime(), AK_Read)) diff --git a/clang/lib/AST/CommentParser.cpp b/clang/lib/AST/CommentParser.cpp index e61846d..2e5821a 100644 --- a/clang/lib/AST/CommentParser.cpp +++ b/clang/lib/AST/CommentParser.cpp @@ -7,6 +7,7 @@ //===----------------------------------------------------------------------===// #include "clang/AST/CommentParser.h" +#include "clang/AST/Comment.h" #include "clang/AST/CommentCommandTraits.h" #include "clang/AST/CommentSema.h" #include "clang/Basic/CharInfo.h" @@ -569,6 +570,8 @@ BlockCommandComment *Parser::parseBlockCommand() { InlineCommandComment *Parser::parseInlineCommand() { assert(Tok.is(tok::backslash_command) || Tok.is(tok::at_command)); + CommandMarkerKind CMK = + Tok.is(tok::backslash_command) ? CMK_Backslash : CMK_At; const CommandInfo *Info = Traits.getCommandInfo(Tok.getCommandID()); const Token CommandTok = Tok; @@ -580,7 +583,7 @@ InlineCommandComment *Parser::parseInlineCommand() { InlineCommandComment *IC = S.actOnInlineCommand( CommandTok.getLocation(), CommandTok.getEndLocation(), - CommandTok.getCommandID(), Args); + CommandTok.getCommandID(), CMK, Args); if (Args.size() < Info->NumArgs) { Diag(CommandTok.getEndLocation().getLocWithOffset(1), diff --git a/clang/lib/AST/CommentSema.cpp b/clang/lib/AST/CommentSema.cpp index 88520d7..c02983b 100644 --- a/clang/lib/AST/CommentSema.cpp +++ b/clang/lib/AST/CommentSema.cpp @@ -363,12 +363,13 @@ void Sema::actOnTParamCommandFinish(TParamCommandComment *Command, InlineCommandComment * Sema::actOnInlineCommand(SourceLocation CommandLocBegin, SourceLocation CommandLocEnd, unsigned CommandID, + CommandMarkerKind CommandMarker, ArrayRef<Comment::Argument> Args) { StringRef CommandName = Traits.getCommandInfo(CommandID)->Name; - return new (Allocator) - InlineCommandComment(CommandLocBegin, CommandLocEnd, CommandID, - getInlineCommandRenderKind(CommandName), Args); + return new (Allocator) InlineCommandComment( + CommandLocBegin, CommandLocEnd, CommandID, + getInlineCommandRenderKind(CommandName), CommandMarker, Args); } InlineContentComment *Sema::actOnUnknownCommand(SourceLocation LocBegin, diff --git a/clang/lib/AST/ExprConstant.cpp b/clang/lib/AST/ExprConstant.cpp index 3679327..d9c6632 100644 --- a/clang/lib/AST/ExprConstant.cpp +++ b/clang/lib/AST/ExprConstant.cpp @@ -11628,7 +11628,13 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) { return Success(APValue(ResultElements.data(), ResultElements.size()), E); } case Builtin::BI__builtin_elementwise_add_sat: - case Builtin::BI__builtin_elementwise_sub_sat: { + case Builtin::BI__builtin_elementwise_sub_sat: + case clang::X86::BI__builtin_ia32_pmulhuw128: + case clang::X86::BI__builtin_ia32_pmulhuw256: + case clang::X86::BI__builtin_ia32_pmulhuw512: + case clang::X86::BI__builtin_ia32_pmulhw128: + case clang::X86::BI__builtin_ia32_pmulhw256: + case clang::X86::BI__builtin_ia32_pmulhw512: { APValue SourceLHS, SourceRHS; if (!EvaluateAsRValue(Info, E->getArg(0), SourceLHS) || !EvaluateAsRValue(Info, E->getArg(1), SourceRHS)) @@ -11653,6 +11659,18 @@ bool VectorExprEvaluator::VisitCallExpr(const CallExpr *E) { APSInt(LHS.isSigned() ? LHS.ssub_sat(RHS) : LHS.usub_sat(RHS), DestEltTy->isUnsignedIntegerOrEnumerationType()))); break; + case clang::X86::BI__builtin_ia32_pmulhuw128: + case clang::X86::BI__builtin_ia32_pmulhuw256: + case clang::X86::BI__builtin_ia32_pmulhuw512: + ResultElements.push_back(APValue(APSInt(llvm::APIntOps::mulhu(LHS, RHS), + /*isUnsigned=*/true))); + break; + case clang::X86::BI__builtin_ia32_pmulhw128: + case clang::X86::BI__builtin_ia32_pmulhw256: + case clang::X86::BI__builtin_ia32_pmulhw512: + ResultElements.push_back(APValue(APSInt(llvm::APIntOps::mulhs(LHS, RHS), + /*isUnsigned=*/false))); + break; } } diff --git a/clang/lib/CodeGen/CoverageMappingGen.cpp b/clang/lib/CodeGen/CoverageMappingGen.cpp index 38aaceb..05fb137 100644 --- a/clang/lib/CodeGen/CoverageMappingGen.cpp +++ b/clang/lib/CodeGen/CoverageMappingGen.cpp @@ -2269,6 +2269,11 @@ struct CounterCoverageMappingBuilder // Track LHS True/False Decision. const auto DecisionLHS = MCDCBuilder.pop(); + if (auto Gap = + findGapAreaBetween(getEnd(E->getLHS()), getStart(E->getRHS()))) { + fillGapAreaWithCount(Gap->getBegin(), Gap->getEnd(), getRegionCounter(E)); + } + // Counter tracks the right hand side of a logical and operator. extendRegion(E->getRHS()); propagateCounts(getRegionCounter(E), E->getRHS()); @@ -2330,6 +2335,11 @@ struct CounterCoverageMappingBuilder // Track LHS True/False Decision. const auto DecisionLHS = MCDCBuilder.pop(); + if (auto Gap = + findGapAreaBetween(getEnd(E->getLHS()), getStart(E->getRHS()))) { + fillGapAreaWithCount(Gap->getBegin(), Gap->getEnd(), getRegionCounter(E)); + } + // Counter tracks the right hand side of a logical or operator. extendRegion(E->getRHS()); propagateCounts(getRegionCounter(E), E->getRHS()); diff --git a/clang/lib/CodeGen/TargetBuiltins/X86.cpp b/clang/lib/CodeGen/TargetBuiltins/X86.cpp index e23d19d..b508709 100644 --- a/clang/lib/CodeGen/TargetBuiltins/X86.cpp +++ b/clang/lib/CodeGen/TargetBuiltins/X86.cpp @@ -1051,18 +1051,9 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID, case X86::BI__builtin_ia32_vfmsubsd3_mask3: return EmitScalarFMAExpr(*this, E, Ops, Ops[2], /*ZeroMask*/ false, 2, /*NegAcc*/ true); - case X86::BI__builtin_ia32_vfmaddph: - case X86::BI__builtin_ia32_vfmaddps: - case X86::BI__builtin_ia32_vfmaddpd: - case X86::BI__builtin_ia32_vfmaddph256: - case X86::BI__builtin_ia32_vfmaddps256: - case X86::BI__builtin_ia32_vfmaddpd256: case X86::BI__builtin_ia32_vfmaddph512_mask: case X86::BI__builtin_ia32_vfmaddph512_maskz: case X86::BI__builtin_ia32_vfmaddph512_mask3: - case X86::BI__builtin_ia32_vfmaddbf16128: - case X86::BI__builtin_ia32_vfmaddbf16256: - case X86::BI__builtin_ia32_vfmaddbf16512: case X86::BI__builtin_ia32_vfmaddps512_mask: case X86::BI__builtin_ia32_vfmaddps512_maskz: case X86::BI__builtin_ia32_vfmaddps512_mask3: diff --git a/clang/lib/Headers/avx10_2_512bf16intrin.h b/clang/lib/Headers/avx10_2_512bf16intrin.h index 75290d2..95e9bd7a 100644 --- a/clang/lib/Headers/avx10_2_512bf16intrin.h +++ b/clang/lib/Headers/avx10_2_512bf16intrin.h @@ -441,8 +441,8 @@ _mm512_maskz_sqrt_pbh(__mmask32 __U, __m512bh __A) { static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_fmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { - return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B, - (__v32bf)__C); + return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B, + (__v32bf)__C); } static __inline__ __m512bh __DEFAULT_FN_ATTRS512 @@ -469,8 +469,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmadd_pbh( static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_fmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { - return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, (__v32bf)__B, - -(__v32bf)__C); + return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, (__v32bf)__B, + -(__v32bf)__C); } static __inline__ __m512bh __DEFAULT_FN_ATTRS512 @@ -497,8 +497,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fmsub_pbh( static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_fnmadd_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { - return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B, - (__v32bf)__C); + return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B, + (__v32bf)__C); } static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmadd_pbh( @@ -527,8 +527,8 @@ static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_maskz_fnmadd_pbh( static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_fnmsub_pbh(__m512bh __A, __m512bh __B, __m512bh __C) { - return (__m512bh)__builtin_ia32_vfmaddbf16512((__v32bf)__A, -(__v32bf)__B, - -(__v32bf)__C); + return (__m512bh)__builtin_elementwise_fma((__v32bf)__A, -(__v32bf)__B, + -(__v32bf)__C); } static __inline__ __m512bh __DEFAULT_FN_ATTRS512 _mm512_mask_fnmsub_pbh( diff --git a/clang/lib/Headers/avx10_2bf16intrin.h b/clang/lib/Headers/avx10_2bf16intrin.h index 66797ae..0c7f381 100644 --- a/clang/lib/Headers/avx10_2bf16intrin.h +++ b/clang/lib/Headers/avx10_2bf16intrin.h @@ -852,8 +852,8 @@ _mm_maskz_sqrt_pbh(__mmask8 __U, __m128bh __A) { static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_fmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { - return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B, - (__v16bf)__C); + return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B, + (__v16bf)__C); } static __inline__ __m256bh __DEFAULT_FN_ATTRS256 @@ -880,8 +880,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_pbh( static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_fmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { - return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, (__v16bf)__B, - -(__v16bf)__C); + return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, (__v16bf)__B, + -(__v16bf)__C); } static __inline__ __m256bh __DEFAULT_FN_ATTRS256 @@ -908,8 +908,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_pbh( static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_fnmadd_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { - return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B, - (__v16bf)__C); + return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B, + (__v16bf)__C); } static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_pbh( @@ -938,8 +938,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_pbh( static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_fnmsub_pbh(__m256bh __A, __m256bh __B, __m256bh __C) { - return (__m256bh)__builtin_ia32_vfmaddbf16256((__v16bf)__A, -(__v16bf)__B, - -(__v16bf)__C); + return (__m256bh)__builtin_elementwise_fma((__v16bf)__A, -(__v16bf)__B, + -(__v16bf)__C); } static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_pbh( @@ -969,8 +969,8 @@ static __inline__ __m256bh __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_pbh( static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmadd_pbh(__m128bh __A, __m128bh __B, __m128bh __C) { - return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B, - (__v8bf)__C); + return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B, + (__v8bf)__C); } static __inline__ __m128bh __DEFAULT_FN_ATTRS128 @@ -997,8 +997,8 @@ _mm_maskz_fmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fmsub_pbh(__m128bh __A, __m128bh __B, __m128bh __C) { - return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, (__v8bf)__B, - -(__v8bf)__C); + return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, (__v8bf)__B, + -(__v8bf)__C); } static __inline__ __m128bh __DEFAULT_FN_ATTRS128 @@ -1025,8 +1025,8 @@ _mm_maskz_fmsub_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmadd_pbh(__m128bh __A, __m128bh __B, __m128bh __C) { - return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B, - (__v8bf)__C); + return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B, + (__v8bf)__C); } static __inline__ __m128bh __DEFAULT_FN_ATTRS128 @@ -1053,8 +1053,8 @@ _mm_maskz_fnmadd_pbh(__mmask8 __U, __m128bh __A, __m128bh __B, __m128bh __C) { static __inline__ __m128bh __DEFAULT_FN_ATTRS128 _mm_fnmsub_pbh(__m128bh __A, __m128bh __B, __m128bh __C) { - return (__m128bh)__builtin_ia32_vfmaddbf16128((__v8bf)__A, -(__v8bf)__B, - -(__v8bf)__C); + return (__m128bh)__builtin_elementwise_fma((__v8bf)__A, -(__v8bf)__B, + -(__v8bf)__C); } static __inline__ __m128bh __DEFAULT_FN_ATTRS128 diff --git a/clang/lib/Headers/avx2intrin.h b/clang/lib/Headers/avx2intrin.h index 3c3a3d1..55e7102 100644 --- a/clang/lib/Headers/avx2intrin.h +++ b/clang/lib/Headers/avx2intrin.h @@ -1729,10 +1729,10 @@ _mm256_mulhrs_epi16(__m256i __a, __m256i __b) /// \param __b /// A 256-bit vector of [16 x i16] containing one of the source operands. /// \returns A 256-bit vector of [16 x i16] containing the products. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mulhi_epu16(__m256i __a, __m256i __b) { - return (__m256i)__builtin_ia32_pmulhuw256((__v16hi)__a, (__v16hi)__b); + return (__m256i)__builtin_ia32_pmulhuw256((__v16hu)__a, (__v16hu)__b); } /// Multiplies signed 16-bit integer elements of two 256-bit vectors of @@ -1748,7 +1748,7 @@ _mm256_mulhi_epu16(__m256i __a, __m256i __b) /// \param __b /// A 256-bit vector of [16 x i16] containing one of the source operands. /// \returns A 256-bit vector of [16 x i16] containing the products. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mulhi_epi16(__m256i __a, __m256i __b) { return (__m256i)__builtin_ia32_pmulhw256((__v16hi)__a, (__v16hi)__b); @@ -1767,7 +1767,7 @@ _mm256_mulhi_epi16(__m256i __a, __m256i __b) /// \param __b /// A 256-bit vector of [16 x i16] containing one of the source operands. /// \returns A 256-bit vector of [16 x i16] containing the products. -static __inline__ __m256i __DEFAULT_FN_ATTRS256 +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_mullo_epi16(__m256i __a, __m256i __b) { return (__m256i)((__v16hu)__a * (__v16hu)__b); diff --git a/clang/lib/Headers/avx512bitalgintrin.h b/clang/lib/Headers/avx512bitalgintrin.h index 3c446b3..9a1ff8f3 100644 --- a/clang/lib/Headers/avx512bitalgintrin.h +++ b/clang/lib/Headers/avx512bitalgintrin.h @@ -20,7 +20,13 @@ __target__("avx512bitalg,evex512"), \ __min_vector_width__(512))) -static __inline__ __m512i __DEFAULT_FN_ATTRS +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr +#else +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS +#endif + +static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_popcnt_epi16(__m512i __A) { return (__m512i)__builtin_elementwise_popcount((__v32hu)__A); @@ -42,7 +48,7 @@ _mm512_maskz_popcnt_epi16(__mmask32 __U, __m512i __B) __B); } -static __inline__ __m512i __DEFAULT_FN_ATTRS +static __inline__ __m512i __DEFAULT_FN_ATTRS_CONSTEXPR _mm512_popcnt_epi8(__m512i __A) { return (__m512i)__builtin_elementwise_popcount((__v64qu)__A); @@ -80,7 +86,7 @@ _mm512_bitshuffle_epi64_mask(__m512i __A, __m512i __B) __B); } - #undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS_CONSTEXPR #endif diff --git a/clang/lib/Headers/avx512bwintrin.h b/clang/lib/Headers/avx512bwintrin.h index c854720..233d4a6 100644 --- a/clang/lib/Headers/avx512bwintrin.h +++ b/clang/lib/Headers/avx512bwintrin.h @@ -25,6 +25,14 @@ typedef unsigned long long __mmask64; __attribute__((__always_inline__, __nodebug__, \ __target__("avx512bw,no-evex512"))) +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 constexpr +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS constexpr +#else +#define __DEFAULT_FN_ATTRS512_CONSTEXPR __DEFAULT_FN_ATTRS512 +#define __DEFAULT_FN_ATTRS_CONSTEXPR __DEFAULT_FN_ATTRS +#endif + static __inline __mmask32 __DEFAULT_FN_ATTRS _knot_mask32(__mmask32 __M) { @@ -438,7 +446,7 @@ _mm512_maskz_sub_epi16(__mmask32 __U, __m512i __A, __m512i __B) { (__v32hi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_mullo_epi16 (__m512i __A, __m512i __B) { return (__m512i) ((__v32hu) __A * (__v32hu) __B); } @@ -1082,7 +1090,7 @@ _mm512_maskz_mulhrs_epi16(__mmask32 __U, __m512i __A, __m512i __B) (__v32hi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_mulhi_epi16(__m512i __A, __m512i __B) { return (__m512i)__builtin_ia32_pmulhw512((__v32hi) __A, (__v32hi) __B); @@ -1105,10 +1113,10 @@ _mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) (__v32hi)_mm512_setzero_si512()); } -static __inline__ __m512i __DEFAULT_FN_ATTRS512 +static __inline__ __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_mulhi_epu16(__m512i __A, __m512i __B) { - return (__m512i)__builtin_ia32_pmulhuw512((__v32hi) __A, (__v32hi) __B); + return (__m512i)__builtin_ia32_pmulhuw512((__v32hu) __A, (__v32hu) __B); } static __inline__ __m512i __DEFAULT_FN_ATTRS512 @@ -2010,5 +2018,7 @@ _mm512_sad_epu8 (__m512i __A, __m512i __B) #undef __DEFAULT_FN_ATTRS512 #undef __DEFAULT_FN_ATTRS +#undef __DEFAULT_FN_ATTRS512_CONSTEXPR +#undef __DEFAULT_FN_ATTRS_CONSTEXPR #endif diff --git a/clang/lib/Headers/avx512fintrin.h b/clang/lib/Headers/avx512fintrin.h index e3bc71e..95b80cc 100644 --- a/clang/lib/Headers/avx512fintrin.h +++ b/clang/lib/Headers/avx512fintrin.h @@ -277,20 +277,20 @@ _mm512_setzero_pd(void) { return __extension__(__m512d){0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, 0.0}; } -static __inline __m512 __DEFAULT_FN_ATTRS512 +static __inline __m512 __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set1_ps(float __w) { return __extension__ (__m512){ __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w, __w }; } -static __inline __m512d __DEFAULT_FN_ATTRS512 +static __inline __m512d __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set1_pd(double __w) { return __extension__ (__m512d){ __w, __w, __w, __w, __w, __w, __w, __w }; } -static __inline __m512i __DEFAULT_FN_ATTRS512 +static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set1_epi8(char __w) { return __extension__ (__m512i)(__v64qi){ @@ -304,7 +304,7 @@ _mm512_set1_epi8(char __w) __w, __w, __w, __w, __w, __w, __w, __w }; } -static __inline __m512i __DEFAULT_FN_ATTRS512 +static __inline __m512i __DEFAULT_FN_ATTRS512_CONSTEXPR _mm512_set1_epi16(short __w) { return __extension__ (__m512i)(__v32hi){ diff --git a/clang/lib/Headers/avx512vlbitalgintrin.h b/clang/lib/Headers/avx512vlbitalgintrin.h index 1b01fe0..739e78a 100644 --- a/clang/lib/Headers/avx512vlbitalgintrin.h +++ b/clang/lib/Headers/avx512vlbitalgintrin.h @@ -24,7 +24,15 @@ __target__("avx512vl,avx512bitalg,no-evex512"), \ __min_vector_width__(256))) -static __inline__ __m256i __DEFAULT_FN_ATTRS256 +#if defined(__cplusplus) && (__cplusplus >= 201103L) +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 constexpr +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 constexpr +#else +#define __DEFAULT_FN_ATTRS128_CONSTEXPR __DEFAULT_FN_ATTRS128 +#define __DEFAULT_FN_ATTRS256_CONSTEXPR __DEFAULT_FN_ATTRS256 +#endif + +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_popcnt_epi16(__m256i __A) { return (__m256i)__builtin_elementwise_popcount((__v16hu)__A); @@ -46,7 +54,7 @@ _mm256_maskz_popcnt_epi16(__mmask16 __U, __m256i __B) __B); } -static __inline__ __m128i __DEFAULT_FN_ATTRS128 +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_popcnt_epi16(__m128i __A) { return (__m128i)__builtin_elementwise_popcount((__v8hu)__A); @@ -68,7 +76,7 @@ _mm_maskz_popcnt_epi16(__mmask8 __U, __m128i __B) __B); } -static __inline__ __m256i __DEFAULT_FN_ATTRS256 +static __inline__ __m256i __DEFAULT_FN_ATTRS256_CONSTEXPR _mm256_popcnt_epi8(__m256i __A) { return (__m256i)__builtin_elementwise_popcount((__v32qu)__A); @@ -90,7 +98,7 @@ _mm256_maskz_popcnt_epi8(__mmask32 __U, __m256i __B) __B); } -static __inline__ __m128i __DEFAULT_FN_ATTRS128 +static __inline__ __m128i __DEFAULT_FN_ATTRS128_CONSTEXPR _mm_popcnt_epi8(__m128i __A) { return (__m128i)__builtin_elementwise_popcount((__v16qu)__A); @@ -147,5 +155,7 @@ _mm_bitshuffle_epi64_mask(__m128i __A, __m128i __B) #undef __DEFAULT_FN_ATTRS128 #undef __DEFAULT_FN_ATTRS256 +#undef __DEFAULT_FN_ATTRS128_CONSTEXPR +#undef __DEFAULT_FN_ATTRS256_CONSTEXPR #endif diff --git a/clang/lib/Headers/avx512vlfp16intrin.h b/clang/lib/Headers/avx512vlfp16intrin.h index a12acb7..1f8cca7 100644 --- a/clang/lib/Headers/avx512vlfp16intrin.h +++ b/clang/lib/Headers/avx512vlfp16intrin.h @@ -1419,8 +1419,8 @@ _mm256_maskz_cvtxps_ph(__mmask8 __U, __m256 __A) { static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmadd_ph(__m128h __A, __m128h __B, __m128h __C) { - return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, - (__v8hf)__C); + return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, + (__v8hf)__C); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A, @@ -1429,7 +1429,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ph(__m128h __A, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), (__v8hf)__A); } @@ -1437,7 +1437,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask3_fmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), (__v8hf)__C); } @@ -1445,15 +1445,15 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_fmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, (__v8hf)__C), (__v8hf)_mm_setzero_ph()); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fmsub_ph(__m128h __A, __m128h __B, __m128h __C) { - return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, - -(__v8hf)__C); + return (__m128h)__builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, + -(__v8hf)__C); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ph(__m128h __A, @@ -1476,7 +1476,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask3_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), (__v8hf)__C); } @@ -1484,7 +1484,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_fnmadd_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, (__v8hf)__C), (__v8hf)_mm_setzero_ph()); } @@ -1492,22 +1492,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_maskz_fnmsub_ph(__mmask8 __U, __m128h __A, __m128h __B, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + __builtin_elementwise_fma(-(__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), (__v8hf)_mm_setzero_ph()); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmadd_ph(__m256h __A, __m256h __B, __m256h __C) { - return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, - (__v16hf)__C); + return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, + (__v16hf)__C); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask_fmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), (__v16hf)__A); } @@ -1515,7 +1515,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask3_fmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), (__v16hf)__C); } @@ -1523,22 +1523,22 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, (__v16hf)__C), (__v16hf)_mm256_setzero_ph()); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fmsub_ph(__m256h __A, __m256h __B, __m256h __C) { - return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, - -(__v16hf)__C); + return (__m256h)__builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, + -(__v16hf)__C); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask_fmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), (__v16hf)__A); } @@ -1546,7 +1546,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), (__v16hf)_mm256_setzero_ph()); } @@ -1554,7 +1554,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), (__v16hf)__C); } @@ -1562,7 +1562,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, (__v16hf)__C), (__v16hf)_mm256_setzero_ph()); } @@ -1570,7 +1570,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_ph(__mmask16 __U, __m256h __A, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma(-(__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), (__v16hf)_mm256_setzero_ph()); } @@ -1684,7 +1684,7 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask3_fmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, (__v8hf)__B, -(__v8hf)__C), (__v8hf)__C); } @@ -1692,7 +1692,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask3_fmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, (__v16hf)__B, -(__v16hf)__C), (__v16hf)__C); } @@ -1715,45 +1715,45 @@ _mm256_mask3_fmsubadd_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmadd_ph(__m128h __A, __m128h __B, __m128h __C) { - return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, - (__v8hf)__C); + return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, + (__v8hf)__C); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fnmadd_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, (__v8hf)__C), (__v8hf)__A); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ph(__m256h __A, __m256h __B, __m256h __C) { - return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, - (__v16hf)__C); + return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, + (__v16hf)__C); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, (__v16hf)__C), (__v16hf)__A); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C) { - return (__m128h)__builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, - -(__v8hf)__C); + return (__m128h)__builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, + -(__v8hf)__C); } static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask_fnmsub_ph(__m128h __A, __mmask8 __U, __m128h __B, __m128h __C) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), (__v8hf)__A); } @@ -1761,22 +1761,22 @@ static __inline__ __m128h __DEFAULT_FN_ATTRS128 _mm_mask3_fnmsub_ph(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) { return (__m128h)__builtin_ia32_selectph_128( (__mmask8)__U, - __builtin_ia32_vfmaddph((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), + __builtin_elementwise_fma((__v8hf)__A, -(__v8hf)__B, -(__v8hf)__C), (__v8hf)__C); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C) { - return (__m256h)__builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, - -(__v16hf)__C); + return (__m256h)__builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, + -(__v16hf)__C); } static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_ph(__m256h __A, __mmask16 __U, __m256h __B, __m256h __C) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), (__v16hf)__A); } @@ -1784,7 +1784,7 @@ static __inline__ __m256h __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmsub_ph(__m256h __A, __m256h __B, __m256h __C, __mmask16 __U) { return (__m256h)__builtin_ia32_selectph_256( (__mmask16)__U, - __builtin_ia32_vfmaddph256((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), + __builtin_elementwise_fma((__v16hf)__A, -(__v16hf)__B, -(__v16hf)__C), (__v16hf)__C); } diff --git a/clang/lib/Headers/avx512vlintrin.h b/clang/lib/Headers/avx512vlintrin.h index 2a5f7b4..cbad39a 100644 --- a/clang/lib/Headers/avx512vlintrin.h +++ b/clang/lib/Headers/avx512vlintrin.h @@ -899,321 +899,289 @@ _mm_maskz_xor_epi64(__mmask8 __U, __m128i __A, __m128i __B) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - (__v2df) __C), - (__v2df) __A); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, (__v2df)__C), + (__v2df)__A); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - (__v2df) __C), - (__v2df) __C); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, (__v2df)__C), + (__v2df)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - (__v2df) __C), - (__v2df)_mm_setzero_pd()); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, (__v2df)__C), + (__v2df)_mm_setzero_pd()); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - -(__v2df) __C), - (__v2df) __A); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, -(__v2df)__C), + (__v2df)__A); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - -(__v2df) __C), - (__v2df)_mm_setzero_pd()); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, -(__v2df)__C), + (__v2df)_mm_setzero_pd()); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd (-(__v2df) __A, - (__v2df) __B, - (__v2df) __C), - (__v2df) __C); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, (__v2df)__C), + (__v2df)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd (-(__v2df) __A, - (__v2df) __B, - (__v2df) __C), - (__v2df)_mm_setzero_pd()); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, (__v2df)__C), + (__v2df)_mm_setzero_pd()); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd (-(__v2df) __A, - (__v2df) __B, - -(__v2df) __C), - (__v2df)_mm_setzero_pd()); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, -(__v2df)__C), + (__v2df)_mm_setzero_pd()); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - (__v4df) __C), - (__v4df) __A); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, (__v4df)__C), + (__v4df)__A); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - (__v4df) __C), - (__v4df) __C); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, (__v4df)__C), + (__v4df)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - (__v4df) __C), - (__v4df)_mm256_setzero_pd()); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, (__v4df)__C), + (__v4df)_mm256_setzero_pd()); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - -(__v4df) __C), - (__v4df) __A); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, -(__v4df)__C), + (__v4df)__A); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - -(__v4df) __C), - (__v4df)_mm256_setzero_pd()); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, -(__v4df)__C), + (__v4df)_mm256_setzero_pd()); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 (-(__v4df) __A, - (__v4df) __B, - (__v4df) __C), - (__v4df) __C); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, (__v4df)__C), + (__v4df)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 (-(__v4df) __A, - (__v4df) __B, - (__v4df) __C), - (__v4df)_mm256_setzero_pd()); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, (__v4df)__C), + (__v4df)_mm256_setzero_pd()); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 (-(__v4df) __A, - (__v4df) __B, - -(__v4df) __C), - (__v4df)_mm256_setzero_pd()); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, -(__v4df)__C), + (__v4df)_mm256_setzero_pd()); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - (__v4sf) __C), - (__v4sf) __A); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, (__v4sf)__C), + (__v4sf)__A); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - (__v4sf) __C), - (__v4sf) __C); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, (__v4sf)__C), + (__v4sf)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - (__v4sf) __C), - (__v4sf)_mm_setzero_ps()); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, (__v4sf)__C), + (__v4sf)_mm_setzero_ps()); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - -(__v4sf) __C), - (__v4sf) __A); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C), + (__v4sf)__A); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - -(__v4sf) __C), - (__v4sf)_mm_setzero_ps()); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C), + (__v4sf)_mm_setzero_ps()); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps (-(__v4sf) __A, - (__v4sf) __B, - (__v4sf) __C), - (__v4sf) __C); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C), + (__v4sf)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps (-(__v4sf) __A, - (__v4sf) __B, - (__v4sf) __C), - (__v4sf)_mm_setzero_ps()); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C), + (__v4sf)_mm_setzero_ps()); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps (-(__v4sf) __A, - (__v4sf) __B, - -(__v4sf) __C), - (__v4sf)_mm_setzero_ps()); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C), + (__v4sf)_mm_setzero_ps()); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - (__v8sf) __C), - (__v8sf) __A); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, (__v8sf)__C), + (__v8sf)__A); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - (__v8sf) __C), - (__v8sf) __C); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, (__v8sf)__C), + (__v8sf)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - (__v8sf) __C), - (__v8sf)_mm256_setzero_ps()); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, (__v8sf)__C), + (__v8sf)_mm256_setzero_ps()); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - -(__v8sf) __C), - (__v8sf) __A); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C), + (__v8sf)__A); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - -(__v8sf) __C), - (__v8sf)_mm256_setzero_ps()); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C), + (__v8sf)_mm256_setzero_ps()); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 (-(__v8sf) __A, - (__v8sf) __B, - (__v8sf) __C), - (__v8sf) __C); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C), + (__v8sf)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 (-(__v8sf) __A, - (__v8sf) __B, - (__v8sf) __C), - (__v8sf)_mm256_setzero_ps()); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C), + (__v8sf)_mm256_setzero_ps()); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 (-(__v8sf) __A, - (__v8sf) __B, - -(__v8sf) __C), - (__v8sf)_mm256_setzero_ps()); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C), + (__v8sf)_mm256_setzero_ps()); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 @@ -1420,41 +1388,37 @@ _mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - (__v2df) __B, - -(__v2df) __C), - (__v2df) __C); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, (__v2df)__B, -(__v2df)__C), + (__v2df)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - (__v4df) __B, - -(__v4df) __C), - (__v4df) __C); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, (__v4df)__B, -(__v4df)__C), + (__v4df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - (__v4sf) __B, - -(__v4sf) __C), - (__v4sf) __C); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C), + (__v4sf)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - (__v8sf) __B, - -(__v8sf) __C), - (__v8sf) __C); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C), + (__v8sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 @@ -1500,121 +1464,109 @@ _mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - -(__v2df) __B, - (__v2df) __C), - (__v2df) __A); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, -(__v2df)__B, (__v2df)__C), + (__v2df)__A); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - -(__v4df) __B, - (__v4df) __C), - (__v4df) __A); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, -(__v4df)__B, (__v4df)__C), + (__v4df)__A); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - -(__v4sf) __B, - (__v4sf) __C), - (__v4sf) __A); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, -(__v4sf)__B, (__v4sf)__C), + (__v4sf)__A); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - -(__v8sf) __B, - (__v8sf) __C), - (__v8sf) __A); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, -(__v8sf)__B, (__v8sf)__C), + (__v8sf)__A); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - -(__v2df) __B, - -(__v2df) __C), - (__v2df) __A); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, -(__v2df)__B, -(__v2df)__C), + (__v2df)__A); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - return (__m128d) __builtin_ia32_selectpd_128((__mmask8) __U, - __builtin_ia32_vfmaddpd ((__v2df) __A, - -(__v2df) __B, - -(__v2df) __C), - (__v2df) __C); + return (__m128d)__builtin_ia32_selectpd_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v2df)__A, -(__v2df)__B, -(__v2df)__C), + (__v2df)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - -(__v4df) __B, - -(__v4df) __C), - (__v4df) __A); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, -(__v4df)__B, -(__v4df)__C), + (__v4df)__A); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - return (__m256d) __builtin_ia32_selectpd_256((__mmask8) __U, - __builtin_ia32_vfmaddpd256 ((__v4df) __A, - -(__v4df) __B, - -(__v4df) __C), - (__v4df) __C); + return (__m256d)__builtin_ia32_selectpd_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v4df)__A, -(__v4df)__B, -(__v4df)__C), + (__v4df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - -(__v4sf) __B, - -(__v4sf) __C), - (__v4sf) __A); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, -(__v4sf)__B, -(__v4sf)__C), + (__v4sf)__A); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - return (__m128) __builtin_ia32_selectps_128((__mmask8) __U, - __builtin_ia32_vfmaddps ((__v4sf) __A, - -(__v4sf) __B, - -(__v4sf) __C), - (__v4sf) __C); + return (__m128)__builtin_ia32_selectps_128( + (__mmask8)__U, + __builtin_elementwise_fma((__v4sf)__A, -(__v4sf)__B, -(__v4sf)__C), + (__v4sf)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - -(__v8sf) __B, - -(__v8sf) __C), - (__v8sf) __A); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, -(__v8sf)__B, -(__v8sf)__C), + (__v8sf)__A); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - return (__m256) __builtin_ia32_selectps_256((__mmask8) __U, - __builtin_ia32_vfmaddps256 ((__v8sf) __A, - -(__v8sf) __B, - -(__v8sf) __C), - (__v8sf) __C); + return (__m256)__builtin_ia32_selectps_256( + (__mmask8)__U, + __builtin_elementwise_fma((__v8sf)__A, -(__v8sf)__B, -(__v8sf)__C), + (__v8sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 diff --git a/clang/lib/Headers/avxintrin.h b/clang/lib/Headers/avxintrin.h index 2be4f68..5a6d48b 100644 --- a/clang/lib/Headers/avxintrin.h +++ b/clang/lib/Headers/avxintrin.h @@ -4367,7 +4367,7 @@ _mm256_setzero_si256(void) { /// A 256-bit floating-point vector of [4 x double]. /// \returns A 256-bit floating-point vector of [8 x float] containing the same /// bitwise pattern as the parameter. -static __inline __m256 __DEFAULT_FN_ATTRS +static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castpd_ps(__m256d __a) { return (__m256)__a; @@ -4384,7 +4384,7 @@ _mm256_castpd_ps(__m256d __a) /// A 256-bit floating-point vector of [4 x double]. /// \returns A 256-bit integer vector containing the same bitwise pattern as the /// parameter. -static __inline __m256i __DEFAULT_FN_ATTRS +static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castpd_si256(__m256d __a) { return (__m256i)__a; @@ -4401,7 +4401,7 @@ _mm256_castpd_si256(__m256d __a) /// A 256-bit floating-point vector of [8 x float]. /// \returns A 256-bit floating-point vector of [4 x double] containing the same /// bitwise pattern as the parameter. -static __inline __m256d __DEFAULT_FN_ATTRS +static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castps_pd(__m256 __a) { return (__m256d)__a; @@ -4418,7 +4418,7 @@ _mm256_castps_pd(__m256 __a) /// A 256-bit floating-point vector of [8 x float]. /// \returns A 256-bit integer vector containing the same bitwise pattern as the /// parameter. -static __inline __m256i __DEFAULT_FN_ATTRS +static __inline __m256i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castps_si256(__m256 __a) { return (__m256i)__a; @@ -4435,7 +4435,7 @@ _mm256_castps_si256(__m256 __a) /// A 256-bit integer vector. /// \returns A 256-bit floating-point vector of [8 x float] containing the same /// bitwise pattern as the parameter. -static __inline __m256 __DEFAULT_FN_ATTRS +static __inline __m256 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castsi256_ps(__m256i __a) { return (__m256)__a; @@ -4452,7 +4452,7 @@ _mm256_castsi256_ps(__m256i __a) /// A 256-bit integer vector. /// \returns A 256-bit floating-point vector of [4 x double] containing the same /// bitwise pattern as the parameter. -static __inline __m256d __DEFAULT_FN_ATTRS +static __inline __m256d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castsi256_pd(__m256i __a) { return (__m256d)__a; @@ -4469,7 +4469,7 @@ _mm256_castsi256_pd(__m256i __a) /// A 256-bit floating-point vector of [4 x double]. /// \returns A 128-bit floating-point vector of [2 x double] containing the /// lower 128 bits of the parameter. -static __inline __m128d __DEFAULT_FN_ATTRS +static __inline __m128d __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castpd256_pd128(__m256d __a) { return __builtin_shufflevector((__v4df)__a, (__v4df)__a, 0, 1); @@ -4486,7 +4486,7 @@ _mm256_castpd256_pd128(__m256d __a) /// A 256-bit floating-point vector of [8 x float]. /// \returns A 128-bit floating-point vector of [4 x float] containing the /// lower 128 bits of the parameter. -static __inline __m128 __DEFAULT_FN_ATTRS +static __inline __m128 __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castps256_ps128(__m256 __a) { return __builtin_shufflevector((__v8sf)__a, (__v8sf)__a, 0, 1, 2, 3); @@ -4502,7 +4502,7 @@ _mm256_castps256_ps128(__m256 __a) /// A 256-bit integer vector. /// \returns A 128-bit integer vector containing the lower 128 bits of the /// parameter. -static __inline __m128i __DEFAULT_FN_ATTRS +static __inline __m128i __DEFAULT_FN_ATTRS_CONSTEXPR _mm256_castsi256_si128(__m256i __a) { return __builtin_shufflevector((__v4di)__a, (__v4di)__a, 0, 1); diff --git a/clang/lib/Headers/emmintrin.h b/clang/lib/Headers/emmintrin.h index 770bb5c..60d2000 100644 --- a/clang/lib/Headers/emmintrin.h +++ b/clang/lib/Headers/emmintrin.h @@ -2394,8 +2394,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_min_epu8(__m128i __a, /// A 128-bit signed [8 x i16] vector. /// \returns A 128-bit signed [8 x i16] vector containing the upper 16 bits of /// each of the eight 32-bit products. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_mulhi_epi16(__m128i __a, __m128i __b) { return (__m128i)__builtin_ia32_pmulhw128((__v8hi)__a, (__v8hi)__b); } @@ -2413,9 +2413,9 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epi16(__m128i __a, /// A 128-bit unsigned [8 x i16] vector. /// \returns A 128-bit unsigned [8 x i16] vector containing the upper 16 bits /// of each of the eight 32-bit products. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a, - __m128i __b) { - return (__m128i)__builtin_ia32_pmulhuw128((__v8hi)__a, (__v8hi)__b); +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_mulhi_epu16(__m128i __a, __m128i __b) { + return (__m128i)__builtin_ia32_pmulhuw128((__v8hu)__a, (__v8hu)__b); } /// Multiplies the corresponding elements of two signed [8 x i16] @@ -2432,8 +2432,8 @@ static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mulhi_epu16(__m128i __a, /// A 128-bit signed [8 x i16] vector. /// \returns A 128-bit signed [8 x i16] vector containing the lower 16 bits of /// each of the eight 32-bit products. -static __inline__ __m128i __DEFAULT_FN_ATTRS _mm_mullo_epi16(__m128i __a, - __m128i __b) { +static __inline__ __m128i __DEFAULT_FN_ATTRS_CONSTEXPR +_mm_mullo_epi16(__m128i __a, __m128i __b) { return (__m128i)((__v8hu)__a * (__v8hu)__b); } diff --git a/clang/lib/Headers/fma4intrin.h b/clang/lib/Headers/fma4intrin.h index 694801b..69977fb 100644 --- a/clang/lib/Headers/fma4intrin.h +++ b/clang/lib/Headers/fma4intrin.h @@ -23,13 +23,15 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_macc_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); + return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_macc_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); + return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, + (__v2df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 @@ -47,13 +49,15 @@ _mm_macc_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_msub_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); + return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, + -(__v4sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_msub_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); + return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, + -(__v2df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 @@ -71,13 +75,15 @@ _mm_msub_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_nmacc_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); + return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, + (__v4sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_nmacc_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); + return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, + (__v2df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 @@ -95,13 +101,15 @@ _mm_nmacc_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_nmsub_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); + return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, + -(__v4sf)__C); } static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_nmsub_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); + return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, + -(__v2df)__C); } static __inline__ __m128 __DEFAULT_FN_ATTRS128 @@ -143,49 +151,57 @@ _mm_msubadd_pd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_macc_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); + return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_macc_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); + return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, + (__v4df)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_msub_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); + return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, + -(__v8sf)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_msub_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); + return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, + -(__v4df)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_nmacc_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); + return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, + (__v8sf)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_nmacc_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); + return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, + (__v4df)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_nmsub_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); + return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, + -(__v8sf)__C); } static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_nmsub_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); + return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, + -(__v4df)__C); } static __inline__ __m256 __DEFAULT_FN_ATTRS256 diff --git a/clang/lib/Headers/fmaintrin.h b/clang/lib/Headers/fmaintrin.h index 22d1a78..24584a9 100644 --- a/clang/lib/Headers/fmaintrin.h +++ b/clang/lib/Headers/fmaintrin.h @@ -35,7 +35,8 @@ static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, (__v4sf)__C); + return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, + (__v4sf)__C); } /// Computes a multiply-add of 128-bit vectors of [2 x double]. @@ -55,7 +56,8 @@ _mm_fmadd_ps(__m128 __A, __m128 __B, __m128 __C) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_fmadd_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, (__v2df)__C); + return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, + (__v2df)__C); } /// Computes a scalar multiply-add of the single-precision values in the @@ -133,7 +135,8 @@ _mm_fmadd_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps((__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); + return (__m128)__builtin_elementwise_fma((__v4sf)__A, (__v4sf)__B, + -(__v4sf)__C); } /// Computes a multiply-subtract of 128-bit vectors of [2 x double]. @@ -153,7 +156,8 @@ _mm_fmsub_ps(__m128 __A, __m128 __B, __m128 __C) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_fmsub_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd((__v2df)__A, (__v2df)__B, -(__v2df)__C); + return (__m128d)__builtin_elementwise_fma((__v2df)__A, (__v2df)__B, + -(__v2df)__C); } /// Computes a scalar multiply-subtract of the single-precision values in @@ -231,7 +235,8 @@ _mm_fmsub_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, (__v4sf)__C); + return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, + (__v4sf)__C); } /// Computes a negated multiply-add of 128-bit vectors of [2 x double]. @@ -251,7 +256,8 @@ _mm_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, (__v2df)__C); + return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, + (__v2df)__C); } /// Computes a scalar negated multiply-add of the single-precision values in @@ -329,7 +335,8 @@ _mm_fnmadd_sd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m128 __DEFAULT_FN_ATTRS128 _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) { - return (__m128)__builtin_ia32_vfmaddps(-(__v4sf)__A, (__v4sf)__B, -(__v4sf)__C); + return (__m128)__builtin_elementwise_fma(-(__v4sf)__A, (__v4sf)__B, + -(__v4sf)__C); } /// Computes a negated multiply-subtract of 128-bit vectors of [2 x double]. @@ -349,7 +356,8 @@ _mm_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C) static __inline__ __m128d __DEFAULT_FN_ATTRS128 _mm_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C) { - return (__m128d)__builtin_ia32_vfmaddpd(-(__v2df)__A, (__v2df)__B, -(__v2df)__C); + return (__m128d)__builtin_elementwise_fma(-(__v2df)__A, (__v2df)__B, + -(__v2df)__C); } /// Computes a scalar negated multiply-subtract of the single-precision @@ -531,7 +539,8 @@ _mm_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C) static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, (__v8sf)__C); + return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, + (__v8sf)__C); } /// Computes a multiply-add of 256-bit vectors of [4 x double]. @@ -551,7 +560,8 @@ _mm256_fmadd_ps(__m256 __A, __m256 __B, __m256 __C) static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, (__v4df)__C); + return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, + (__v4df)__C); } /// Computes a multiply-subtract of 256-bit vectors of [8 x float]. @@ -571,7 +581,8 @@ _mm256_fmadd_pd(__m256d __A, __m256d __B, __m256d __C) static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256((__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); + return (__m256)__builtin_elementwise_fma((__v8sf)__A, (__v8sf)__B, + -(__v8sf)__C); } /// Computes a multiply-subtract of 256-bit vectors of [4 x double]. @@ -591,7 +602,8 @@ _mm256_fmsub_ps(__m256 __A, __m256 __B, __m256 __C) static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256((__v4df)__A, (__v4df)__B, -(__v4df)__C); + return (__m256d)__builtin_elementwise_fma((__v4df)__A, (__v4df)__B, + -(__v4df)__C); } /// Computes a negated multiply-add of 256-bit vectors of [8 x float]. @@ -611,7 +623,8 @@ _mm256_fmsub_pd(__m256d __A, __m256d __B, __m256d __C) static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, (__v8sf)__C); + return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, + (__v8sf)__C); } /// Computes a negated multiply-add of 256-bit vectors of [4 x double]. @@ -631,7 +644,8 @@ _mm256_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C) static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, (__v4df)__C); + return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, + (__v4df)__C); } /// Computes a negated multiply-subtract of 256-bit vectors of [8 x float]. @@ -651,7 +665,8 @@ _mm256_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C) static __inline__ __m256 __DEFAULT_FN_ATTRS256 _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) { - return (__m256)__builtin_ia32_vfmaddps256(-(__v8sf)__A, (__v8sf)__B, -(__v8sf)__C); + return (__m256)__builtin_elementwise_fma(-(__v8sf)__A, (__v8sf)__B, + -(__v8sf)__C); } /// Computes a negated multiply-subtract of 256-bit vectors of [4 x double]. @@ -671,7 +686,8 @@ _mm256_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C) static __inline__ __m256d __DEFAULT_FN_ATTRS256 _mm256_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C) { - return (__m256d)__builtin_ia32_vfmaddpd256(-(__v4df)__A, (__v4df)__B, -(__v4df)__C); + return (__m256d)__builtin_elementwise_fma(-(__v4df)__A, (__v4df)__B, + -(__v4df)__C); } /// Computes a multiply with alternating add/subtract of 256-bit vectors of diff --git a/clang/lib/Headers/mmintrin.h b/clang/lib/Headers/mmintrin.h index 5a02a455..3961b79 100644 --- a/clang/lib/Headers/mmintrin.h +++ b/clang/lib/Headers/mmintrin.h @@ -57,6 +57,9 @@ typedef char __v16qi __attribute__((__vector_size__(16))); #define __trunc64(x) \ (__m64) __builtin_shufflevector((__v2di)(x), __extension__(__v2di){}, 0) +#define __zext128(x) \ + (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ + 1, 2, 3) #define __anyext128(x) \ (__m128i) __builtin_shufflevector((__v2si)(x), __extension__(__v2si){}, 0, \ 1, -1, -1) @@ -723,11 +726,11 @@ _mm_madd_pi16(__m64 __m1, __m64 __m2) /// A 64-bit integer vector of [4 x i16]. /// \returns A 64-bit integer vector of [4 x i16] containing the upper 16 bits /// of the products of both parameters. -static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 +static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR _mm_mulhi_pi16(__m64 __m1, __m64 __m2) { - return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__anyext128(__m1), - (__v8hi)__anyext128(__m2))); + return __trunc64(__builtin_ia32_pmulhw128((__v8hi)__zext128(__m1), + (__v8hi)__zext128(__m2))); } /// Multiplies each 16-bit signed integer element of the first 64-bit diff --git a/clang/lib/Headers/xmmintrin.h b/clang/lib/Headers/xmmintrin.h index 6a64369..7bf6b84 100644 --- a/clang/lib/Headers/xmmintrin.h +++ b/clang/lib/Headers/xmmintrin.h @@ -24,6 +24,7 @@ typedef float __m128_u __attribute__((__vector_size__(16), __aligned__(1))); /* Unsigned types */ typedef unsigned int __v4su __attribute__((__vector_size__(16))); +typedef unsigned short __v8hu __attribute__((__vector_size__(16))); /* This header should only be included in a hosted environment as it depends on * a standard library to provide allocation routines. */ @@ -2447,11 +2448,11 @@ _mm_movemask_pi8(__m64 __a) /// \param __b /// A 64-bit integer vector containing one of the source operands. /// \returns A 64-bit integer vector containing the products of both operands. -static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2 +static __inline__ __m64 __DEFAULT_FN_ATTRS_SSE2_CONSTEXPR _mm_mulhi_pu16(__m64 __a, __m64 __b) { - return __trunc64(__builtin_ia32_pmulhuw128((__v8hi)__anyext128(__a), - (__v8hi)__anyext128(__b))); + return __trunc64(__builtin_ia32_pmulhuw128((__v8hu)__zext128(__a), + (__v8hu)__zext128(__b))); } /// Shuffles the 4 16-bit integers from a 64-bit integer vector to the diff --git a/clang/lib/Sema/SemaExprCXX.cpp b/clang/lib/Sema/SemaExprCXX.cpp index 0edfd60..9c55541 100644 --- a/clang/lib/Sema/SemaExprCXX.cpp +++ b/clang/lib/Sema/SemaExprCXX.cpp @@ -3497,6 +3497,19 @@ void Sema::DeclareGlobalAllocationFunction(DeclarationName Name, } auto CreateAllocationFunctionDecl = [&](Attr *ExtraAttr) { + // The MSVC STL has explicit cdecl on its (host-side) allocation function + // specializations for the allocation, so in order to prevent a CC clash + // we use the host's CC, if available, or CC_C as a fallback, for the + // host-side implicit decls, knowing these do not get emitted when compiling + // for device. + if (getLangOpts().CUDAIsDevice && ExtraAttr && + isa<CUDAHostAttr>(ExtraAttr) && + Context.getTargetInfo().getTriple().isSPIRV()) { + if (auto *ATI = Context.getAuxTargetInfo()) + EPI.ExtInfo = EPI.ExtInfo.withCallingConv(ATI->getDefaultCallingConv()); + else + EPI.ExtInfo = EPI.ExtInfo.withCallingConv(CallingConv::CC_C); + } QualType FnType = Context.getFunctionType(Return, Params, EPI); FunctionDecl *Alloc = FunctionDecl::Create( Context, GlobalCtx, SourceLocation(), SourceLocation(), Name, FnType, diff --git a/clang/lib/Sema/SemaObjC.cpp b/clang/lib/Sema/SemaObjC.cpp index 0f39a98..bde00bd 100644 --- a/clang/lib/Sema/SemaObjC.cpp +++ b/clang/lib/Sema/SemaObjC.cpp @@ -691,7 +691,7 @@ static QualType applyObjCTypeArgs(Sema &S, SourceLocation loc, QualType type, if (!anyPackExpansions && finalTypeArgs.size() != numTypeParams) { S.Diag(loc, diag::err_objc_type_args_wrong_arity) << (typeArgs.size() < typeParams->size()) << objcClass->getDeclName() - << (unsigned)finalTypeArgs.size() << (unsigned)numTypeParams; + << (unsigned)finalTypeArgs.size() << numTypeParams; S.Diag(objcClass->getLocation(), diag::note_previous_decl) << objcClass; if (failOnError) diff --git a/clang/lib/StaticAnalyzer/Checkers/AnalysisOrderChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/AnalysisOrderChecker.cpp index 3b3def7..e64153d 100644 --- a/clang/lib/StaticAnalyzer/Checkers/AnalysisOrderChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/AnalysisOrderChecker.cpp @@ -183,7 +183,8 @@ public: llvm::errs() << "NewAllocator\n"; } - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const { + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const { if (isCallbackEnabled(C, "Bind")) llvm::errs() << "Bind\n"; } diff --git a/clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp index 837cbbc..921114a 100644 --- a/clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/BoolAssignmentChecker.cpp @@ -29,7 +29,8 @@ class BoolAssignmentChecker : public Checker<check::Bind> { bool IsTainted = false) const; public: - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; }; } // end anonymous namespace @@ -55,6 +56,7 @@ static bool isBooleanType(QualType Ty) { } void BoolAssignmentChecker::checkBind(SVal Loc, SVal Val, const Stmt *S, + bool AtDeclInit, CheckerContext &C) const { // We are only interested in stores into Booleans. diff --git a/clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp b/clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp index 350db4b..392c7ee 100644 --- a/clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/CheckerDocumentation.cpp @@ -175,9 +175,12 @@ public: /// \param Loc The value of the location (pointer). /// \param Val The value which will be stored at the location Loc. /// \param S The bind is performed while processing the statement S. + /// \param AtDeclInit Whether the bind is performed during declaration + /// initialization. /// /// check::Bind - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &) const {} + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &) const {} /// Called after a CFG edge is taken within a function. /// diff --git a/clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp index 152129e..395d724 100644 --- a/clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/DereferenceChecker.cpp @@ -48,7 +48,8 @@ class DereferenceChecker public: void checkLocation(SVal location, bool isLoad, const Stmt* S, CheckerContext &C) const; - void checkBind(SVal L, SVal V, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal L, SVal V, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; static void AddDerefSource(raw_ostream &os, SmallVectorImpl<SourceRange> &Ranges, @@ -309,7 +310,7 @@ void DereferenceChecker::checkLocation(SVal l, bool isLoad, const Stmt* S, } void DereferenceChecker::checkBind(SVal L, SVal V, const Stmt *S, - CheckerContext &C) const { + bool AtDeclInit, CheckerContext &C) const { // If we're binding to a reference, check if the value is known to be null. if (V.isUndef()) return; diff --git a/clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp b/clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp index 7ad54c0..7eb9a1d 100644 --- a/clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/IteratorModeling.cpp @@ -150,7 +150,8 @@ public: IteratorModeling() = default; void checkPostCall(const CallEvent &Call, CheckerContext &C) const; - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; void checkPostStmt(const UnaryOperator *UO, CheckerContext &C) const; void checkPostStmt(const BinaryOperator *BO, CheckerContext &C) const; void checkPostStmt(const MaterializeTemporaryExpr *MTE, @@ -234,7 +235,7 @@ void IteratorModeling::checkPostCall(const CallEvent &Call, } void IteratorModeling::checkBind(SVal Loc, SVal Val, const Stmt *S, - CheckerContext &C) const { + bool AtDeclInit, CheckerContext &C) const { auto State = C.getState(); const auto *Pos = getIteratorPosition(State, Val); if (Pos) { diff --git a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp index 369d619..efb9809 100644 --- a/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/MallocChecker.cpp @@ -3156,7 +3156,7 @@ void MallocChecker::checkPreCall(const CallEvent &Call, for (unsigned I = 0, E = Call.getNumArgs(); I != E; ++I) { SVal ArgSVal = Call.getArgSVal(I); if (isa<Loc>(ArgSVal)) { - SymbolRef Sym = ArgSVal.getAsSymbol(); + SymbolRef Sym = ArgSVal.getAsSymbol(/*IncludeBaseRegions=*/true); if (!Sym) continue; if (checkUseAfterFree(Sym, C, Call.getArgExpr(I))) diff --git a/clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp index 9744d1a..eeb6b72 100644 --- a/clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/NullabilityChecker.cpp @@ -97,7 +97,8 @@ public: // libraries. bool NoDiagnoseCallsToSystemHeaders = false; - void checkBind(SVal L, SVal V, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal L, SVal V, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; void checkPostStmt(const ExplicitCastExpr *CE, CheckerContext &C) const; void checkPreStmt(const ReturnStmt *S, CheckerContext &C) const; void checkPostObjCMessage(const ObjCMethodCall &M, CheckerContext &C) const; @@ -1250,7 +1251,7 @@ static bool isARCNilInitializedLocal(CheckerContext &C, const Stmt *S) { /// Propagate the nullability information through binds and warn when nullable /// pointer or null symbol is assigned to a pointer with a nonnull type. void NullabilityChecker::checkBind(SVal L, SVal V, const Stmt *S, - CheckerContext &C) const { + bool AtDeclInit, CheckerContext &C) const { const TypedValueRegion *TVR = dyn_cast_or_null<TypedValueRegion>(L.getAsRegion()); if (!TVR) diff --git a/clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp index ace3426..e40b4f8 100644 --- a/clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/ObjCSelfInitChecker.cpp @@ -73,7 +73,8 @@ public: void checkPreStmt(const ReturnStmt *S, CheckerContext &C) const; void checkLocation(SVal location, bool isLoad, const Stmt *S, CheckerContext &C) const; - void checkBind(SVal loc, SVal val, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal loc, SVal val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; void checkPreCall(const CallEvent &CE, CheckerContext &C) const; void checkPostCall(const CallEvent &CE, CheckerContext &C) const; @@ -311,9 +312,8 @@ void ObjCSelfInitChecker::checkLocation(SVal location, bool isLoad, C); } - void ObjCSelfInitChecker::checkBind(SVal loc, SVal val, const Stmt *S, - CheckerContext &C) const { + bool AtDeclInit, CheckerContext &C) const { // Allow assignment of anything to self. Self is a local variable in the // initializer, so it is legal to assign anything to it, like results of // static functions/method calls. After self is assigned something we cannot diff --git a/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp index 65ff902..1762505 100644 --- a/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.cpp @@ -1136,7 +1136,7 @@ ExplodedNode * RetainCountChecker::checkReturnWithRetEffect(const ReturnStmt *S, //===----------------------------------------------------------------------===// void RetainCountChecker::checkBind(SVal loc, SVal val, const Stmt *S, - CheckerContext &C) const { + bool AtDeclInit, CheckerContext &C) const { ProgramStateRef state = C.getState(); const MemRegion *MR = loc.getAsRegion(); diff --git a/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h b/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h index 8854e10..dc8bad6 100644 --- a/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h +++ b/clang/lib/StaticAnalyzer/Checkers/RetainCountChecker/RetainCountChecker.h @@ -280,7 +280,8 @@ public: void printState(raw_ostream &Out, ProgramStateRef State, const char *NL, const char *Sep) const override; - void checkBind(SVal loc, SVal val, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal loc, SVal val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; void checkPostStmt(const BlockExpr *BE, CheckerContext &C) const; void checkPostStmt(const CastExpr *CE, CheckerContext &C) const; diff --git a/clang/lib/StaticAnalyzer/Checkers/StoreToImmutableChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/StoreToImmutableChecker.cpp index afad419..2bb3917 100644 --- a/clang/lib/StaticAnalyzer/Checkers/StoreToImmutableChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/StoreToImmutableChecker.cpp @@ -26,53 +26,11 @@ class StoreToImmutableChecker : public Checker<check::Bind> { const BugType BT{this, "Write to immutable memory", "CERT Environment (ENV)"}; public: - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; }; } // end anonymous namespace -static bool isInitializationContext(const Stmt *S, CheckerContext &C) { - // Check if this is a DeclStmt (variable declaration) - if (isa<DeclStmt>(S)) - return true; - - // This part is specific for initialization of const lambdas pre-C++17. - // Lets look at the AST of the statement: - // ``` - // const auto lambda = [](){}; - // ``` - // - // The relevant part of the AST for this case prior to C++17 is: - // ... - // `-DeclStmt - // `-VarDecl - // `-ExprWithCleanups - // `-CXXConstructExpr - // ... - // In C++17 and later, the AST is different: - // ... - // `-DeclStmt - // `-VarDecl - // `-ImplicitCastExpr - // `-LambdaExpr - // |-CXXRecordDecl - // `-CXXConstructExpr - // ... - // And even beside this, the statement `S` that is given to the checkBind - // callback is the VarDecl in C++17 and later, and the CXXConstructExpr in - // C++14 and before. So in order to support the C++14 we need the following - // ugly hack to detect whether this construction is used to initialize a - // variable. - // - // FIXME: This should be eliminated by improving the API of checkBind to - // ensure that it consistently passes the `VarDecl` (instead of the - // `CXXConstructExpr`) when the constructor call denotes the initialization - // of a variable with a lambda, or maybe less preferably, try the more - // invasive approach of passing the information forward to the checkers - // whether the current bind is an initialization or an assignment. - const auto *ConstructExp = dyn_cast<CXXConstructExpr>(S); - return ConstructExp && ConstructExp->isElidable(); -} - static bool isEffectivelyConstRegion(const MemRegion *MR, CheckerContext &C) { if (isa<GlobalImmutableSpaceRegion>(MR)) return true; @@ -128,6 +86,7 @@ getInnermostEnclosingConstDeclRegion(const MemRegion *MR, CheckerContext &C) { } void StoreToImmutableChecker::checkBind(SVal Loc, SVal Val, const Stmt *S, + bool AtDeclInit, CheckerContext &C) const { // We are only interested in stores to memory regions const MemRegion *MR = Loc.getAsRegion(); @@ -136,9 +95,7 @@ void StoreToImmutableChecker::checkBind(SVal Loc, SVal Val, const Stmt *S, // Skip variable declarations and initializations - we only want to catch // actual writes - // FIXME: If the API of checkBind would allow to distinguish between - // initialization and assignment, we could use that instead. - if (isInitializationContext(S, C)) + if (AtDeclInit) return; // Check if the region is in the global immutable space diff --git a/clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp index e98de33..7f8923c 100644 --- a/clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/UndefinedAssignmentChecker.cpp @@ -26,13 +26,13 @@ class UndefinedAssignmentChecker const BugType BT{this, "Assigned value is uninitialized"}; public: - void checkBind(SVal location, SVal val, const Stmt *S, + void checkBind(SVal location, SVal val, const Stmt *S, bool AtDeclInit, CheckerContext &C) const; }; } void UndefinedAssignmentChecker::checkBind(SVal location, SVal val, - const Stmt *StoreE, + const Stmt *StoreE, bool AtDeclInit, CheckerContext &C) const { if (!val.isUndef()) return; diff --git a/clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp b/clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp index cb73ac6..116dd93 100644 --- a/clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp +++ b/clang/lib/StaticAnalyzer/Checkers/VforkChecker.cpp @@ -62,7 +62,8 @@ public: void checkPreCall(const CallEvent &Call, CheckerContext &C) const; void checkPostCall(const CallEvent &Call, CheckerContext &C) const; - void checkBind(SVal L, SVal V, const Stmt *S, CheckerContext &C) const; + void checkBind(SVal L, SVal V, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const; void checkPreStmt(const ReturnStmt *RS, CheckerContext &C) const; }; @@ -188,7 +189,7 @@ void VforkChecker::checkPreCall(const CallEvent &Call, } // Prohibit writes in child process (except for vfork's lhs). -void VforkChecker::checkBind(SVal L, SVal V, const Stmt *S, +void VforkChecker::checkBind(SVal L, SVal V, const Stmt *S, bool AtDeclInit, CheckerContext &C) const { ProgramStateRef State = C.getState(); if (!isChildProcess(State)) diff --git a/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp b/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp index 0fe677e..44c6f9f 100644 --- a/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp +++ b/clang/lib/StaticAnalyzer/Core/CheckerManager.cpp @@ -376,11 +376,13 @@ namespace { const Stmt *S; ExprEngine &Eng; const ProgramPoint &PP; + bool AtDeclInit; - CheckBindContext(const CheckersTy &checkers, - SVal loc, SVal val, const Stmt *s, ExprEngine &eng, + CheckBindContext(const CheckersTy &checkers, SVal loc, SVal val, + const Stmt *s, bool AtDeclInit, ExprEngine &eng, const ProgramPoint &pp) - : Checkers(checkers), Loc(loc), Val(val), S(s), Eng(eng), PP(pp) {} + : Checkers(checkers), Loc(loc), Val(val), S(s), Eng(eng), PP(pp), + AtDeclInit(AtDeclInit) {} CheckersTy::const_iterator checkers_begin() { return Checkers.begin(); } CheckersTy::const_iterator checkers_end() { return Checkers.end(); } @@ -391,7 +393,7 @@ namespace { const ProgramPoint &L = PP.withTag(checkFn.Checker); CheckerContext C(Bldr, Eng, Pred, L); - checkFn(Loc, Val, S, C); + checkFn(Loc, Val, S, AtDeclInit, C); } }; @@ -408,10 +410,10 @@ namespace { /// Run checkers for binding of a value to a location. void CheckerManager::runCheckersForBind(ExplodedNodeSet &Dst, const ExplodedNodeSet &Src, - SVal location, SVal val, - const Stmt *S, ExprEngine &Eng, + SVal location, SVal val, const Stmt *S, + bool AtDeclInit, ExprEngine &Eng, const ProgramPoint &PP) { - CheckBindContext C(BindCheckers, location, val, S, Eng, PP); + CheckBindContext C(BindCheckers, location, val, S, AtDeclInit, Eng, PP); llvm::TimeTraceScope TimeScope{ "CheckerManager::runCheckersForBind", [&val]() { return getTimeTraceBindMetadata(val); }}; diff --git a/clang/lib/StaticAnalyzer/Core/ExprEngine.cpp b/clang/lib/StaticAnalyzer/Core/ExprEngine.cpp index d874844..c853c00 100644 --- a/clang/lib/StaticAnalyzer/Core/ExprEngine.cpp +++ b/clang/lib/StaticAnalyzer/Core/ExprEngine.cpp @@ -3714,9 +3714,8 @@ ExprEngine::notifyCheckersOfPointerEscape(ProgramStateRef State, /// evalBind - Handle the semantics of binding a value to a specific location. /// This method is used by evalStore and (soon) VisitDeclStmt, and others. void ExprEngine::evalBind(ExplodedNodeSet &Dst, const Stmt *StoreE, - ExplodedNode *Pred, - SVal location, SVal Val, - bool atDeclInit, const ProgramPoint *PP) { + ExplodedNode *Pred, SVal location, SVal Val, + bool AtDeclInit, const ProgramPoint *PP) { const LocationContext *LC = Pred->getLocationContext(); PostStmt PS(StoreE, LC); if (!PP) @@ -3725,7 +3724,7 @@ void ExprEngine::evalBind(ExplodedNodeSet &Dst, const Stmt *StoreE, // Do a previsit of the bind. ExplodedNodeSet CheckedSet; getCheckerManager().runCheckersForBind(CheckedSet, Pred, location, Val, - StoreE, *this, *PP); + StoreE, AtDeclInit, *this, *PP); StmtNodeBuilder Bldr(CheckedSet, Dst, *currBldrCtx); @@ -3748,8 +3747,8 @@ void ExprEngine::evalBind(ExplodedNodeSet &Dst, const Stmt *StoreE, // When binding the value, pass on the hint that this is a initialization. // For initializations, we do not need to inform clients of region // changes. - state = state->bindLoc(location.castAs<Loc>(), - Val, LC, /* notifyChanges = */ !atDeclInit); + state = state->bindLoc(location.castAs<Loc>(), Val, LC, + /* notifyChanges = */ !AtDeclInit); const MemRegion *LocReg = nullptr; if (std::optional<loc::MemRegionVal> LocRegVal = diff --git a/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp b/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp index fe70558..c0b28d2 100644 --- a/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp +++ b/clang/lib/StaticAnalyzer/Core/ExprEngineCXX.cpp @@ -85,7 +85,7 @@ void ExprEngine::performTrivialCopy(NodeBuilder &Bldr, ExplodedNode *Pred, evalLocation(Tmp, CallExpr, VExpr, Pred, Pred->getState(), V, /*isLoad=*/true); for (ExplodedNode *N : Tmp) - evalBind(Dst, CallExpr, N, ThisVal, V, true); + evalBind(Dst, CallExpr, N, ThisVal, V, !AlwaysReturnsLValue); PostStmt PS(CallExpr, LCtx); for (ExplodedNode *N : Dst) { diff --git a/clang/test/AST/ByteCode/arrays.cpp b/clang/test/AST/ByteCode/arrays.cpp index 2dd51c2..8ef5e4d 100644 --- a/clang/test/AST/ByteCode/arrays.cpp +++ b/clang/test/AST/ByteCode/arrays.cpp @@ -779,3 +779,20 @@ namespace DiscardedSubScriptExpr { return true; } } + +namespace ZeroSizeArrayRead { + constexpr char str[0] = {}; + constexpr unsigned checksum(const char *s) { + unsigned result = 0; + for (const char *p = s; *p != '\0'; ++p) { // both-note {{read of dereferenced one-past-the-end pointer}} + result += *p; + } + return result; + } + constexpr unsigned C = checksum(str); // both-error {{must be initialized by a constant expression}} \ + // both-note {{in call to}} + + constexpr const char *p1 = &str[0]; + constexpr const char *p2 = &str[1]; // both-error {{must be initialized by a constant expression}} \ + // both-note {{cannot refer to element 1 of array of 0 elements in a constant expression}} +} diff --git a/clang/test/Analysis/malloc-checker-arg-uaf.c b/clang/test/Analysis/malloc-checker-arg-uaf.c new file mode 100644 index 0000000..d6aa856 --- /dev/null +++ b/clang/test/Analysis/malloc-checker-arg-uaf.c @@ -0,0 +1,44 @@ +// RUN: %clang_analyze_cc1 -analyzer-checker=core,unix.Malloc -verify %s + +#include "Inputs/system-header-simulator-for-malloc.h" + +struct Obj { + int field; +}; + +void use(void *ptr); + +void test_direct_param_uaf() { + int *p = (int *)malloc(sizeof(int)); + free(p); + use(p); // expected-warning{{Use of memory after it is released}} +} + +void test_struct_field_uaf() { + struct Obj *o = (struct Obj *)malloc(sizeof(struct Obj)); + free(o); + use(&o->field); // expected-warning{{Use of memory after it is released}} +} + +void test_no_warning_const_int() { + use((void *)0x1234); // no-warning +} + +void test_no_warning_stack() { + int x = 42; + use(&x); // no-warning +} + +void test_nested_alloc() { + struct Obj *o = (struct Obj *)malloc(sizeof(struct Obj)); + use(o); // no-warning + free(o); + use(o); // expected-warning{{Use of memory after it is released}} +} + +void test_nested_field() { + struct Obj *o = (struct Obj *)malloc(sizeof(struct Obj)); + int *f = &o->field; + free(o); + use(f); // expected-warning{{Use of memory after it is released}} +} diff --git a/clang/test/CMakeLists.txt b/clang/test/CMakeLists.txt index 286c9d4..e9f4f83 100644 --- a/clang/test/CMakeLists.txt +++ b/clang/test/CMakeLists.txt @@ -26,7 +26,6 @@ llvm_canonicalize_cmake_booleans( PPC_LINUX_DEFAULT_IEEELONGDOUBLE LLVM_TOOL_LLVM_DRIVER_BUILD LLVM_INCLUDE_SPIRV_TOOLS_TESTS - LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS ) # Run tests requiring Z3 headers only if LLVM was built with Z3 diff --git a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c index daed3baf..ccfdc1a 100644 --- a/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c +++ b/clang/test/CodeGen/2007-06-18-SextAttrAggregate.c @@ -1,5 +1,5 @@ // RUN: %clang_cc1 -no-enable-noundef-analysis %s -o - -emit-llvm | FileCheck %s -// XFAIL: target={{(aarch64|arm64).*}}, target=x86_64-pc-windows-msvc, target=x86_64-{{(pc|w64)}}-windows-gnu +// XFAIL: target={{(aarch64|arm64).*}}, target=x86_64-pc-windows-msvc, target=x86_64-{{(pc|w64)}}-windows-gnu, target=x86_64-pc-windows-cygnus // PR1513 diff --git a/clang/test/CodeGen/X86/avx-builtins.c b/clang/test/CodeGen/X86/avx-builtins.c index e2c9f96..28cad00 100644 --- a/clang/test/CodeGen/X86/avx-builtins.c +++ b/clang/test/CodeGen/X86/avx-builtins.c @@ -147,11 +147,13 @@ __m256 test_mm256_castpd_ps(__m256d A) { // CHECK-LABEL: test_mm256_castpd_ps return _mm256_castpd_ps(A); } +TEST_CONSTEXPR(match_m256(_mm256_castpd_ps((__m256d){-1.0, +2.0, +4.0, -6.0}), +0.0f, -1.875f, +0.0f, +2.0f, +0.0f, +2.25f, 0.0f, -2.375f)); __m256i test_mm256_castpd_si256(__m256d A) { // CHECK-LABEL: test_mm256_castpd_si256 return _mm256_castpd_si256(A); } +TEST_CONSTEXPR(match_m256i(_mm256_castpd_si256((__m256d){-1.0, +2.0, -3.0, +4.0}), 0xBFF0000000000000ULL, 0x4000000000000000ULL, 0xC008000000000000ULL, 0x4010000000000000ULL)); __m256d test_mm256_castpd128_pd256(__m128d A) { // CHECK-LABEL: test_mm256_castpd128_pd256 @@ -165,16 +167,19 @@ __m128d test_mm256_castpd256_pd128(__m256d A) { // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <2 x i32> <i32 0, i32 1> return _mm256_castpd256_pd128(A); } +TEST_CONSTEXPR(match_m128d(_mm256_castpd256_pd128((__m256d){-1.0, +2.0, -3.0, +4.0}), -1.0, +2.0)); __m256d test_mm256_castps_pd(__m256 A) { // CHECK-LABEL: test_mm256_castps_pd return _mm256_castps_pd(A); } +TEST_CONSTEXPR(match_m256d(_mm256_castps_pd((__m256){0.0f, -1.0f, 0.0f, 4.0f, 0.0f, -2.0f, 0.0f, 6.0f}), -0.0078125, 512.0, -2.0, +8192.0)); __m256i test_mm256_castps_si256(__m256 A) { // CHECK-LABEL: test_mm256_castps_si256 return _mm256_castps_si256(A); } +TEST_CONSTEXPR(match_m256i(_mm256_castps_si256((__m256){1.0f, -2.0f, -4.0f, 8.0f, -16.0f, +16.0f, +32.0f, -32.0f}), 0xC00000003F800000ULL, 0x41000000c0800000ULL, 0x41800000C1800000ULL, 0xC200000042000000ULL)); __m256 test_mm256_castps128_ps256(__m128 A) { // CHECK-LABEL: test_mm256_castps128_ps256 @@ -188,6 +193,7 @@ __m128 test_mm256_castps256_ps128(__m256 A) { // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> return _mm256_castps256_ps128(A); } +TEST_CONSTEXPR(match_m128(_mm256_castps256_ps128((__m256){1.0f, -2.0f, -4.0f, 8.0f, -16.0f, +16.0f, +32.0f, -32.0f}), 1.0f, -2.0f, -4.0f, 8.0f)); __m256i test_mm256_castsi128_si256(__m128i A) { // CHECK-LABEL: test_mm256_castsi128_si256 @@ -200,17 +206,20 @@ __m256d test_mm256_castsi256_pd(__m256i A) { // CHECK-LABEL: test_mm256_castsi256_pd return _mm256_castsi256_pd(A); } +TEST_CONSTEXPR(match_m256d(_mm256_castsi256_pd((__m256i)(__v4du){0x4070000000000000ULL, 0xC000000000000000ULL, 0xBFF0000000000000ULL, 0xC008000000000000ULL}), 256.0, -2.0, -1.0, -3.0)); __m256 test_mm256_castsi256_ps(__m256i A) { // CHECK-LABEL: test_mm256_castsi256_ps return _mm256_castsi256_ps(A); } +TEST_CONSTEXPR(match_m256(_mm256_castsi256_ps((__m256i)(__v4du){0x42000000c1800000ULL, 0x43000000c2800000ULL, 0x41000000c0800000ULL, 0xC00000003F800000ULL}), -16.0f, 32.0f, -64.0f, 128.0f, -4.0f, 8.0f, 1.0f, -2.0f)); __m128i test_mm256_castsi256_si128(__m256i A) { // CHECK-LABEL: test_mm256_castsi256_si128 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <2 x i32> <i32 0, i32 1> return _mm256_castsi256_si128(A); } +TEST_CONSTEXPR(match_m128i(_mm256_castsi256_si128((__m256i)(__v4du){0xBFF0000000000000ULL, 0x4070000000000000ULL, 0xC000000000000000ULL, 0xC008000000000000ULL}), 0xBFF0000000000000ULL, 0x4070000000000000ULL)); __m256d test_mm256_ceil_pd(__m256d x) { // CHECK-LABEL: test_mm256_ceil_pd diff --git a/clang/test/CodeGen/X86/avx2-builtins.c b/clang/test/CodeGen/X86/avx2-builtins.c index 1ed624c..adbb854 100644 --- a/clang/test/CodeGen/X86/avx2-builtins.c +++ b/clang/test/CodeGen/X86/avx2-builtins.c @@ -893,12 +893,14 @@ __m256i test_mm256_mulhi_epu16(__m256i a, __m256i b) { // CHECK: call <16 x i16> @llvm.x86.avx2.pmulhu.w(<16 x i16> %{{.*}}, <16 x i16> %{{.*}}) return _mm256_mulhi_epu16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_mulhi_epu16((__m256i)(__v16hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m256i)(__v16hi){-32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), 0, -32, 0, 25, 4, -28, 0, 17, 8, -24, 0, 9, 12, 5, 14, 1)); __m256i test_mm256_mulhi_epi16(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_mulhi_epi16 // CHECK: call <16 x i16> @llvm.x86.avx2.pmulh.w(<16 x i16> %{{.*}}, <16 x i16> %{{.*}}) return _mm256_mulhi_epi16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_mulhi_epi16((__m256i)(__v16hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m256i)(__v16hi){-32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, -1, -1, -1)); __m256i test_mm256_mulhrs_epi16(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_mulhrs_epi16 @@ -911,6 +913,7 @@ __m256i test_mm256_mullo_epi16(__m256i a, __m256i b) { // CHECK: mul <16 x i16> return _mm256_mullo_epi16(a, b); } +TEST_CONSTEXPR(match_v16hi(_mm256_mullo_epi16((__m256i)(__v16hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16}, (__m256i)(__v16hi){-32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -32, 60, 84, -104, -120, 132, 140, -144, -144, 140, 132, -120, -104, -84, -60, -32)); __m256i test_mm256_mullo_epi32(__m256i a, __m256i b) { // CHECK-LABEL: test_mm256_mullo_epi32 diff --git a/clang/test/CodeGen/X86/avx512bitalg-builtins.c b/clang/test/CodeGen/X86/avx512bitalg-builtins.c index 0468fba..30d364a2 100644 --- a/clang/test/CodeGen/X86/avx512bitalg-builtins.c +++ b/clang/test/CodeGen/X86/avx512bitalg-builtins.c @@ -4,12 +4,14 @@ // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> +#include "builtin_test_helpers.h" __m512i test_mm512_popcnt_epi16(__m512i __A) { // CHECK-LABEL: test_mm512_popcnt_epi16 // CHECK: @llvm.ctpop.v32i16 return _mm512_popcnt_epi16(__A); } +TEST_CONSTEXPR(match_v32hi(_mm512_popcnt_epi16((__m512i)(__v32hi){+5, -3, -10, +8, 0, -256, +256, -128, +3, +9, +15, +33, +63, +129, +511, +1025, +5, -3, -10, +8, 0, -256, +256, -128, +3, +9, +15, +33, +63, +129, +511, +1025}), 2, 15, 14, 1, 0, 8, 1, 9, 2, 2, 4, 2, 6, 2, 9, 2, 2, 15, 14, 1, 0, 8, 1, 9, 2, 2, 4, 2, 6, 2, 9, 2)); __m512i test_mm512_mask_popcnt_epi16(__m512i __A, __mmask32 __U, __m512i __B) { // CHECK-LABEL: test_mm512_mask_popcnt_epi16 @@ -29,6 +31,7 @@ __m512i test_mm512_popcnt_epi8(__m512i __A) { // CHECK: @llvm.ctpop.v64i8 return _mm512_popcnt_epi8(__A); } +TEST_CONSTEXPR(match_v64qi(_mm512_popcnt_epi8((__m512i)(__v64qi){+5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73, +5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73, +5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73, +5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73}), 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3, 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3, 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3, 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3)); __m512i test_mm512_mask_popcnt_epi8(__m512i __A, __mmask64 __U, __m512i __B) { // CHECK-LABEL: test_mm512_mask_popcnt_epi8 diff --git a/clang/test/CodeGen/X86/avx512bw-builtins.c b/clang/test/CodeGen/X86/avx512bw-builtins.c index 1d18ca8..37765eb 100644 --- a/clang/test/CodeGen/X86/avx512bw-builtins.c +++ b/clang/test/CodeGen/X86/avx512bw-builtins.c @@ -3,6 +3,7 @@ #include <immintrin.h> +#include "builtin_test_helpers.h" __mmask32 test_knot_mask32(__mmask32 a) { // CHECK-LABEL: @test_knot_mask32 @@ -823,6 +824,7 @@ __m512i test_mm512_mullo_epi16 (__m512i __A, __m512i __B) { //CHECK: mul <32 x i16> return _mm512_mullo_epi16(__A, __B); } +TEST_CONSTEXPR(match_v32hi(_mm512_mullo_epi16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -64, 124, 180, -232, -280, 324, 364, -400, -432, 460, 484, -504, -520, 532, 540, -544, -544, 540, 532, -520, -504, 484, 460, -432, -400, 364, 324, -280, -232, -180, -124, -64)); __m512i test_mm512_mask_mullo_epi16 (__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { //CHECK-LABEL: @test_mm512_mask_mullo_epi16 @@ -1331,29 +1333,36 @@ __m512i test_mm512_mulhi_epi16(__m512i __A, __m512i __B) { // CHECK: @llvm.x86.avx512.pmulh.w.512 return _mm512_mulhi_epi16(__A,__B); } +TEST_CONSTEXPR(match_v32hi(_mm512_mulhi_epi16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, 0, 0, -1, -1, -1, -1, -1)); + __m512i test_mm512_mask_mulhi_epi16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: @test_mm512_mask_mulhi_epi16 // CHECK: @llvm.x86.avx512.pmulh.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mulhi_epi16(__W,__U,__A,__B); } + __m512i test_mm512_maskz_mulhi_epi16(__mmask32 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: @test_mm512_maskz_mulhi_epi16 // CHECK: @llvm.x86.avx512.pmulh.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_maskz_mulhi_epi16(__U,__A,__B); } + __m512i test_mm512_mulhi_epu16(__m512i __A, __m512i __B) { // CHECK-LABEL: @test_mm512_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 return _mm512_mulhi_epu16(__A,__B); } +TEST_CONSTEXPR(match_v32hi(_mm512_mulhi_epu16((__m512i)(__v32hi){+1, -2, +3, -4, +5, -6, +7, -8, +9, -10, +11, -12, +13, -14, +15, -16, +17, -18, +19, -20, +21, -22, +23, -24, +25, -26, +27, -28, +29, -30, +31, -32}, (__m512i)(__v32hi){-64, -62, +60, +58, -56, -54, +52, +50, -48, -46, +44, +42, -40, -38, +36, +34, -32, -30, +28, +26, -24, -22, +20, +18, -16, -14, +12, +10, -8, +6, -4, +2}), 0, -64, 0, 57, 4, -60, 0, 49, 8, -56, 0, 41, 12, -52, 0, 33, 16, -48, 0, 25, 20, -44, 0, 17, 24, -40, 0, 9, 28, 5, 30, 1)); + __m512i test_mm512_mask_mulhi_epu16(__m512i __W, __mmask32 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: @test_mm512_mask_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 // CHECK: select <32 x i1> %{{.*}}, <32 x i16> %{{.*}}, <32 x i16> %{{.*}} return _mm512_mask_mulhi_epu16(__W,__U,__A,__B); } + __m512i test_mm512_maskz_mulhi_epu16(__mmask32 __U, __m512i __A, __m512i __B) { // CHECK-LABEL: @test_mm512_maskz_mulhi_epu16 // CHECK: @llvm.x86.avx512.pmulhu.w.512 diff --git a/clang/test/CodeGen/X86/avx512f-builtins.c b/clang/test/CodeGen/X86/avx512f-builtins.c index d59799e..8c446f5 100644 --- a/clang/test/CodeGen/X86/avx512f-builtins.c +++ b/clang/test/CodeGen/X86/avx512f-builtins.c @@ -439,6 +439,22 @@ __m512d test_mm512_set1_pd(double d) // CHECK: insertelement <8 x double> {{.*}}, i32 7 return _mm512_set1_pd(d); } +TEST_CONSTEXPR(match_m512d(_mm512_set1_pd(-100.0), -100.0, -100.0, -100.0, -100.0, -100.0, -100.0, -100.0, -100.0)); + +__m512 test_mm512_set1_ps(float d) +{ + // CHECK-LABEL: test_mm512_set1_ps + // CHECK: insertelement <16 x float> {{.*}}, i32 0 + // CHECK: insertelement <16 x float> {{.*}}, i32 1 + // CHECK: insertelement <16 x float> {{.*}}, i32 2 + // CHECK: insertelement <16 x float> {{.*}}, i32 3 + // CHECK: insertelement <16 x float> {{.*}}, i32 4 + // CHECK: insertelement <16 x float> {{.*}}, i32 5 + // CHECK: insertelement <16 x float> {{.*}}, i32 6 + // CHECK: insertelement <16 x float> {{.*}}, i32 15 + return _mm512_set1_ps(d); +} +TEST_CONSTEXPR(match_m512(_mm512_set1_ps(-55.0f), -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f, -55.0f)); __mmask16 test_mm512_knot(__mmask16 a) { @@ -9046,6 +9062,7 @@ __m512i test_mm512_set1_epi8(char d) // CHECK: insertelement <64 x i8> {{.*}}, i32 63 return _mm512_set1_epi8(d); } +TEST_CONSTEXPR(match_v64qi(_mm512_set1_epi8(127), 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, 127)); __m512i test_mm512_set1_epi16(short d) { @@ -9061,6 +9078,7 @@ __m512i test_mm512_set1_epi16(short d) // CHECK: insertelement <32 x i16> {{.*}}, i32 31 return _mm512_set1_epi16(d); } +TEST_CONSTEXPR(match_v32hi(_mm512_set1_epi16(-511), -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511, -511)); __m512i test_mm512_set1_epi32(int d) { diff --git a/clang/test/CodeGen/X86/avx512vl-builtins.c b/clang/test/CodeGen/X86/avx512vl-builtins.c index 1c2d467..ac7aa3e 100644 --- a/clang/test/CodeGen/X86/avx512vl-builtins.c +++ b/clang/test/CodeGen/X86/avx512vl-builtins.c @@ -1,602 +1,603 @@ -// RUN: %clang_cc1 -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s +// RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=x86_64-apple-darwin -target-feature +avx512f -target-feature +avx512vl -emit-llvm -o - -Wall -Werror -Wsign-conversion | FileCheck %s #include <immintrin.h> __mmask8 test_mm_cmpeq_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpeq_epu32_mask + // CHECK-LABEL: test_mm_cmpeq_epu32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} // CHECK: shufflevector <4 x i1> %{{.*}}, <4 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return (__mmask8)_mm_cmpeq_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmpeq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpeq_epu32_mask + // CHECK-LABEL: test_mm_mask_cmpeq_epu32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpeq_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmpeq_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpeq_epu64_mask + // CHECK-LABEL: test_mm_cmpeq_epu64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: shufflevector <2 x i1> %{{.*}}, <2 x i1> zeroinitializer, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 2, i32 3, i32 2, i32 3> return (__mmask8)_mm_cmpeq_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmpeq_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpeq_epu64_mask + // CHECK-LABEL: test_mm_mask_cmpeq_epu64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpeq_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmpge_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpge_epi32_mask + // CHECK-LABEL: test_mm_cmpge_epi32_mask // CHECK: icmp sge <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpge_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmpge_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpge_epi32_mask + // CHECK-LABEL: test_mm_mask_cmpge_epi32_mask // CHECK: icmp sge <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpge_epi32_mask(__u, __a, __b); } __mmask8 test_mm_cmpge_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpge_epi64_mask + // CHECK-LABEL: test_mm_cmpge_epi64_mask // CHECK: icmp sge <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpge_epi64_mask(__a, __b); } __mmask8 test_mm_mask_cmpge_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpge_epi64_mask + // CHECK-LABEL: test_mm_mask_cmpge_epi64_mask // CHECK: icmp sge <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpge_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpge_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpge_epi32_mask + // CHECK-LABEL: test_mm256_cmpge_epi32_mask // CHECK: icmp sge <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpge_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpge_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpge_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmpge_epi32_mask // CHECK: icmp sge <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpge_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_cmpge_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpge_epi64_mask + // CHECK-LABEL: test_mm256_cmpge_epi64_mask // CHECK: icmp sge <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpge_epi64_mask(__a, __b); } __mmask8 test_mm256_mask_cmpge_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpge_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmpge_epi64_mask // CHECK: icmp sge <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpge_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmpge_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpge_epu32_mask + // CHECK-LABEL: test_mm_cmpge_epu32_mask // CHECK: icmp uge <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpge_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmpge_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpge_epu32_mask + // CHECK-LABEL: test_mm_mask_cmpge_epu32_mask // CHECK: icmp uge <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpge_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmpge_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpge_epu64_mask + // CHECK-LABEL: test_mm_cmpge_epu64_mask // CHECK: icmp uge <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpge_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmpge_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpge_epu64_mask + // CHECK-LABEL: test_mm_mask_cmpge_epu64_mask // CHECK: icmp uge <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpge_epu64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpge_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpge_epu32_mask + // CHECK-LABEL: test_mm256_cmpge_epu32_mask // CHECK: icmp uge <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpge_epu32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpge_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpge_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmpge_epu32_mask // CHECK: icmp uge <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpge_epu32_mask(__u, __a, __b); } __mmask8 test_mm256_cmpge_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpge_epu64_mask + // CHECK-LABEL: test_mm256_cmpge_epu64_mask // CHECK: icmp uge <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpge_epu64_mask(__a, __b); } __mmask8 test_mm256_mask_cmpge_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpge_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmpge_epu64_mask // CHECK: icmp uge <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpge_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmpgt_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpgt_epu32_mask + // CHECK-LABEL: test_mm_cmpgt_epu32_mask // CHECK: icmp ugt <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpgt_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmpgt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpgt_epu32_mask + // CHECK-LABEL: test_mm_mask_cmpgt_epu32_mask // CHECK: icmp ugt <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpgt_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmpgt_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpgt_epu64_mask + // CHECK-LABEL: test_mm_cmpgt_epu64_mask // CHECK: icmp ugt <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpgt_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmpgt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpgt_epu64_mask + // CHECK-LABEL: test_mm_mask_cmpgt_epu64_mask // CHECK: icmp ugt <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpgt_epu64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpgt_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpgt_epu32_mask + // CHECK-LABEL: test_mm256_cmpgt_epu32_mask // CHECK: icmp ugt <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpgt_epu32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpgt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpgt_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmpgt_epu32_mask // CHECK: icmp ugt <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpgt_epu32_mask(__u, __a, __b); } __mmask8 test_mm256_cmpgt_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpgt_epu64_mask + // CHECK-LABEL: test_mm256_cmpgt_epu64_mask // CHECK: icmp ugt <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpgt_epu64_mask(__a, __b); } __mmask8 test_mm256_mask_cmpgt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpgt_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmpgt_epu64_mask // CHECK: icmp ugt <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpgt_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmple_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmple_epi32_mask + // CHECK-LABEL: test_mm_cmple_epi32_mask // CHECK: icmp sle <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmple_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmple_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmple_epi32_mask + // CHECK-LABEL: test_mm_mask_cmple_epi32_mask // CHECK: icmp sle <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmple_epi32_mask(__u, __a, __b); } __mmask8 test_mm_cmple_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmple_epi64_mask + // CHECK-LABEL: test_mm_cmple_epi64_mask // CHECK: icmp sle <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmple_epi64_mask(__a, __b); } __mmask8 test_mm_mask_cmple_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmple_epi64_mask + // CHECK-LABEL: test_mm_mask_cmple_epi64_mask // CHECK: icmp sle <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmple_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmple_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmple_epi32_mask + // CHECK-LABEL: test_mm256_cmple_epi32_mask // CHECK: icmp sle <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmple_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmple_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmple_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmple_epi32_mask // CHECK: icmp sle <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmple_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_cmple_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmple_epi64_mask + // CHECK-LABEL: test_mm256_cmple_epi64_mask // CHECK: icmp sle <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmple_epi64_mask(__a, __b); } __mmask8 test_mm256_mask_cmple_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmple_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmple_epi64_mask // CHECK: icmp sle <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmple_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmple_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmple_epu32_mask + // CHECK-LABEL: test_mm_cmple_epu32_mask // CHECK: icmp ule <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmple_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmple_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmple_epu32_mask + // CHECK-LABEL: test_mm_mask_cmple_epu32_mask // CHECK: icmp ule <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmple_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmple_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmple_epu64_mask + // CHECK-LABEL: test_mm_cmple_epu64_mask // CHECK: icmp ule <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmple_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmple_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmple_epu64_mask + // CHECK-LABEL: test_mm_mask_cmple_epu64_mask // CHECK: icmp ule <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmple_epu64_mask(__u, __a, __b); } __mmask8 test_mm256_cmple_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmple_epu32_mask + // CHECK-LABEL: test_mm256_cmple_epu32_mask // CHECK: icmp ule <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmple_epu32_mask(__a, __b); } __mmask8 test_mm256_mask_cmple_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmple_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmple_epu32_mask // CHECK: icmp ule <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmple_epu32_mask(__u, __a, __b); } __mmask8 test_mm256_cmple_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmple_epu64_mask + // CHECK-LABEL: test_mm256_cmple_epu64_mask // CHECK: icmp ule <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmple_epu64_mask(__a, __b); } __mmask8 test_mm256_mask_cmple_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmple_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmple_epu64_mask // CHECK: icmp ule <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmple_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmplt_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmplt_epi32_mask + // CHECK-LABEL: test_mm_cmplt_epi32_mask // CHECK: icmp slt <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmplt_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmplt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmplt_epi32_mask + // CHECK-LABEL: test_mm_mask_cmplt_epi32_mask // CHECK: icmp slt <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmplt_epi32_mask(__u, __a, __b); } __mmask8 test_mm_cmplt_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmplt_epi64_mask + // CHECK-LABEL: test_mm_cmplt_epi64_mask // CHECK: icmp slt <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmplt_epi64_mask(__a, __b); } __mmask8 test_mm_mask_cmplt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmplt_epi64_mask + // CHECK-LABEL: test_mm_mask_cmplt_epi64_mask // CHECK: icmp slt <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmplt_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmplt_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmplt_epi32_mask + // CHECK-LABEL: test_mm256_cmplt_epi32_mask // CHECK: icmp slt <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmplt_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmplt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmplt_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmplt_epi32_mask // CHECK: icmp slt <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmplt_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_cmplt_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmplt_epi64_mask + // CHECK-LABEL: test_mm256_cmplt_epi64_mask // CHECK: icmp slt <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmplt_epi64_mask(__a, __b); } __mmask8 test_mm256_mask_cmplt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmplt_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmplt_epi64_mask // CHECK: icmp slt <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmplt_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmplt_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmplt_epu32_mask + // CHECK-LABEL: test_mm_cmplt_epu32_mask // CHECK: icmp ult <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmplt_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmplt_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmplt_epu32_mask + // CHECK-LABEL: test_mm_mask_cmplt_epu32_mask // CHECK: icmp ult <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmplt_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmplt_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmplt_epu64_mask + // CHECK-LABEL: test_mm_cmplt_epu64_mask // CHECK: icmp ult <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmplt_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmplt_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmplt_epu64_mask + // CHECK-LABEL: test_mm_mask_cmplt_epu64_mask // CHECK: icmp ult <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmplt_epu64_mask(__u, __a, __b); } __mmask8 test_mm256_cmplt_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmplt_epu32_mask + // CHECK-LABEL: test_mm256_cmplt_epu32_mask // CHECK: icmp ult <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmplt_epu32_mask(__a, __b); } __mmask8 test_mm256_mask_cmplt_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmplt_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmplt_epu32_mask // CHECK: icmp ult <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmplt_epu32_mask(__u, __a, __b); } __mmask8 test_mm256_cmplt_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmplt_epu64_mask + // CHECK-LABEL: test_mm256_cmplt_epu64_mask // CHECK: icmp ult <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmplt_epu64_mask(__a, __b); } __mmask8 test_mm256_mask_cmplt_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmplt_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmplt_epu64_mask // CHECK: icmp ult <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmplt_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmpneq_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpneq_epi32_mask + // CHECK-LABEL: test_mm_cmpneq_epi32_mask // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpneq_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmpneq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpneq_epi32_mask + // CHECK-LABEL: test_mm_mask_cmpneq_epi32_mask // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpneq_epi32_mask(__u, __a, __b); } __mmask8 test_mm_cmpneq_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpneq_epi64_mask + // CHECK-LABEL: test_mm_cmpneq_epi64_mask // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpneq_epi64_mask(__a, __b); } __mmask8 test_mm_mask_cmpneq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpneq_epi64_mask + // CHECK-LABEL: test_mm_mask_cmpneq_epi64_mask // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpneq_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpneq_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpneq_epi32_mask + // CHECK-LABEL: test_mm256_cmpneq_epi32_mask // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpneq_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpneq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpneq_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmpneq_epi32_mask // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpneq_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_cmpneq_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpneq_epi64_mask + // CHECK-LABEL: test_mm256_cmpneq_epi64_mask // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpneq_epi64_mask(__a, __b); } __mmask8 test_mm256_mask_cmpneq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpneq_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmpneq_epi64_mask // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpneq_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmpneq_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpneq_epu32_mask + // CHECK-LABEL: test_mm_cmpneq_epu32_mask // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpneq_epu32_mask(__a, __b); } __mmask8 test_mm_mask_cmpneq_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpneq_epu32_mask + // CHECK-LABEL: test_mm_mask_cmpneq_epu32_mask // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpneq_epu32_mask(__u, __a, __b); } __mmask8 test_mm_cmpneq_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpneq_epu64_mask + // CHECK-LABEL: test_mm_cmpneq_epu64_mask // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpneq_epu64_mask(__a, __b); } __mmask8 test_mm_mask_cmpneq_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpneq_epu64_mask + // CHECK-LABEL: test_mm_mask_cmpneq_epu64_mask // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpneq_epu64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpneq_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpneq_epu32_mask + // CHECK-LABEL: test_mm256_cmpneq_epu32_mask // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpneq_epu32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpneq_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpneq_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmpneq_epu32_mask // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpneq_epu32_mask(__u, __a, __b); } __mmask8 test_mm256_cmpneq_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpneq_epu64_mask + // CHECK-LABEL: test_mm256_cmpneq_epu64_mask // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpneq_epu64_mask(__a, __b); } __mmask8 test_mm256_mask_cmpneq_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpneq_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmpneq_epu64_mask // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpneq_epu64_mask(__u, __a, __b); } __mmask8 test_mm_cmp_eq_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmp_eq_epi32_mask + // CHECK-LABEL: test_mm_cmp_eq_epi32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ); } __mmask8 test_mm_mask_cmp_lt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmp_lt_epi32_mask + // CHECK-LABEL: test_mm_mask_cmp_lt_epi32_mask // CHECK: icmp slt <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_LT); } __mmask8 test_mm_cmp_lt_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmp_lt_epi64_mask + // CHECK-LABEL: test_mm_cmp_lt_epi64_mask // CHECK: icmp slt <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmp_epi64_mask(__a, __b, _MM_CMPINT_LT); } __mmask8 test_mm_mask_cmp_eq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmp_eq_epi64_mask + // CHECK-LABEL: test_mm_mask_cmp_eq_epi64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ); } __mmask8 test_mm256_cmp_eq_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmp_eq_epi32_mask + // CHECK-LABEL: test_mm256_cmp_eq_epi32_mask // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmp_epi32_mask(__a, __b, _MM_CMPINT_EQ); } __mmask8 test_mm256_mask_cmp_le_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmp_le_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmp_le_epi32_mask // CHECK: icmp sle <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmp_epi32_mask(__u, __a, __b, _MM_CMPINT_LE); } __mmask8 test_mm256_cmp_eq_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmp_eq_epi64_mask + // CHECK-LABEL: test_mm256_cmp_eq_epi64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmp_epi64_mask(__a, __b, _MM_CMPINT_EQ); } __mmask8 test_mm256_mask_cmp_eq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmp_eq_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmp_eq_epi64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmp_epi64_mask(__u, __a, __b, _MM_CMPINT_EQ); } __mmask8 test_mm_cmp_epu32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmp_epu32_mask + // CHECK-LABEL: test_mm_cmp_epu32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmp_epu32_mask(__a, __b, 0); } __mmask8 test_mm_mask_cmp_epu32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmp_epu32_mask + // CHECK-LABEL: test_mm_mask_cmp_epu32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmp_epu32_mask(__u, __a, __b, 0); } __mmask8 test_mm_cmp_epu64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmp_epu64_mask + // CHECK-LABEL: test_mm_cmp_epu64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmp_epu64_mask(__a, __b, 0); } __mmask8 test_mm_mask_cmp_epu64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmp_epu64_mask + // CHECK-LABEL: test_mm_mask_cmp_epu64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmp_epu64_mask(__u, __a, __b, 0); } __mmask8 test_mm256_cmp_epu32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmp_epu32_mask + // CHECK-LABEL: test_mm256_cmp_epu32_mask // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmp_epu32_mask(__a, __b, 0); } __mmask8 test_mm256_mask_cmp_epu32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmp_epu32_mask + // CHECK-LABEL: test_mm256_mask_cmp_epu32_mask // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmp_epu32_mask(__u, __a, __b, 0); } __mmask8 test_mm256_cmp_epu64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmp_epu64_mask + // CHECK-LABEL: test_mm256_cmp_epu64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmp_epu64_mask(__a, __b, 0); } __mmask8 test_mm256_mask_cmp_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmp_epu64_mask + // CHECK-LABEL: test_mm256_mask_cmp_epu64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmp_epu64_mask(__u, __a, __b, 0); @@ -604,14 +605,14 @@ __mmask8 test_mm256_mask_cmp_epu64_mask(__mmask8 __u, __m256i __a, __m256i __b) __m256i test_mm256_mask_add_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_add_epi32 + //CHECK-LABEL: test_mm256_mask_add_epi32 //CHECK: add <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_add_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_add_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_add_epi32 + //CHECK-LABEL: test_mm256_maskz_add_epi32 //CHECK: add <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_add_epi32(__U, __A, __B); @@ -619,14 +620,14 @@ __m256i test_mm256_maskz_add_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { __m256i test_mm256_mask_add_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_add_epi64 + //CHECK-LABEL: test_mm256_mask_add_epi64 //CHECK: add <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_add_epi64(__W,__U,__A,__B); } __m256i test_mm256_maskz_add_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_add_epi64 + //CHECK-LABEL: test_mm256_maskz_add_epi64 //CHECK: add <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_add_epi64 (__U,__A,__B); @@ -634,14 +635,14 @@ __m256i test_mm256_maskz_add_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { __m256i test_mm256_mask_sub_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_sub_epi32 + //CHECK-LABEL: test_mm256_mask_sub_epi32 //CHECK: sub <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_sub_epi32 (__W,__U,__A,__B); } __m256i test_mm256_maskz_sub_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_sub_epi32 + //CHECK-LABEL: test_mm256_maskz_sub_epi32 //CHECK: sub <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_sub_epi32 (__U,__A,__B); @@ -649,14 +650,14 @@ __m256i test_mm256_maskz_sub_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { __m256i test_mm256_mask_sub_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_sub_epi64 + //CHECK-LABEL: test_mm256_mask_sub_epi64 //CHECK: sub <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_sub_epi64 (__W,__U,__A,__B); } __m256i test_mm256_maskz_sub_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_sub_epi64 + //CHECK-LABEL: test_mm256_maskz_sub_epi64 //CHECK: sub <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_sub_epi64 (__U,__A,__B); @@ -664,7 +665,7 @@ __m256i test_mm256_maskz_sub_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { __m128i test_mm_mask_add_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_add_epi32 + //CHECK-LABEL: test_mm_mask_add_epi32 //CHECK: add <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_add_epi32(__W,__U,__A,__B); @@ -672,7 +673,7 @@ __m128i test_mm_mask_add_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i test_mm_maskz_add_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_add_epi32 + //CHECK-LABEL: test_mm_maskz_add_epi32 //CHECK: add <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_add_epi32 (__U,__A,__B); @@ -680,14 +681,14 @@ __m128i test_mm_maskz_add_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { __m128i test_mm_mask_add_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_add_epi64 + //CHECK-LABEL: test_mm_mask_add_epi64 //CHECK: add <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_add_epi64 (__W,__U,__A,__B); } __m128i test_mm_maskz_add_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_add_epi64 + //CHECK-LABEL: test_mm_maskz_add_epi64 //CHECK: add <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_add_epi64 (__U,__A,__B); @@ -695,14 +696,14 @@ __m128i test_mm_maskz_add_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { __m128i test_mm_mask_sub_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_sub_epi32 + //CHECK-LABEL: test_mm_mask_sub_epi32 //CHECK: sub <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_sub_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_sub_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_sub_epi32 + //CHECK-LABEL: test_mm_maskz_sub_epi32 //CHECK: sub <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_sub_epi32(__U, __A, __B); @@ -710,14 +711,14 @@ __m128i test_mm_maskz_sub_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { __m128i test_mm_mask_sub_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_sub_epi64 + //CHECK-LABEL: test_mm_mask_sub_epi64 //CHECK: sub <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_sub_epi64 (__W, __U, __A, __B); } __m128i test_mm_maskz_sub_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_sub_epi64 + //CHECK-LABEL: test_mm_maskz_sub_epi64 //CHECK: sub <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_sub_epi64 (__U, __A, __B); @@ -725,7 +726,7 @@ __m128i test_mm_maskz_sub_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { __m256i test_mm256_mask_mul_epi32 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { - //CHECK-LABEL: @test_mm256_mask_mul_epi32 + //CHECK-LABEL: test_mm256_mask_mul_epi32 //CHECK: shl <4 x i64> %{{.*}}, splat (i64 32) //CHECK: ashr <4 x i64> %{{.*}}, splat (i64 32) //CHECK: shl <4 x i64> %{{.*}}, splat (i64 32) @@ -736,7 +737,7 @@ __m256i test_mm256_mask_mul_epi32 (__m256i __W, __mmask8 __M, __m256i __X, } __m256i test_mm256_maskz_mul_epi32 (__mmask8 __M, __m256i __X, __m256i __Y) { - //CHECK-LABEL: @test_mm256_maskz_mul_epi32 + //CHECK-LABEL: test_mm256_maskz_mul_epi32 //CHECK: shl <4 x i64> %{{.*}}, splat (i64 32) //CHECK: ashr <4 x i64> %{{.*}}, splat (i64 32) //CHECK: shl <4 x i64> %{{.*}}, splat (i64 32) @@ -749,7 +750,7 @@ __m256i test_mm256_maskz_mul_epi32 (__mmask8 __M, __m256i __X, __m256i __Y) { __m128i test_mm_mask_mul_epi32 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { - //CHECK-LABEL: @test_mm_mask_mul_epi32 + //CHECK-LABEL: test_mm_mask_mul_epi32 //CHECK: shl <2 x i64> %{{.*}}, splat (i64 32) //CHECK: ashr <2 x i64> %{{.*}}, splat (i64 32) //CHECK: shl <2 x i64> %{{.*}}, splat (i64 32) @@ -760,7 +761,7 @@ __m128i test_mm_mask_mul_epi32 (__m128i __W, __mmask8 __M, __m128i __X, } __m128i test_mm_maskz_mul_epi32 (__mmask8 __M, __m128i __X, __m128i __Y) { - //CHECK-LABEL: @test_mm_maskz_mul_epi32 + //CHECK-LABEL: test_mm_maskz_mul_epi32 //CHECK: shl <2 x i64> %{{.*}}, splat (i64 32) //CHECK: ashr <2 x i64> %{{.*}}, splat (i64 32) //CHECK: shl <2 x i64> %{{.*}}, splat (i64 32) @@ -772,7 +773,7 @@ __m128i test_mm_maskz_mul_epi32 (__mmask8 __M, __m128i __X, __m128i __Y) { __m256i test_mm256_mask_mul_epu32 (__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { - //CHECK-LABEL: @test_mm256_mask_mul_epu32 + //CHECK-LABEL: test_mm256_mask_mul_epu32 //CHECK: and <4 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: and <4 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: mul <4 x i64> %{{.*}}, %{{.*}} @@ -781,7 +782,7 @@ __m256i test_mm256_mask_mul_epu32 (__m256i __W, __mmask8 __M, __m256i __X, } __m256i test_mm256_maskz_mul_epu32 (__mmask8 __M, __m256i __X, __m256i __Y) { - //CHECK-LABEL: @test_mm256_maskz_mul_epu32 + //CHECK-LABEL: test_mm256_maskz_mul_epu32 //CHECK: and <4 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: and <4 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: mul <4 x i64> %{{.*}}, %{{.*}} @@ -791,7 +792,7 @@ __m256i test_mm256_maskz_mul_epu32 (__mmask8 __M, __m256i __X, __m256i __Y) { __m128i test_mm_mask_mul_epu32 (__m128i __W, __mmask8 __M, __m128i __X, __m128i __Y) { - //CHECK-LABEL: @test_mm_mask_mul_epu32 + //CHECK-LABEL: test_mm_mask_mul_epu32 //CHECK: and <2 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: and <2 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: mul <2 x i64> %{{.*}}, %{{.*}} @@ -800,7 +801,7 @@ __m128i test_mm_mask_mul_epu32 (__m128i __W, __mmask8 __M, __m128i __X, } __m128i test_mm_maskz_mul_epu32 (__mmask8 __M, __m128i __X, __m128i __Y) { - //CHECK-LABEL: @test_mm_maskz_mul_epu32 + //CHECK-LABEL: test_mm_maskz_mul_epu32 //CHECK: and <2 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: and <2 x i64> %{{.*}}, splat (i64 4294967295) //CHECK: mul <2 x i64> %{{.*}}, %{{.*}} @@ -809,7 +810,7 @@ __m128i test_mm_maskz_mul_epu32 (__mmask8 __M, __m128i __X, __m128i __Y) { } __m128i test_mm_maskz_mullo_epi32 (__mmask8 __M, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_mullo_epi32 + //CHECK-LABEL: test_mm_maskz_mullo_epi32 //CHECK: mul <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_mullo_epi32(__M, __A, __B); @@ -817,14 +818,14 @@ __m128i test_mm_maskz_mullo_epi32 (__mmask8 __M, __m128i __A, __m128i __B) { __m128i test_mm_mask_mullo_epi32 (__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_mullo_epi32 + //CHECK-LABEL: test_mm_mask_mullo_epi32 //CHECK: mul <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_mullo_epi32(__W, __M, __A, __B); } __m256i test_mm256_maskz_mullo_epi32 (__mmask8 __M, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_mullo_epi32 + //CHECK-LABEL: test_mm256_maskz_mullo_epi32 //CHECK: mul <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_mullo_epi32(__M, __A, __B); @@ -832,61 +833,61 @@ __m256i test_mm256_maskz_mullo_epi32 (__mmask8 __M, __m256i __A, __m256i __B) { __m256i test_mm256_mask_mullo_epi32 (__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_mullo_epi32 + //CHECK-LABEL: test_mm256_mask_mullo_epi32 //CHECK: mul <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_mullo_epi32(__W, __M, __A, __B); } __m256i test_mm256_and_epi32 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_and_epi32 + //CHECK-LABEL: test_mm256_and_epi32 //CHECK: and <8 x i32> %{{.*}}, %{{.*}} return _mm256_and_epi32(__A, __B); } __m256i test_mm256_mask_and_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_and_epi32 + //CHECK-LABEL: test_mm256_mask_and_epi32 //CHECK: and <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_and_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_and_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_and_epi32 + //CHECK-LABEL: test_mm256_maskz_and_epi32 //CHECK: and <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_and_epi32(__U, __A, __B); } __m128i test_mm_and_epi32 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_and_epi32 + //CHECK-LABEL: test_mm_and_epi32 //CHECK: and <4 x i32> %{{.*}}, %{{.*}} return _mm_and_epi32(__A, __B); } __m128i test_mm_mask_and_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_and_epi32 + //CHECK-LABEL: test_mm_mask_and_epi32 //CHECK: and <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_and_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_and_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_and_epi32 + //CHECK-LABEL: test_mm_maskz_and_epi32 //CHECK: and <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_and_epi32(__U, __A, __B); } __m256i test_mm256_andnot_epi32 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_andnot_epi32 + //CHECK-LABEL: test_mm256_andnot_epi32 //CHECK: xor <8 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <8 x i32> %{{.*}}, %{{.*}} return _mm256_andnot_epi32(__A, __B); } __m256i test_mm256_mask_andnot_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_andnot_epi32 + //CHECK-LABEL: test_mm256_mask_andnot_epi32 //CHECK: xor <8 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} @@ -894,7 +895,7 @@ __m256i test_mm256_mask_andnot_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __ } __m256i test_mm256_maskz_andnot_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_andnot_epi32 + //CHECK-LABEL: test_mm256_maskz_andnot_epi32 //CHECK: xor <8 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} @@ -902,14 +903,14 @@ __m256i test_mm256_maskz_andnot_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { } __m128i test_mm_andnot_epi32 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_andnot_epi32 + //CHECK-LABEL: test_mm_andnot_epi32 //CHECK: xor <4 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <4 x i32> %{{.*}}, %{{.*}} return _mm_andnot_epi32(__A, __B); } __m128i test_mm_mask_andnot_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_andnot_epi32 + //CHECK-LABEL: test_mm_mask_andnot_epi32 //CHECK: xor <4 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} @@ -917,7 +918,7 @@ __m128i test_mm_mask_andnot_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m12 } __m128i test_mm_maskz_andnot_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_andnot_epi32 + //CHECK-LABEL: test_mm_maskz_andnot_epi32 //CHECK: xor <4 x i32> %{{.*}}, splat (i32 -1) //CHECK: and <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} @@ -925,134 +926,134 @@ __m128i test_mm_maskz_andnot_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { } __m256i test_mm256_or_epi32 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_or_epi32 + //CHECK-LABEL: test_mm256_or_epi32 //CHECK: or <8 x i32> %{{.*}}, %{{.*}} return _mm256_or_epi32(__A, __B); } __m256i test_mm256_mask_or_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_or_epi32 + //CHECK-LABEL: test_mm256_mask_or_epi32 //CHECK: or <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_or_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_or_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_or_epi32 + //CHECK-LABEL: test_mm256_maskz_or_epi32 //CHECK: or <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_or_epi32(__U, __A, __B); } __m128i test_mm_or_epi32 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_or_epi32 + //CHECK-LABEL: test_mm_or_epi32 //CHECK: or <4 x i32> %{{.*}}, %{{.*}} return _mm_or_epi32(__A, __B); } __m128i test_mm_mask_or_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_or_epi32 + //CHECK-LABEL: test_mm_mask_or_epi32 //CHECK: or <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_or_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_or_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_or_epi32 + //CHECK-LABEL: test_mm_maskz_or_epi32 //CHECK: or <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_or_epi32(__U, __A, __B); } __m256i test_mm256_xor_epi32 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_xor_epi32 + //CHECK-LABEL: test_mm256_xor_epi32 //CHECK: or <8 x i32> %{{.*}}, %{{.*}} return _mm256_xor_epi32(__A, __B); } __m256i test_mm256_mask_xor_epi32 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_xor_epi32 + //CHECK-LABEL: test_mm256_mask_xor_epi32 //CHECK: xor <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_xor_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_xor_epi32 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_xor_epi32 + //CHECK-LABEL: test_mm256_maskz_xor_epi32 //CHECK: xor <8 x i32> %{{.*}}, %{{.*}} //CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_xor_epi32(__U, __A, __B); } __m128i test_mm_xor_epi32 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_xor_epi32 + //CHECK-LABEL: test_mm_xor_epi32 //CHECK: xor <4 x i32> %{{.*}}, %{{.*}} return _mm_xor_epi32(__A, __B); } __m128i test_mm_mask_xor_epi32 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_xor_epi32 + //CHECK-LABEL: test_mm_mask_xor_epi32 //CHECK: xor <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_xor_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_xor_epi32 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_xor_epi32 + //CHECK-LABEL: test_mm_maskz_xor_epi32 //CHECK: xor <4 x i32> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_xor_epi32(__U, __A, __B); } __m256i test_mm256_and_epi64 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_and_epi64 + //CHECK-LABEL: test_mm256_and_epi64 //CHECK: and <4 x i64> %{{.*}}, %{{.*}} return _mm256_and_epi64(__A, __B); } __m256i test_mm256_mask_and_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_and_epi64 + //CHECK-LABEL: test_mm256_mask_and_epi64 //CHECK: and <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_and_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_and_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_and_epi64 + //CHECK-LABEL: test_mm256_maskz_and_epi64 //CHECK: and <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_and_epi64(__U, __A, __B); } __m128i test_mm_and_epi64 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_and_epi64 + //CHECK-LABEL: test_mm_and_epi64 //CHECK: and <2 x i64> %{{.*}}, %{{.*}} return _mm_and_epi64(__A, __B); } __m128i test_mm_mask_and_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_and_epi64 + //CHECK-LABEL: test_mm_mask_and_epi64 //CHECK: and <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_and_epi64(__W,__U, __A, __B); } __m128i test_mm_maskz_and_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_and_epi64 + //CHECK-LABEL: test_mm_maskz_and_epi64 //CHECK: and <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_and_epi64(__U, __A, __B); } __m256i test_mm256_andnot_epi64 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_andnot_epi64 + //CHECK-LABEL: test_mm256_andnot_epi64 //CHECK: xor <4 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <4 x i64> %{{.*}}, %{{.*}} return _mm256_andnot_epi64(__A, __B); } __m256i test_mm256_mask_andnot_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_andnot_epi64 + //CHECK-LABEL: test_mm256_mask_andnot_epi64 //CHECK: xor <4 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} @@ -1060,7 +1061,7 @@ __m256i test_mm256_mask_andnot_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __ } __m256i test_mm256_maskz_andnot_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_andnot_epi64 + //CHECK-LABEL: test_mm256_maskz_andnot_epi64 //CHECK: xor <4 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} @@ -1068,14 +1069,14 @@ __m256i test_mm256_maskz_andnot_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { } __m128i test_mm_andnot_epi64 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_andnot_epi64 + //CHECK-LABEL: test_mm_andnot_epi64 //CHECK: xor <2 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <2 x i64> %{{.*}}, %{{.*}} return _mm_andnot_epi64(__A, __B); } __m128i test_mm_mask_andnot_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_andnot_epi64 + //CHECK-LABEL: test_mm_mask_andnot_epi64 //CHECK: xor <2 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} @@ -1083,7 +1084,7 @@ __m128i test_mm_mask_andnot_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m12 } __m128i test_mm_maskz_andnot_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_andnot_epi64 + //CHECK-LABEL: test_mm_maskz_andnot_epi64 //CHECK: xor <2 x i64> %{{.*}}, splat (i64 -1) //CHECK: and <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} @@ -1091,87 +1092,87 @@ __m128i test_mm_maskz_andnot_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { } __m256i test_mm256_or_epi64 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_or_epi64 + //CHECK-LABEL: test_mm256_or_epi64 //CHECK: or <4 x i64> %{{.*}}, %{{.*}} return _mm256_or_epi64(__A, __B); } __m256i test_mm256_mask_or_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_or_epi64 + //CHECK-LABEL: test_mm256_mask_or_epi64 //CHECK: or <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_or_epi64(__W,__U, __A, __B); } __m256i test_mm256_maskz_or_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_or_epi64 + //CHECK-LABEL: test_mm256_maskz_or_epi64 //CHECK: or <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_or_epi64(__U, __A, __B); } __m128i test_mm_or_epi64 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_or_epi64 + //CHECK-LABEL: test_mm_or_epi64 //CHECK: or <2 x i64> %{{.*}}, %{{.*}} return _mm_or_epi64(__A, __B); } __m128i test_mm_mask_or_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_or_epi64 + //CHECK-LABEL: test_mm_mask_or_epi64 //CHECK: or <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_or_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_or_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_or_epi64 + //CHECK-LABEL: test_mm_maskz_or_epi64 //CHECK: or <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_or_epi64( __U, __A, __B); } __m256i test_mm256_xor_epi64 (__m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_xor_epi64 + //CHECK-LABEL: test_mm256_xor_epi64 //CHECK: xor <4 x i64> %{{.*}}, %{{.*}} return _mm256_xor_epi64(__A, __B); } __m256i test_mm256_mask_xor_epi64 (__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_mask_xor_epi64 + //CHECK-LABEL: test_mm256_mask_xor_epi64 //CHECK: xor <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_xor_epi64(__W,__U, __A, __B); } __m256i test_mm256_maskz_xor_epi64 (__mmask8 __U, __m256i __A, __m256i __B) { - //CHECK-LABEL: @test_mm256_maskz_xor_epi64 + //CHECK-LABEL: test_mm256_maskz_xor_epi64 //CHECK: xor <4 x i64> %{{.*}}, %{{.*}} //CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_xor_epi64(__U, __A, __B); } __m128i test_mm_xor_epi64 (__m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_xor_epi64 + //CHECK-LABEL: test_mm_xor_epi64 //CHECK: xor <2 x i64> %{{.*}}, %{{.*}} return _mm_xor_epi64(__A, __B); } __m128i test_mm_mask_xor_epi64 (__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_mask_xor_epi64 + //CHECK-LABEL: test_mm_mask_xor_epi64 //CHECK: xor <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_xor_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_xor_epi64 (__mmask8 __U, __m128i __A, __m128i __B) { - //CHECK-LABEL: @test_mm_maskz_xor_epi64 + //CHECK-LABEL: test_mm_maskz_xor_epi64 //CHECK: xor <2 x i64> %{{.*}}, %{{.*}} //CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_xor_epi64( __U, __A, __B); } __mmask8 test_mm256_cmp_ps_mask_eq_oq(__m256 a, __m256 b) { - // CHECK-LABEL: @test_mm256_cmp_ps_mask_eq_oq + // CHECK-LABEL: test_mm256_cmp_ps_mask_eq_oq // CHECK: fcmp oeq <8 x float> %{{.*}}, %{{.*}} return _mm256_cmp_ps_mask(a, b, _CMP_EQ_OQ); } @@ -1363,7 +1364,7 @@ __mmask8 test_mm256_cmp_ps_mask_true_us(__m256 a, __m256 b) { } __mmask8 test_mm256_mask_cmp_ps_mask_eq_oq(__mmask8 m, __m256 a, __m256 b) { - // CHECK-LABEL: @test_mm256_mask_cmp_ps_mask_eq_oq + // CHECK-LABEL: test_mm256_mask_cmp_ps_mask_eq_oq // CHECK: [[CMP:%.*]] = fcmp oeq <8 x float> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> [[CMP]], {{.*}} return _mm256_mask_cmp_ps_mask(m, a, b, _CMP_EQ_OQ); @@ -1587,7 +1588,7 @@ __mmask8 test_mm256_mask_cmp_ps_mask_true_us(__mmask8 m, __m256 a, __m256 b) { } __mmask8 test_mm256_cmp_pd_mask_eq_oq(__m256d a, __m256d b) { - // CHECK-LABEL: @test_mm256_cmp_pd_mask_eq_oq + // CHECK-LABEL: test_mm256_cmp_pd_mask_eq_oq // CHECK: fcmp oeq <4 x double> %{{.*}}, %{{.*}} return _mm256_cmp_pd_mask(a, b, _CMP_EQ_OQ); } @@ -1779,7 +1780,7 @@ __mmask8 test_mm256_cmp_pd_mask_true_us(__m256d a, __m256d b) { } __mmask8 test_mm256_mask_cmp_pd_mask_eq_oq(__mmask8 m, __m256d a, __m256d b) { - // CHECK-LABEL: @test_mm256_mask_cmp_pd_mask_eq_oq + // CHECK-LABEL: test_mm256_mask_cmp_pd_mask_eq_oq // CHECK: [[CMP:%.*]] = fcmp oeq <4 x double> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> [[CMP]], {{.*}} return _mm256_mask_cmp_pd_mask(m, a, b, _CMP_EQ_OQ); @@ -2003,7 +2004,7 @@ __mmask8 test_mm256_mask_cmp_pd_mask_true_us(__mmask8 m, __m256d a, __m256d b) { } __mmask8 test_mm_cmp_ps_mask_eq_oq(__m128 a, __m128 b) { - // CHECK-LABEL: @test_mm_cmp_ps_mask_eq_oq + // CHECK-LABEL: test_mm_cmp_ps_mask_eq_oq // CHECK: fcmp oeq <4 x float> %{{.*}}, %{{.*}} return _mm_cmp_ps_mask(a, b, _CMP_EQ_OQ); } @@ -2195,7 +2196,7 @@ __mmask8 test_mm_cmp_ps_mask_true_us(__m128 a, __m128 b) { } __mmask8 test_mm_mask_cmp_ps_mask_eq_oq(__mmask8 m, __m128 a, __m128 b) { - // CHECK-LABEL: @test_mm_mask_cmp_ps_mask_eq_oq + // CHECK-LABEL: test_mm_mask_cmp_ps_mask_eq_oq // CHECK: [[CMP:%.*]] = fcmp oeq <4 x float> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> [[CMP]], {{.*}} return _mm_mask_cmp_ps_mask(m, a, b, _CMP_EQ_OQ); @@ -2419,7 +2420,7 @@ __mmask8 test_mm_mask_cmp_ps_mask_true_us(__mmask8 m, __m128 a, __m128 b) { } __mmask8 test_mm_cmp_pd_mask_eq_oq(__m128d a, __m128d b) { - // CHECK-LABEL: @test_mm_cmp_pd_mask_eq_oq + // CHECK-LABEL: test_mm_cmp_pd_mask_eq_oq // CHECK: fcmp oeq <2 x double> %{{.*}}, %{{.*}} return _mm_cmp_pd_mask(a, b, _CMP_EQ_OQ); } @@ -2611,7 +2612,7 @@ __mmask8 test_mm_cmp_pd_mask_true_us(__m128d a, __m128d b) { } __mmask8 test_mm_mask_cmp_pd_mask_eq_oq(__mmask8 m, __m128d a, __m128d b) { - // CHECK-LABEL: @test_mm_mask_cmp_pd_mask_eq_oq + // CHECK-LABEL: test_mm_mask_cmp_pd_mask_eq_oq // CHECK: [[CMP:%.*]] = fcmp oeq <2 x double> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> [[CMP]], {{.*}} return _mm_mask_cmp_pd_mask(m, a, b, _CMP_EQ_OQ); @@ -2835,7 +2836,7 @@ __mmask8 test_mm_mask_cmp_pd_mask_true_us(__mmask8 m, __m128d a, __m128d b) { } __m128d test_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fmadd_pd + // CHECK-LABEL: test_mm_mask_fmadd_pd // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} @@ -2843,7 +2844,7 @@ __m128d test_mm_mask_fmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __ } __m128d test_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fmsub_pd + // CHECK-LABEL: test_mm_mask_fmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -2852,7 +2853,7 @@ __m128d test_mm_mask_fmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __ } __m128d test_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmadd_pd + // CHECK-LABEL: test_mm_mask3_fmadd_pd // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} @@ -2860,7 +2861,7 @@ __m128d test_mm_mask3_fmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 _ } __m128d test_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fnmadd_pd + // CHECK-LABEL: test_mm_mask3_fnmadd_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -2869,7 +2870,7 @@ __m128d test_mm_mask3_fnmadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 } __m128d test_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fmadd_pd + // CHECK-LABEL: test_mm_maskz_fmadd_pd // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} @@ -2877,7 +2878,7 @@ __m128d test_mm_maskz_fmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d _ } __m128d test_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fmsub_pd + // CHECK-LABEL: test_mm_maskz_fmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -2886,7 +2887,7 @@ __m128d test_mm_maskz_fmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d _ } __m128d test_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fnmadd_pd + // CHECK-LABEL: test_mm_maskz_fnmadd_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -2895,7 +2896,7 @@ __m128d test_mm_maskz_fnmadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d } __m128d test_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fnmsub_pd + // CHECK-LABEL: test_mm_maskz_fnmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) @@ -2905,7 +2906,7 @@ __m128d test_mm_maskz_fnmsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d } __m256d test_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fmadd_pd + // CHECK-LABEL: test_mm256_mask_fmadd_pd // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -2913,7 +2914,7 @@ __m256d test_mm256_mask_fmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d } __m256d test_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fmsub_pd + // CHECK-LABEL: test_mm256_mask_fmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2922,7 +2923,7 @@ __m256d test_mm256_mask_fmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d } __m256d test_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmadd_pd + // CHECK-LABEL: test_mm256_mask3_fmadd_pd // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -2930,7 +2931,7 @@ __m256d test_mm256_mask3_fmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask } __m256d test_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fnmadd_pd + // CHECK-LABEL: test_mm256_mask3_fnmadd_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2939,7 +2940,7 @@ __m256d test_mm256_mask3_fnmadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmas } __m256d test_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fmadd_pd + // CHECK-LABEL: test_mm256_maskz_fmadd_pd // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -2947,7 +2948,7 @@ __m256d test_mm256_maskz_fmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256 } __m256d test_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fmsub_pd + // CHECK-LABEL: test_mm256_maskz_fmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2956,7 +2957,7 @@ __m256d test_mm256_maskz_fmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256 } __m256d test_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fnmadd_pd + // CHECK-LABEL: test_mm256_maskz_fnmadd_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2965,7 +2966,7 @@ __m256d test_mm256_maskz_fnmadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m25 } __m256d test_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fnmsub_pd + // CHECK-LABEL: test_mm256_maskz_fnmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) @@ -2975,7 +2976,7 @@ __m256d test_mm256_maskz_fnmsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m25 } __m128 test_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fmadd_ps + // CHECK-LABEL: test_mm_mask_fmadd_ps // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -2983,7 +2984,7 @@ __m128 test_mm_mask_fmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { } __m128 test_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fmsub_ps + // CHECK-LABEL: test_mm_mask_fmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -2992,7 +2993,7 @@ __m128 test_mm_mask_fmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { } __m128 test_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmadd_ps + // CHECK-LABEL: test_mm_mask3_fmadd_ps // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -3000,7 +3001,7 @@ __m128 test_mm_mask3_fmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) } __m128 test_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fnmadd_ps + // CHECK-LABEL: test_mm_mask3_fnmadd_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3009,7 +3010,7 @@ __m128 test_mm_mask3_fnmadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) } __m128 test_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fmadd_ps + // CHECK-LABEL: test_mm_maskz_fmadd_ps // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -3017,7 +3018,7 @@ __m128 test_mm_maskz_fmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) } __m128 test_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fmsub_ps + // CHECK-LABEL: test_mm_maskz_fmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3026,7 +3027,7 @@ __m128 test_mm_maskz_fmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) } __m128 test_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fnmadd_ps + // CHECK-LABEL: test_mm_maskz_fnmadd_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3035,7 +3036,7 @@ __m128 test_mm_maskz_fnmadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) } __m128 test_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fnmsub_ps + // CHECK-LABEL: test_mm_maskz_fnmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) @@ -3045,14 +3046,14 @@ __m128 test_mm_maskz_fnmsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) } __m256 test_mm256_mask_fmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fmadd_ps + // CHECK-LABEL: test_mm256_mask_fmadd_ps // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_fmadd_ps(__A, __U, __B, __C); } __m256 test_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fmsub_ps + // CHECK-LABEL: test_mm256_mask_fmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3060,14 +3061,14 @@ __m256 test_mm256_mask_fmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C } __m256 test_mm256_mask3_fmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmadd_ps + // CHECK-LABEL: test_mm256_mask3_fmadd_ps // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask3_fmadd_ps(__A, __B, __C, __U); } __m256 test_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fnmadd_ps + // CHECK-LABEL: test_mm256_mask3_fnmadd_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3075,14 +3076,14 @@ __m256 test_mm256_mask3_fnmadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 _ } __m256 test_mm256_maskz_fmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fmadd_ps + // CHECK-LABEL: test_mm256_maskz_fmadd_ps // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_fmadd_ps(__U, __A, __B, __C); } __m256 test_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fmsub_ps + // CHECK-LABEL: test_mm256_maskz_fmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3090,7 +3091,7 @@ __m256 test_mm256_maskz_fmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __ } __m256 test_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fnmadd_ps + // CHECK-LABEL: test_mm256_maskz_fnmadd_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3098,7 +3099,7 @@ __m256 test_mm256_maskz_fnmadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 _ } __m256 test_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fnmsub_ps + // CHECK-LABEL: test_mm256_maskz_fnmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) @@ -3107,7 +3108,7 @@ __m256 test_mm256_maskz_fnmsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 _ } __m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fmaddsub_pd + // CHECK-LABEL: test_mm_mask_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3116,7 +3117,7 @@ __m128d test_mm_mask_fmaddsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d } __m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fmsubadd_pd + // CHECK-LABEL: test_mm_mask_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3125,7 +3126,7 @@ __m128d test_mm_mask_fmsubadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d } __m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmaddsub_pd + // CHECK-LABEL: test_mm_mask3_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3134,7 +3135,7 @@ __m128d test_mm_mask3_fmaddsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask } __m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fmaddsub_pd + // CHECK-LABEL: test_mm_maskz_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3143,7 +3144,7 @@ __m128d test_mm_maskz_fmaddsub_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128 } __m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_maskz_fmsubadd_pd + // CHECK-LABEL: test_mm_maskz_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3152,7 +3153,7 @@ __m128d test_mm_maskz_fmsubadd_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128 } __m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fmaddsub_pd + // CHECK-LABEL: test_mm256_mask_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3161,7 +3162,7 @@ __m256d test_mm256_mask_fmaddsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m2 } __m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fmsubadd_pd + // CHECK-LABEL: test_mm256_mask_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3170,7 +3171,7 @@ __m256d test_mm256_mask_fmsubadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m2 } __m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmaddsub_pd + // CHECK-LABEL: test_mm256_mask3_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3179,7 +3180,7 @@ __m256d test_mm256_mask3_fmaddsub_pd(__m256d __A, __m256d __B, __m256d __C, __mm } __m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fmaddsub_pd + // CHECK-LABEL: test_mm256_maskz_fmaddsub_pd // CHECK-NOT: fneg // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3188,7 +3189,7 @@ __m256d test_mm256_maskz_fmaddsub_pd(__mmask8 __U, __m256d __A, __m256d __B, __m } __m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_maskz_fmsubadd_pd + // CHECK-LABEL: test_mm256_maskz_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3197,7 +3198,7 @@ __m256d test_mm256_maskz_fmsubadd_pd(__mmask8 __U, __m256d __A, __m256d __B, __m } __m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fmaddsub_ps + // CHECK-LABEL: test_mm_mask_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3206,7 +3207,7 @@ __m128 test_mm_mask_fmaddsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C } __m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fmsubadd_ps + // CHECK-LABEL: test_mm_mask_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3215,7 +3216,7 @@ __m128 test_mm_mask_fmsubadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C } __m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmaddsub_ps + // CHECK-LABEL: test_mm_mask3_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3224,7 +3225,7 @@ __m128 test_mm_mask3_fmaddsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __ } __m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fmaddsub_ps + // CHECK-LABEL: test_mm_maskz_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3233,7 +3234,7 @@ __m128 test_mm_maskz_fmaddsub_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __ } __m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_maskz_fmsubadd_ps + // CHECK-LABEL: test_mm_maskz_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3242,7 +3243,7 @@ __m128 test_mm_maskz_fmsubadd_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128 __ } __m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fmaddsub_ps + // CHECK-LABEL: test_mm256_mask_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3250,7 +3251,7 @@ __m256 test_mm256_mask_fmaddsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 } __m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fmsubadd_ps + // CHECK-LABEL: test_mm256_mask_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3258,7 +3259,7 @@ __m256 test_mm256_mask_fmsubadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 } __m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmaddsub_ps + // CHECK-LABEL: test_mm256_mask3_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3266,7 +3267,7 @@ __m256 test_mm256_mask3_fmaddsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 } __m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fmaddsub_ps + // CHECK-LABEL: test_mm256_maskz_fmaddsub_ps // CHECK-NOT: fneg // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3274,7 +3275,7 @@ __m256 test_mm256_maskz_fmaddsub_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 } __m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_maskz_fmsubadd_ps + // CHECK-LABEL: test_mm256_maskz_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3282,7 +3283,7 @@ __m256 test_mm256_maskz_fmsubadd_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256 } __m128d test_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmsub_pd + // CHECK-LABEL: test_mm_mask3_fmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3291,7 +3292,7 @@ __m128d test_mm_mask3_fmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 _ } __m256d test_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmsub_pd + // CHECK-LABEL: test_mm256_mask3_fmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3300,7 +3301,7 @@ __m256d test_mm256_mask3_fmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask } __m128 test_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmsub_ps + // CHECK-LABEL: test_mm_mask3_fmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3309,7 +3310,7 @@ __m128 test_mm_mask3_fmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) } __m256 test_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmsub_ps + // CHECK-LABEL: test_mm256_mask3_fmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3317,7 +3318,7 @@ __m256 test_mm256_mask3_fmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __ } __m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmsubadd_pd + // CHECK-LABEL: test_mm_mask3_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <2 x double> %{{.+}} // CHECK: call <2 x double> @llvm.x86.fma.vfmaddsub.pd(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3326,7 +3327,7 @@ __m128d test_mm_mask3_fmsubadd_pd(__m128d __A, __m128d __B, __m128d __C, __mmask } __m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmsubadd_pd + // CHECK-LABEL: test_mm256_mask3_fmsubadd_pd // CHECK: [[NEG:%.+]] = fneg <4 x double> %{{.+}} // CHECK: call <4 x double> @llvm.x86.fma.vfmaddsub.pd.256(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3335,7 +3336,7 @@ __m256d test_mm256_mask3_fmsubadd_pd(__m256d __A, __m256d __B, __m256d __C, __mm } __m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fmsubadd_ps + // CHECK-LABEL: test_mm_mask3_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <4 x float> %{{.+}} // CHECK: call <4 x float> @llvm.x86.fma.vfmaddsub.ps(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> [[NEG]]) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3344,7 +3345,7 @@ __m128 test_mm_mask3_fmsubadd_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __ } __m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fmsubadd_ps + // CHECK-LABEL: test_mm256_mask3_fmsubadd_ps // CHECK: [[NEG:%.+]] = fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.x86.fma.vfmaddsub.ps.256(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> [[NEG]]) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3352,7 +3353,7 @@ __m256 test_mm256_mask3_fmsubadd_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 } __m128d test_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fnmadd_pd + // CHECK-LABEL: test_mm_mask_fnmadd_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -3361,7 +3362,7 @@ __m128d test_mm_mask_fnmadd_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d _ } __m256d test_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fnmadd_pd + // CHECK-LABEL: test_mm256_mask_fnmadd_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3370,7 +3371,7 @@ __m256d test_mm256_mask_fnmadd_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256 } __m128 test_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fnmadd_ps + // CHECK-LABEL: test_mm_mask_fnmadd_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> @@ -3379,7 +3380,7 @@ __m128 test_mm_mask_fnmadd_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) } __m256 test_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fnmadd_ps + // CHECK-LABEL: test_mm256_mask_fnmadd_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} @@ -3387,7 +3388,7 @@ __m256 test_mm256_mask_fnmadd_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __ } __m128d test_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d __C) { - // CHECK-LABEL: @test_mm_mask_fnmsub_pd + // CHECK-LABEL: test_mm_mask_fnmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) @@ -3397,7 +3398,7 @@ __m128d test_mm_mask_fnmsub_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128d _ } __m128d test_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fnmsub_pd + // CHECK-LABEL: test_mm_mask3_fnmsub_pd // CHECK: fneg <2 x double> %{{.*}} // CHECK: fneg <2 x double> %{{.*}} // CHECK: call <2 x double> @llvm.fma.v2f64(<2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}}) @@ -3407,7 +3408,7 @@ __m128d test_mm_mask3_fnmsub_pd(__m128d __A, __m128d __B, __m128d __C, __mmask8 } __m256d test_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256d __C) { - // CHECK-LABEL: @test_mm256_mask_fnmsub_pd + // CHECK-LABEL: test_mm256_mask_fnmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) @@ -3417,7 +3418,7 @@ __m256d test_mm256_mask_fnmsub_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256 } __m256d test_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fnmsub_pd + // CHECK-LABEL: test_mm256_mask3_fnmsub_pd // CHECK: fneg <4 x double> %{{.*}} // CHECK: fneg <4 x double> %{{.*}} // CHECK: call <4 x double> @llvm.fma.v4f64(<4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}}) @@ -3427,7 +3428,7 @@ __m256d test_mm256_mask3_fnmsub_pd(__m256d __A, __m256d __B, __m256d __C, __mmas } __m128 test_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) { - // CHECK-LABEL: @test_mm_mask_fnmsub_ps + // CHECK-LABEL: test_mm_mask_fnmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) @@ -3437,7 +3438,7 @@ __m128 test_mm_mask_fnmsub_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128 __C) } __m128 test_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm_mask3_fnmsub_ps + // CHECK-LABEL: test_mm_mask3_fnmsub_ps // CHECK: fneg <4 x float> %{{.*}} // CHECK: fneg <4 x float> %{{.*}} // CHECK: call <4 x float> @llvm.fma.v4f32(<4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}}) @@ -3447,7 +3448,7 @@ __m128 test_mm_mask3_fnmsub_ps(__m128 __A, __m128 __B, __m128 __C, __mmask8 __U) } __m256 test_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __C) { - // CHECK-LABEL: @test_mm256_mask_fnmsub_ps + // CHECK-LABEL: test_mm256_mask_fnmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) @@ -3456,7 +3457,7 @@ __m256 test_mm256_mask_fnmsub_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256 __ } __m256 test_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 __U) { - // CHECK-LABEL: @test_mm256_mask3_fnmsub_ps + // CHECK-LABEL: test_mm256_mask3_fnmsub_ps // CHECK: fneg <8 x float> %{{.*}} // CHECK: fneg <8 x float> %{{.*}} // CHECK: call <8 x float> @llvm.fma.v8f32(<8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}}) @@ -3465,1006 +3466,1006 @@ __m256 test_mm256_mask3_fnmsub_ps(__m256 __A, __m256 __B, __m256 __C, __mmask8 _ } __m128d test_mm_mask_add_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_add_pd + // CHECK-LABEL: test_mm_mask_add_pd // CHECK: fadd <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_add_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_add_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_add_pd + // CHECK-LABEL: test_mm_maskz_add_pd // CHECK: fadd <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_add_pd(__U,__A,__B); } __m256d test_mm256_mask_add_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_add_pd + // CHECK-LABEL: test_mm256_mask_add_pd // CHECK: fadd <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_add_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_add_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_add_pd + // CHECK-LABEL: test_mm256_maskz_add_pd // CHECK: fadd <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_add_pd(__U,__A,__B); } __m128 test_mm_mask_add_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_add_ps + // CHECK-LABEL: test_mm_mask_add_ps // CHECK: fadd <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_add_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_add_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_add_ps + // CHECK-LABEL: test_mm_maskz_add_ps // CHECK: fadd <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_add_ps(__U,__A,__B); } __m256 test_mm256_mask_add_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_add_ps + // CHECK-LABEL: test_mm256_mask_add_ps // CHECK: fadd <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_add_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_add_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_add_ps + // CHECK-LABEL: test_mm256_maskz_add_ps // CHECK: fadd <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_add_ps(__U,__A,__B); } __m128i test_mm_mask_blend_epi32(__mmask8 __U, __m128i __A, __m128i __W) { - // CHECK-LABEL: @test_mm_mask_blend_epi32 + // CHECK-LABEL: test_mm_mask_blend_epi32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_blend_epi32(__U,__A,__W); } __m256i test_mm256_mask_blend_epi32(__mmask8 __U, __m256i __A, __m256i __W) { - // CHECK-LABEL: @test_mm256_mask_blend_epi32 + // CHECK-LABEL: test_mm256_mask_blend_epi32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_blend_epi32(__U,__A,__W); } __m128d test_mm_mask_blend_pd(__mmask8 __U, __m128d __A, __m128d __W) { - // CHECK-LABEL: @test_mm_mask_blend_pd + // CHECK-LABEL: test_mm_mask_blend_pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_blend_pd(__U,__A,__W); } __m256d test_mm256_mask_blend_pd(__mmask8 __U, __m256d __A, __m256d __W) { - // CHECK-LABEL: @test_mm256_mask_blend_pd + // CHECK-LABEL: test_mm256_mask_blend_pd // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_blend_pd(__U,__A,__W); } __m128 test_mm_mask_blend_ps(__mmask8 __U, __m128 __A, __m128 __W) { - // CHECK-LABEL: @test_mm_mask_blend_ps + // CHECK-LABEL: test_mm_mask_blend_ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_blend_ps(__U,__A,__W); } __m256 test_mm256_mask_blend_ps(__mmask8 __U, __m256 __A, __m256 __W) { - // CHECK-LABEL: @test_mm256_mask_blend_ps + // CHECK-LABEL: test_mm256_mask_blend_ps // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_blend_ps(__U,__A,__W); } __m128i test_mm_mask_blend_epi64(__mmask8 __U, __m128i __A, __m128i __W) { - // CHECK-LABEL: @test_mm_mask_blend_epi64 + // CHECK-LABEL: test_mm_mask_blend_epi64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_blend_epi64(__U,__A,__W); } __m256i test_mm256_mask_blend_epi64(__mmask8 __U, __m256i __A, __m256i __W) { - // CHECK-LABEL: @test_mm256_mask_blend_epi64 + // CHECK-LABEL: test_mm256_mask_blend_epi64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_blend_epi64(__U,__A,__W); } __m128d test_mm_mask_compress_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_compress_pd + // CHECK-LABEL: test_mm_mask_compress_pd // CHECK: @llvm.x86.avx512.mask.compress return _mm_mask_compress_pd(__W,__U,__A); } __m128d test_mm_maskz_compress_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_compress_pd + // CHECK-LABEL: test_mm_maskz_compress_pd // CHECK: @llvm.x86.avx512.mask.compress return _mm_maskz_compress_pd(__U,__A); } __m256d test_mm256_mask_compress_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_compress_pd + // CHECK-LABEL: test_mm256_mask_compress_pd // CHECK: @llvm.x86.avx512.mask.compress return _mm256_mask_compress_pd(__W,__U,__A); } __m256d test_mm256_maskz_compress_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_compress_pd + // CHECK-LABEL: test_mm256_maskz_compress_pd // CHECK: @llvm.x86.avx512.mask.compress return _mm256_maskz_compress_pd(__U,__A); } __m128i test_mm_mask_compress_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_compress_epi64 + // CHECK-LABEL: test_mm_mask_compress_epi64 // CHECK: @llvm.x86.avx512.mask.compress return _mm_mask_compress_epi64(__W,__U,__A); } __m128i test_mm_maskz_compress_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_compress_epi64 + // CHECK-LABEL: test_mm_maskz_compress_epi64 // CHECK: @llvm.x86.avx512.mask.compress return _mm_maskz_compress_epi64(__U,__A); } __m256i test_mm256_mask_compress_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_compress_epi64 + // CHECK-LABEL: test_mm256_mask_compress_epi64 // CHECK: @llvm.x86.avx512.mask.compress return _mm256_mask_compress_epi64(__W,__U,__A); } __m256i test_mm256_maskz_compress_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_compress_epi64 + // CHECK-LABEL: test_mm256_maskz_compress_epi64 // CHECK: @llvm.x86.avx512.mask.compress return _mm256_maskz_compress_epi64(__U,__A); } __m128 test_mm_mask_compress_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_compress_ps + // CHECK-LABEL: test_mm_mask_compress_ps // CHECK: @llvm.x86.avx512.mask.compress return _mm_mask_compress_ps(__W,__U,__A); } __m128 test_mm_maskz_compress_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_compress_ps + // CHECK-LABEL: test_mm_maskz_compress_ps // CHECK: @llvm.x86.avx512.mask.compress return _mm_maskz_compress_ps(__U,__A); } __m256 test_mm256_mask_compress_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_compress_ps + // CHECK-LABEL: test_mm256_mask_compress_ps // CHECK: @llvm.x86.avx512.mask.compress return _mm256_mask_compress_ps(__W,__U,__A); } __m256 test_mm256_maskz_compress_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_compress_ps + // CHECK-LABEL: test_mm256_maskz_compress_ps // CHECK: @llvm.x86.avx512.mask.compress return _mm256_maskz_compress_ps(__U,__A); } __m128i test_mm_mask_compress_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_compress_epi32 + // CHECK-LABEL: test_mm_mask_compress_epi32 // CHECK: @llvm.x86.avx512.mask.compress return _mm_mask_compress_epi32(__W,__U,__A); } __m128i test_mm_maskz_compress_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_compress_epi32 + // CHECK-LABEL: test_mm_maskz_compress_epi32 // CHECK: @llvm.x86.avx512.mask.compress return _mm_maskz_compress_epi32(__U,__A); } __m256i test_mm256_mask_compress_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_compress_epi32 + // CHECK-LABEL: test_mm256_mask_compress_epi32 // CHECK: @llvm.x86.avx512.mask.compress return _mm256_mask_compress_epi32(__W,__U,__A); } __m256i test_mm256_maskz_compress_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_compress_epi32 + // CHECK-LABEL: test_mm256_maskz_compress_epi32 // CHECK: @llvm.x86.avx512.mask.compress return _mm256_maskz_compress_epi32(__U,__A); } void test_mm_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_compressstoreu_pd + // CHECK-LABEL: test_mm_mask_compressstoreu_pd // CHECK: @llvm.masked.compressstore.v2f64(<2 x double> %{{.*}}, ptr %{{.*}}, <2 x i1> %{{.*}}) return _mm_mask_compressstoreu_pd(__P,__U,__A); } void test_mm256_mask_compressstoreu_pd(void *__P, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_compressstoreu_pd + // CHECK-LABEL: test_mm256_mask_compressstoreu_pd // CHECK: @llvm.masked.compressstore.v4f64(<4 x double> %{{.*}}, ptr %{{.*}}, <4 x i1> %{{.*}}) return _mm256_mask_compressstoreu_pd(__P,__U,__A); } void test_mm_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_compressstoreu_epi64 + // CHECK-LABEL: test_mm_mask_compressstoreu_epi64 // CHECK: @llvm.masked.compressstore.v2i64(<2 x i64> %{{.*}}, ptr %{{.*}}, <2 x i1> %{{.*}}) return _mm_mask_compressstoreu_epi64(__P,__U,__A); } void test_mm256_mask_compressstoreu_epi64(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_compressstoreu_epi64 + // CHECK-LABEL: test_mm256_mask_compressstoreu_epi64 // CHECK: @llvm.masked.compressstore.v4i64(<4 x i64> %{{.*}}, ptr %{{.*}}, <4 x i1> %{{.*}}) return _mm256_mask_compressstoreu_epi64(__P,__U,__A); } void test_mm_mask_compressstoreu_ps(void *__P, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_compressstoreu_ps + // CHECK-LABEL: test_mm_mask_compressstoreu_ps // CHECK: @llvm.masked.compressstore.v4f32(<4 x float> %{{.*}}, ptr %{{.*}}, <4 x i1> %{{.*}}) return _mm_mask_compressstoreu_ps(__P,__U,__A); } void test_mm256_mask_compressstoreu_ps(void *__P, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_compressstoreu_ps + // CHECK-LABEL: test_mm256_mask_compressstoreu_ps // CHECK: @llvm.masked.compressstore.v8f32(<8 x float> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}}) return _mm256_mask_compressstoreu_ps(__P,__U,__A); } void test_mm_mask_compressstoreu_epi32(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_compressstoreu_epi32 + // CHECK-LABEL: test_mm_mask_compressstoreu_epi32 // CHECK: @llvm.masked.compressstore.v4i32(<4 x i32> %{{.*}}, ptr %{{.*}}, <4 x i1> %{{.*}}) return _mm_mask_compressstoreu_epi32(__P,__U,__A); } void test_mm256_mask_compressstoreu_epi32(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_compressstoreu_epi32 + // CHECK-LABEL: test_mm256_mask_compressstoreu_epi32 // CHECK: @llvm.masked.compressstore.v8i32(<8 x i32> %{{.*}}, ptr %{{.*}}, <8 x i1> %{{.*}}) return _mm256_mask_compressstoreu_epi32(__P,__U,__A); } __m128d test_mm_mask_cvtepi32_pd(__m128d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_pd + // CHECK-LABEL: test_mm_mask_cvtepi32_pd // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: sitofp <2 x i32> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_mask_cvtepi32_pd(__W,__U,__A); } __m128d test_mm_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi32_pd + // CHECK-LABEL: test_mm_maskz_cvtepi32_pd // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: sitofp <2 x i32> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_maskz_cvtepi32_pd(__U,__A); } __m256d test_mm256_mask_cvtepi32_pd(__m256d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_pd + // CHECK-LABEL: test_mm256_mask_cvtepi32_pd // CHECK: sitofp <4 x i32> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_mask_cvtepi32_pd(__W,__U,__A); } __m256d test_mm256_maskz_cvtepi32_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi32_pd + // CHECK-LABEL: test_mm256_maskz_cvtepi32_pd // CHECK: sitofp <4 x i32> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_maskz_cvtepi32_pd(__U,__A); } __m128 test_mm_mask_cvtepi32_ps(__m128 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_ps + // CHECK-LABEL: test_mm_mask_cvtepi32_ps // CHECK: sitofp <4 x i32> %{{.*}} to <4 x float> // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}} return _mm_mask_cvtepi32_ps(__W,__U,__A); } __m128 test_mm_maskz_cvtepi32_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi32_ps + // CHECK-LABEL: test_mm_maskz_cvtepi32_ps // CHECK: sitofp <4 x i32> %{{.*}} to <4 x float> // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}} return _mm_maskz_cvtepi32_ps(__U,__A); } __m256 test_mm256_mask_cvtepi32_ps(__m256 __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_ps + // CHECK-LABEL: test_mm256_mask_cvtepi32_ps // CHECK: sitofp <8 x i32> %{{.*}} to <8 x float> // CHECK: select <8 x i1> {{.*}}, <8 x float> {{.*}}, <8 x float> {{.*}} return _mm256_mask_cvtepi32_ps(__W,__U,__A); } __m256 test_mm256_maskz_cvtepi32_ps(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi32_ps + // CHECK-LABEL: test_mm256_maskz_cvtepi32_ps // CHECK: sitofp <8 x i32> %{{.*}} to <8 x float> // CHECK: select <8 x i1> {{.*}}, <8 x float> {{.*}}, <8 x float> {{.*}} return _mm256_maskz_cvtepi32_ps(__U,__A); } __m128i test_mm_mask_cvtpd_epi32(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvtpd_epi32 + // CHECK-LABEL: test_mm_mask_cvtpd_epi32 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.128 return _mm_mask_cvtpd_epi32(__W,__U,__A); } __m128i test_mm_maskz_cvtpd_epi32(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvtpd_epi32 + // CHECK-LABEL: test_mm_maskz_cvtpd_epi32 // CHECK: @llvm.x86.avx512.mask.cvtpd2dq.128 return _mm_maskz_cvtpd_epi32(__U,__A); } __m128i test_mm256_mask_cvtpd_epi32(__m128i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvtpd_epi32 + // CHECK-LABEL: test_mm256_mask_cvtpd_epi32 // CHECK: @llvm.x86.avx.cvt.pd2dq.256 // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm256_mask_cvtpd_epi32(__W,__U,__A); } __m128i test_mm256_maskz_cvtpd_epi32(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtpd_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtpd_epi32 // CHECK: @llvm.x86.avx.cvt.pd2dq.256 // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm256_maskz_cvtpd_epi32(__U,__A); } __m128 test_mm_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvtpd_ps + // CHECK-LABEL: test_mm_mask_cvtpd_ps // CHECK: @llvm.x86.avx512.mask.cvtpd2ps return _mm_mask_cvtpd_ps(__W,__U,__A); } __m128 test_mm_maskz_cvtpd_ps(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvtpd_ps + // CHECK-LABEL: test_mm_maskz_cvtpd_ps // CHECK: @llvm.x86.avx512.mask.cvtpd2ps return _mm_maskz_cvtpd_ps(__U,__A); } __m128 test_mm256_mask_cvtpd_ps(__m128 __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvtpd_ps + // CHECK-LABEL: test_mm256_mask_cvtpd_ps // CHECK: @llvm.x86.avx.cvt.pd2.ps.256 // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}} return _mm256_mask_cvtpd_ps(__W,__U,__A); } __m128 test_mm256_maskz_cvtpd_ps(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtpd_ps + // CHECK-LABEL: test_mm256_maskz_cvtpd_ps // CHECK: @llvm.x86.avx.cvt.pd2.ps.256 // CHECK: select <4 x i1> {{.*}}, <4 x float> {{.*}}, <4 x float> {{.*}} return _mm256_maskz_cvtpd_ps(__U,__A); } __m128i test_mm_cvtpd_epu32(__m128d __A) { - // CHECK-LABEL: @test_mm_cvtpd_epu32 + // CHECK-LABEL: test_mm_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.128 return _mm_cvtpd_epu32(__A); } __m128i test_mm_mask_cvtpd_epu32(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvtpd_epu32 + // CHECK-LABEL: test_mm_mask_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.128 return _mm_mask_cvtpd_epu32(__W,__U,__A); } __m128i test_mm_maskz_cvtpd_epu32(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvtpd_epu32 + // CHECK-LABEL: test_mm_maskz_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.128 return _mm_maskz_cvtpd_epu32(__U,__A); } __m128i test_mm256_cvtpd_epu32(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvtpd_epu32 + // CHECK-LABEL: test_mm256_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.256 return _mm256_cvtpd_epu32(__A); } __m128i test_mm256_mask_cvtpd_epu32(__m128i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvtpd_epu32 + // CHECK-LABEL: test_mm256_mask_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.256 return _mm256_mask_cvtpd_epu32(__W,__U,__A); } __m128i test_mm256_maskz_cvtpd_epu32(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtpd_epu32 + // CHECK-LABEL: test_mm256_maskz_cvtpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvtpd2udq.256 return _mm256_maskz_cvtpd_epu32(__U,__A); } __m128i test_mm_mask_cvtps_epi32(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_epi32 + // CHECK-LABEL: test_mm_mask_cvtps_epi32 // CHECK: @llvm.x86.sse2.cvtps2dq // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm_mask_cvtps_epi32(__W,__U,__A); } __m128i test_mm_maskz_cvtps_epi32(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_epi32 + // CHECK-LABEL: test_mm_maskz_cvtps_epi32 // CHECK: @llvm.x86.sse2.cvtps2dq // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm_maskz_cvtps_epi32(__U,__A); } __m256i test_mm256_mask_cvtps_epi32(__m256i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_epi32 + // CHECK-LABEL: test_mm256_mask_cvtps_epi32 // CHECK: @llvm.x86.avx.cvt.ps2dq.256 // CHECK: select <8 x i1> {{.*}}, <8 x i32> {{.*}}, <8 x i32> {{.*}} return _mm256_mask_cvtps_epi32(__W,__U,__A); } __m256i test_mm256_maskz_cvtps_epi32(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtps_epi32 // CHECK: @llvm.x86.avx.cvt.ps2dq.256 // CHECK: select <8 x i1> {{.*}}, <8 x i32> {{.*}}, <8 x i32> {{.*}} return _mm256_maskz_cvtps_epi32(__U,__A); } __m128d test_mm_mask_cvtps_pd(__m128d __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_pd + // CHECK-LABEL: test_mm_mask_cvtps_pd // CHECK: fpext <2 x float> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_mask_cvtps_pd(__W,__U,__A); } __m128d test_mm_maskz_cvtps_pd(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_pd + // CHECK-LABEL: test_mm_maskz_cvtps_pd // CHECK: fpext <2 x float> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_maskz_cvtps_pd(__U,__A); } __m256d test_mm256_mask_cvtps_pd(__m256d __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_pd + // CHECK-LABEL: test_mm256_mask_cvtps_pd // CHECK: fpext <4 x float> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_mask_cvtps_pd(__W,__U,__A); } __m256d test_mm256_maskz_cvtps_pd(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_pd + // CHECK-LABEL: test_mm256_maskz_cvtps_pd // CHECK: fpext <4 x float> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_maskz_cvtps_pd(__U,__A); } __m128i test_mm_cvtps_epu32(__m128 __A) { - // CHECK-LABEL: @test_mm_cvtps_epu32 + // CHECK-LABEL: test_mm_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.128 return _mm_cvtps_epu32(__A); } __m128i test_mm_mask_cvtps_epu32(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_epu32 + // CHECK-LABEL: test_mm_mask_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.128 return _mm_mask_cvtps_epu32(__W,__U,__A); } __m128i test_mm_maskz_cvtps_epu32(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_epu32 + // CHECK-LABEL: test_mm_maskz_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.128 return _mm_maskz_cvtps_epu32(__U,__A); } __m256i test_mm256_cvtps_epu32(__m256 __A) { - // CHECK-LABEL: @test_mm256_cvtps_epu32 + // CHECK-LABEL: test_mm256_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.256 return _mm256_cvtps_epu32(__A); } __m256i test_mm256_mask_cvtps_epu32(__m256i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_epu32 + // CHECK-LABEL: test_mm256_mask_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.256 return _mm256_mask_cvtps_epu32(__W,__U,__A); } __m256i test_mm256_maskz_cvtps_epu32(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_epu32 + // CHECK-LABEL: test_mm256_maskz_cvtps_epu32 // CHECK: @llvm.x86.avx512.mask.cvtps2udq.256 return _mm256_maskz_cvtps_epu32(__U,__A); } __m128i test_mm_mask_cvttpd_epi32(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvttpd_epi32 + // CHECK-LABEL: test_mm_mask_cvttpd_epi32 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.128 return _mm_mask_cvttpd_epi32(__W,__U,__A); } __m128i test_mm_maskz_cvttpd_epi32(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvttpd_epi32 + // CHECK-LABEL: test_mm_maskz_cvttpd_epi32 // CHECK: @llvm.x86.avx512.mask.cvttpd2dq.128 return _mm_maskz_cvttpd_epi32(__U,__A); } __m128i test_mm256_mask_cvttpd_epi32(__m128i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvttpd_epi32 + // CHECK-LABEL: test_mm256_mask_cvttpd_epi32 // CHECK: @llvm.x86.avx.cvtt.pd2dq.256 // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm256_mask_cvttpd_epi32(__W,__U,__A); } __m128i test_mm256_maskz_cvttpd_epi32(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttpd_epi32 + // CHECK-LABEL: test_mm256_maskz_cvttpd_epi32 // CHECK: @llvm.x86.avx.cvtt.pd2dq.256 // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm256_maskz_cvttpd_epi32(__U,__A); } __m128i test_mm_cvttpd_epu32(__m128d __A) { - // CHECK-LABEL: @test_mm_cvttpd_epu32 + // CHECK-LABEL: test_mm_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.128 return _mm_cvttpd_epu32(__A); } __m128i test_mm_mask_cvttpd_epu32(__m128i __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_cvttpd_epu32 + // CHECK-LABEL: test_mm_mask_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.128 return _mm_mask_cvttpd_epu32(__W,__U,__A); } __m128i test_mm_maskz_cvttpd_epu32(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_cvttpd_epu32 + // CHECK-LABEL: test_mm_maskz_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.128 return _mm_maskz_cvttpd_epu32(__U,__A); } __m128i test_mm256_cvttpd_epu32(__m256d __A) { - // CHECK-LABEL: @test_mm256_cvttpd_epu32 + // CHECK-LABEL: test_mm256_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.256 return _mm256_cvttpd_epu32(__A); } __m128i test_mm256_mask_cvttpd_epu32(__m128i __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_cvttpd_epu32 + // CHECK-LABEL: test_mm256_mask_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.256 return _mm256_mask_cvttpd_epu32(__W,__U,__A); } __m128i test_mm256_maskz_cvttpd_epu32(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttpd_epu32 + // CHECK-LABEL: test_mm256_maskz_cvttpd_epu32 // CHECK: @llvm.x86.avx512.mask.cvttpd2udq.256 return _mm256_maskz_cvttpd_epu32(__U,__A); } __m128i test_mm_mask_cvttps_epi32(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvttps_epi32 + // CHECK-LABEL: test_mm_mask_cvttps_epi32 // CHECK: @llvm.x86.sse2.cvttps2dq // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm_mask_cvttps_epi32(__W,__U,__A); } __m128i test_mm_maskz_cvttps_epi32(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvttps_epi32 + // CHECK-LABEL: test_mm_maskz_cvttps_epi32 // CHECK: @llvm.x86.sse2.cvttps2dq // CHECK: select <4 x i1> {{.*}}, <4 x i32> {{.*}}, <4 x i32> {{.*}} return _mm_maskz_cvttps_epi32(__U,__A); } __m256i test_mm256_mask_cvttps_epi32(__m256i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvttps_epi32 + // CHECK-LABEL: test_mm256_mask_cvttps_epi32 // CHECK: @llvm.x86.avx.cvtt.ps2dq.256 // CHECK: select <8 x i1> {{.*}}, <8 x i32> {{.*}}, <8 x i32> {{.*}} return _mm256_mask_cvttps_epi32(__W,__U,__A); } __m256i test_mm256_maskz_cvttps_epi32(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttps_epi32 + // CHECK-LABEL: test_mm256_maskz_cvttps_epi32 // CHECK: @llvm.x86.avx.cvtt.ps2dq.256 // CHECK: select <8 x i1> {{.*}}, <8 x i32> {{.*}}, <8 x i32> {{.*}} return _mm256_maskz_cvttps_epi32(__U,__A); } __m128i test_mm_cvttps_epu32(__m128 __A) { - // CHECK-LABEL: @test_mm_cvttps_epu32 + // CHECK-LABEL: test_mm_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.128 return _mm_cvttps_epu32(__A); } __m128i test_mm_mask_cvttps_epu32(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvttps_epu32 + // CHECK-LABEL: test_mm_mask_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.128 return _mm_mask_cvttps_epu32(__W,__U,__A); } __m128i test_mm_maskz_cvttps_epu32(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvttps_epu32 + // CHECK-LABEL: test_mm_maskz_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.128 return _mm_maskz_cvttps_epu32(__U,__A); } __m256i test_mm256_cvttps_epu32(__m256 __A) { - // CHECK-LABEL: @test_mm256_cvttps_epu32 + // CHECK-LABEL: test_mm256_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.256 return _mm256_cvttps_epu32(__A); } __m256i test_mm256_mask_cvttps_epu32(__m256i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvttps_epu32 + // CHECK-LABEL: test_mm256_mask_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.256 return _mm256_mask_cvttps_epu32(__W,__U,__A); } __m256i test_mm256_maskz_cvttps_epu32(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvttps_epu32 + // CHECK-LABEL: test_mm256_maskz_cvttps_epu32 // CHECK: @llvm.x86.avx512.mask.cvttps2udq.256 return _mm256_maskz_cvttps_epu32(__U,__A); } __m128d test_mm_cvtepu32_pd(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepu32_pd + // CHECK-LABEL: test_mm_cvtepu32_pd // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: uitofp <2 x i32> %{{.*}} to <2 x double> return _mm_cvtepu32_pd(__A); } __m128d test_mm_mask_cvtepu32_pd(__m128d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu32_pd + // CHECK-LABEL: test_mm_mask_cvtepu32_pd // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: uitofp <2 x i32> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_mask_cvtepu32_pd(__W,__U,__A); } __m128d test_mm_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu32_pd + // CHECK-LABEL: test_mm_maskz_cvtepu32_pd // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <2 x i32> <i32 0, i32 1> // CHECK: uitofp <2 x i32> %{{.*}} to <2 x double> // CHECK: select <2 x i1> {{.*}}, <2 x double> {{.*}}, <2 x double> {{.*}} return _mm_maskz_cvtepu32_pd(__U,__A); } __m256d test_mm256_cvtepu32_pd(__m128i __A) { - // CHECK-LABEL: @test_mm256_cvtepu32_pd + // CHECK-LABEL: test_mm256_cvtepu32_pd // CHECK: uitofp <4 x i32> %{{.*}} to <4 x double> return _mm256_cvtepu32_pd(__A); } __m256d test_mm256_mask_cvtepu32_pd(__m256d __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu32_pd + // CHECK-LABEL: test_mm256_mask_cvtepu32_pd // CHECK: uitofp <4 x i32> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_mask_cvtepu32_pd(__W,__U,__A); } __m256d test_mm256_maskz_cvtepu32_pd(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu32_pd + // CHECK-LABEL: test_mm256_maskz_cvtepu32_pd // CHECK: uitofp <4 x i32> %{{.*}} to <4 x double> // CHECK: select <4 x i1> {{.*}}, <4 x double> {{.*}}, <4 x double> {{.*}} return _mm256_maskz_cvtepu32_pd(__U,__A); } __m128 test_mm_cvtepu32_ps(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepu32_ps + // CHECK-LABEL: test_mm_cvtepu32_ps // CHECK: uitofp <4 x i32> %{{.*}} to <4 x float> return _mm_cvtepu32_ps(__A); } __m128 test_mm_mask_cvtepu32_ps(__m128 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu32_ps + // CHECK-LABEL: test_mm_mask_cvtepu32_ps // CHECK: uitofp <4 x i32> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_cvtepu32_ps(__W,__U,__A); } __m128 test_mm_maskz_cvtepu32_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu32_ps + // CHECK-LABEL: test_mm_maskz_cvtepu32_ps // CHECK: uitofp <4 x i32> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_cvtepu32_ps(__U,__A); } __m256 test_mm256_cvtepu32_ps(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepu32_ps + // CHECK-LABEL: test_mm256_cvtepu32_ps // CHECK: uitofp <8 x i32> %{{.*}} to <8 x float> return _mm256_cvtepu32_ps(__A); } __m256 test_mm256_mask_cvtepu32_ps(__m256 __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu32_ps + // CHECK-LABEL: test_mm256_mask_cvtepu32_ps // CHECK: uitofp <8 x i32> %{{.*}} to <8 x float> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_cvtepu32_ps(__W,__U,__A); } __m256 test_mm256_maskz_cvtepu32_ps(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu32_ps + // CHECK-LABEL: test_mm256_maskz_cvtepu32_ps // CHECK: uitofp <8 x i32> %{{.*}} to <8 x float> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_cvtepu32_ps(__U,__A); } __m128d test_mm_mask_div_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_div_pd + // CHECK-LABEL: test_mm_mask_div_pd // CHECK: fdiv <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_div_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_div_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_div_pd + // CHECK-LABEL: test_mm_maskz_div_pd // CHECK: fdiv <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_div_pd(__U,__A,__B); } __m256d test_mm256_mask_div_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_div_pd + // CHECK-LABEL: test_mm256_mask_div_pd // CHECK: fdiv <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_div_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_div_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_div_pd + // CHECK-LABEL: test_mm256_maskz_div_pd // CHECK: fdiv <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_div_pd(__U,__A,__B); } __m128 test_mm_mask_div_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_div_ps + // CHECK-LABEL: test_mm_mask_div_ps // CHECK: fdiv <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_div_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_div_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_div_ps + // CHECK-LABEL: test_mm_maskz_div_ps // CHECK: fdiv <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_div_ps(__U,__A,__B); } __m256 test_mm256_mask_div_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_div_ps + // CHECK-LABEL: test_mm256_mask_div_ps // CHECK: fdiv <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_div_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_div_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_div_ps + // CHECK-LABEL: test_mm256_maskz_div_ps // CHECK: fdiv <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_div_ps(__U,__A,__B); } __m128d test_mm_mask_expand_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_expand_pd + // CHECK-LABEL: test_mm_mask_expand_pd // CHECK: @llvm.x86.avx512.mask.expand return _mm_mask_expand_pd(__W,__U,__A); } __m128d test_mm_maskz_expand_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_expand_pd + // CHECK-LABEL: test_mm_maskz_expand_pd // CHECK: @llvm.x86.avx512.mask.expand return _mm_maskz_expand_pd(__U,__A); } __m256d test_mm256_mask_expand_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_expand_pd + // CHECK-LABEL: test_mm256_mask_expand_pd // CHECK: @llvm.x86.avx512.mask.expand return _mm256_mask_expand_pd(__W,__U,__A); } __m256d test_mm256_maskz_expand_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_expand_pd + // CHECK-LABEL: test_mm256_maskz_expand_pd // CHECK: @llvm.x86.avx512.mask.expand return _mm256_maskz_expand_pd(__U,__A); } __m128i test_mm_mask_expand_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_expand_epi64 + // CHECK-LABEL: test_mm_mask_expand_epi64 // CHECK: @llvm.x86.avx512.mask.expand return _mm_mask_expand_epi64(__W,__U,__A); } __m128i test_mm_maskz_expand_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_expand_epi64 + // CHECK-LABEL: test_mm_maskz_expand_epi64 // CHECK: @llvm.x86.avx512.mask.expand return _mm_maskz_expand_epi64(__U,__A); } __m256i test_mm256_mask_expand_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_expand_epi64 + // CHECK-LABEL: test_mm256_mask_expand_epi64 // CHECK: @llvm.x86.avx512.mask.expand return _mm256_mask_expand_epi64(__W,__U,__A); } __m256i test_mm256_maskz_expand_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_expand_epi64 + // CHECK-LABEL: test_mm256_maskz_expand_epi64 // CHECK: @llvm.x86.avx512.mask.expand return _mm256_maskz_expand_epi64(__U,__A); } __m128d test_mm_mask_expandloadu_pd(__m128d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_expandloadu_pd + // CHECK-LABEL: test_mm_mask_expandloadu_pd // CHECK: @llvm.masked.expandload.v2f64(ptr %{{.*}}, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_mask_expandloadu_pd(__W,__U,__P); } __m128d test_mm_maskz_expandloadu_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_expandloadu_pd + // CHECK-LABEL: test_mm_maskz_expandloadu_pd // CHECK: @llvm.masked.expandload.v2f64(ptr %{{.*}}, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_maskz_expandloadu_pd(__U,__P); } __m256d test_mm256_mask_expandloadu_pd(__m256d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_expandloadu_pd + // CHECK-LABEL: test_mm256_mask_expandloadu_pd // CHECK: @llvm.masked.expandload.v4f64(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_mask_expandloadu_pd(__W,__U,__P); } __m256d test_mm256_maskz_expandloadu_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_expandloadu_pd + // CHECK-LABEL: test_mm256_maskz_expandloadu_pd // CHECK: @llvm.masked.expandload.v4f64(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_maskz_expandloadu_pd(__U,__P); } __m128i test_mm_mask_expandloadu_epi64(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_expandloadu_epi64 + // CHECK-LABEL: test_mm_mask_expandloadu_epi64 // CHECK: @llvm.masked.expandload.v2i64(ptr %{{.*}}, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_mask_expandloadu_epi64(__W,__U,__P); } __m128i test_mm_maskz_expandloadu_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_expandloadu_epi64 + // CHECK-LABEL: test_mm_maskz_expandloadu_epi64 // CHECK: @llvm.masked.expandload.v2i64(ptr %{{.*}}, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_maskz_expandloadu_epi64(__U,__P); } __m256i test_mm256_mask_expandloadu_epi64(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_expandloadu_epi64 + // CHECK-LABEL: test_mm256_mask_expandloadu_epi64 // CHECK: @llvm.masked.expandload.v4i64(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_mask_expandloadu_epi64(__W,__U,__P); } __m256i test_mm256_maskz_expandloadu_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_expandloadu_epi64 + // CHECK-LABEL: test_mm256_maskz_expandloadu_epi64 // CHECK: @llvm.masked.expandload.v4i64(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_maskz_expandloadu_epi64(__U,__P); } __m128 test_mm_mask_expandloadu_ps(__m128 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_expandloadu_ps + // CHECK-LABEL: test_mm_mask_expandloadu_ps // CHECK: @llvm.masked.expandload.v4f32(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_mask_expandloadu_ps(__W,__U,__P); } __m128 test_mm_maskz_expandloadu_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_expandloadu_ps + // CHECK-LABEL: test_mm_maskz_expandloadu_ps // CHECK: @llvm.masked.expandload.v4f32(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_maskz_expandloadu_ps(__U,__P); } __m256 test_mm256_mask_expandloadu_ps(__m256 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_expandloadu_ps + // CHECK-LABEL: test_mm256_mask_expandloadu_ps // CHECK: @llvm.masked.expandload.v8f32(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_mask_expandloadu_ps(__W,__U,__P); } __m256 test_mm256_maskz_expandloadu_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_expandloadu_ps + // CHECK-LABEL: test_mm256_maskz_expandloadu_ps // CHECK: @llvm.masked.expandload.v8f32(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_maskz_expandloadu_ps(__U,__P); } __m128i test_mm_mask_expandloadu_epi32(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_expandloadu_epi32 + // CHECK-LABEL: test_mm_mask_expandloadu_epi32 // CHECK: @llvm.masked.expandload.v4i32(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_mask_expandloadu_epi32(__W,__U,__P); } __m128i test_mm_maskz_expandloadu_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_expandloadu_epi32 + // CHECK-LABEL: test_mm_maskz_expandloadu_epi32 // CHECK: @llvm.masked.expandload.v4i32(ptr %{{.*}}, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_maskz_expandloadu_epi32(__U,__P); } __m256i test_mm256_mask_expandloadu_epi32(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_expandloadu_epi32 + // CHECK-LABEL: test_mm256_mask_expandloadu_epi32 // CHECK: @llvm.masked.expandload.v8i32(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_mask_expandloadu_epi32(__W,__U,__P); } __m256i test_mm256_maskz_expandloadu_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_expandloadu_epi32 + // CHECK-LABEL: test_mm256_maskz_expandloadu_epi32 // CHECK: @llvm.masked.expandload.v8i32(ptr %{{.*}}, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_maskz_expandloadu_epi32(__U,__P); } __m128 test_mm_mask_expand_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_expand_ps + // CHECK-LABEL: test_mm_mask_expand_ps // CHECK: @llvm.x86.avx512.mask.expand return _mm_mask_expand_ps(__W,__U,__A); } __m128 test_mm_maskz_expand_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_expand_ps + // CHECK-LABEL: test_mm_maskz_expand_ps // CHECK: @llvm.x86.avx512.mask.expand return _mm_maskz_expand_ps(__U,__A); } __m256 test_mm256_mask_expand_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_expand_ps + // CHECK-LABEL: test_mm256_mask_expand_ps // CHECK: @llvm.x86.avx512.mask.expand return _mm256_mask_expand_ps(__W,__U,__A); } __m256 test_mm256_maskz_expand_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_expand_ps + // CHECK-LABEL: test_mm256_maskz_expand_ps // CHECK: @llvm.x86.avx512.mask.expand return _mm256_maskz_expand_ps(__U,__A); } __m128i test_mm_mask_expand_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_expand_epi32 + // CHECK-LABEL: test_mm_mask_expand_epi32 // CHECK: @llvm.x86.avx512.mask.expand return _mm_mask_expand_epi32(__W,__U,__A); } __m128i test_mm_maskz_expand_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_expand_epi32 + // CHECK-LABEL: test_mm_maskz_expand_epi32 // CHECK: @llvm.x86.avx512.mask.expand return _mm_maskz_expand_epi32(__U,__A); } __m256i test_mm256_mask_expand_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_expand_epi32 + // CHECK-LABEL: test_mm256_mask_expand_epi32 // CHECK: @llvm.x86.avx512.mask.expand return _mm256_mask_expand_epi32(__W,__U,__A); } __m256i test_mm256_maskz_expand_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_expand_epi32 + // CHECK-LABEL: test_mm256_maskz_expand_epi32 // CHECK: @llvm.x86.avx512.mask.expand return _mm256_maskz_expand_epi32(__U,__A); } __m128d test_mm_getexp_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_getexp_pd + // CHECK-LABEL: test_mm_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.128 return _mm_getexp_pd(__A); } __m128d test_mm_mask_getexp_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_getexp_pd + // CHECK-LABEL: test_mm_mask_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.128 return _mm_mask_getexp_pd(__W,__U,__A); } __m128d test_mm_maskz_getexp_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_getexp_pd + // CHECK-LABEL: test_mm_maskz_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.128 return _mm_maskz_getexp_pd(__U,__A); } __m256d test_mm256_getexp_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_getexp_pd + // CHECK-LABEL: test_mm256_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.256 return _mm256_getexp_pd(__A); } __m256d test_mm256_mask_getexp_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_getexp_pd + // CHECK-LABEL: test_mm256_mask_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.256 return _mm256_mask_getexp_pd(__W,__U,__A); } __m256d test_mm256_maskz_getexp_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_getexp_pd + // CHECK-LABEL: test_mm256_maskz_getexp_pd // CHECK: @llvm.x86.avx512.mask.getexp.pd.256 return _mm256_maskz_getexp_pd(__U,__A); } __m128 test_mm_getexp_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_getexp_ps + // CHECK-LABEL: test_mm_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.128 return _mm_getexp_ps(__A); } __m128 test_mm_mask_getexp_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_getexp_ps + // CHECK-LABEL: test_mm_mask_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.128 return _mm_mask_getexp_ps(__W,__U,__A); } __m128 test_mm_maskz_getexp_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_getexp_ps + // CHECK-LABEL: test_mm_maskz_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.128 return _mm_maskz_getexp_ps(__U,__A); } __m256 test_mm256_getexp_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_getexp_ps + // CHECK-LABEL: test_mm256_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.256 return _mm256_getexp_ps(__A); } __m256 test_mm256_mask_getexp_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_getexp_ps + // CHECK-LABEL: test_mm256_mask_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.256 return _mm256_mask_getexp_ps(__W,__U,__A); } __m256 test_mm256_maskz_getexp_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_getexp_ps + // CHECK-LABEL: test_mm256_maskz_getexp_ps // CHECK: @llvm.x86.avx512.mask.getexp.ps.256 return _mm256_maskz_getexp_ps(__U,__A); } __m128d test_mm_mask_max_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_max_pd + // CHECK-LABEL: test_mm_mask_max_pd // CHECK: @llvm.x86.sse2.max.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_max_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_max_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_max_pd + // CHECK-LABEL: test_mm_maskz_max_pd // CHECK: @llvm.x86.sse2.max.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_max_pd(__U,__A,__B); } __m256d test_mm256_mask_max_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_max_pd + // CHECK-LABEL: test_mm256_mask_max_pd // CHECK: @llvm.x86.avx.max.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_max_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_max_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_max_pd + // CHECK-LABEL: test_mm256_maskz_max_pd // CHECK: @llvm.x86.avx.max.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_max_pd(__U,__A,__B); } __m128 test_mm_mask_max_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_max_ps + // CHECK-LABEL: test_mm_mask_max_ps // CHECK: @llvm.x86.sse.max.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_max_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_max_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_max_ps + // CHECK-LABEL: test_mm_maskz_max_ps // CHECK: @llvm.x86.sse.max.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_max_ps(__U,__A,__B); } __m256 test_mm256_mask_max_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_max_ps + // CHECK-LABEL: test_mm256_mask_max_ps // CHECK: @llvm.x86.avx.max.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_max_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_max_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_max_ps + // CHECK-LABEL: test_mm256_maskz_max_ps // CHECK: @llvm.x86.avx.max.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_max_ps(__U,__A,__B); } __m128d test_mm_mask_min_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_min_pd + // CHECK-LABEL: test_mm_mask_min_pd // CHECK: @llvm.x86.sse2.min.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_min_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_min_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_min_pd + // CHECK-LABEL: test_mm_maskz_min_pd // CHECK: @llvm.x86.sse2.min.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_min_pd(__U,__A,__B); } __m256d test_mm256_mask_min_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_min_pd + // CHECK-LABEL: test_mm256_mask_min_pd // CHECK: @llvm.x86.avx.min.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_min_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_min_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_min_pd + // CHECK-LABEL: test_mm256_maskz_min_pd // CHECK: @llvm.x86.avx.min.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_min_pd(__U,__A,__B); } __m128 test_mm_mask_min_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_min_ps + // CHECK-LABEL: test_mm_mask_min_ps // CHECK: @llvm.x86.sse.min.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_min_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_min_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_min_ps + // CHECK-LABEL: test_mm_maskz_min_ps // CHECK: @llvm.x86.sse.min.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_min_ps(__U,__A,__B); } __m256 test_mm256_mask_min_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_min_ps + // CHECK-LABEL: test_mm256_mask_min_ps // CHECK: @llvm.x86.avx.min.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_min_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_min_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_min_ps + // CHECK-LABEL: test_mm256_maskz_min_ps // CHECK: @llvm.x86.avx.min.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_min_ps(__U,__A,__B); } __m128d test_mm_mask_mul_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_mul_pd + // CHECK-LABEL: test_mm_mask_mul_pd // CHECK: fmul <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_mul_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_mul_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_mul_pd + // CHECK-LABEL: test_mm_maskz_mul_pd // CHECK: fmul <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_mul_pd(__U,__A,__B); } __m256d test_mm256_mask_mul_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_mul_pd + // CHECK-LABEL: test_mm256_mask_mul_pd // CHECK: fmul <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_mul_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_mul_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_mul_pd + // CHECK-LABEL: test_mm256_maskz_mul_pd // CHECK: fmul <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_mul_pd(__U,__A,__B); } __m128 test_mm_mask_mul_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_mul_ps + // CHECK-LABEL: test_mm_mask_mul_ps // CHECK: fmul <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_mul_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_mul_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_mul_ps + // CHECK-LABEL: test_mm_maskz_mul_ps // CHECK: fmul <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_mul_ps(__U,__A,__B); } __m256 test_mm256_mask_mul_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_mul_ps + // CHECK-LABEL: test_mm256_mask_mul_ps // CHECK: fmul <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_mul_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_mul_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_mul_ps + // CHECK-LABEL: test_mm256_maskz_mul_ps // CHECK: fmul <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_mul_ps(__U,__A,__B); } __m128i test_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_abs_epi32 + // CHECK-LABEL: test_mm_mask_abs_epi32 // CHECK: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[ABS]] to <2 x i64> // CHECK: [[ABS:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4472,7 +4473,7 @@ __m128i test_mm_mask_abs_epi32(__m128i __W, __mmask8 __U, __m128i __A) { return _mm_mask_abs_epi32(__W,__U,__A); } __m128i test_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_abs_epi32 + // CHECK-LABEL: test_mm_maskz_abs_epi32 // CHECK: [[ABS:%.*]] = call <4 x i32> @llvm.abs.v4i32(<4 x i32> %{{.*}}, i1 false) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[ABS]] to <2 x i64> // CHECK: [[ABS:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4480,7 +4481,7 @@ __m128i test_mm_maskz_abs_epi32(__mmask8 __U, __m128i __A) { return _mm_maskz_abs_epi32(__U,__A); } __m256i test_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_abs_epi32 + // CHECK-LABEL: test_mm256_mask_abs_epi32 // CHECK: [[ABS:%.*]] = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[ABS]] to <4 x i64> // CHECK: [[ABS:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4488,7 +4489,7 @@ __m256i test_mm256_mask_abs_epi32(__m256i __W, __mmask8 __U, __m256i __A) { return _mm256_mask_abs_epi32(__W,__U,__A); } __m256i test_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_abs_epi32 + // CHECK-LABEL: test_mm256_maskz_abs_epi32 // CHECK: [[ABS:%.*]] = call <8 x i32> @llvm.abs.v8i32(<8 x i32> %{{.*}}, i1 false) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[ABS]] to <4 x i64> // CHECK: [[ABS:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4496,41 +4497,41 @@ __m256i test_mm256_maskz_abs_epi32(__mmask8 __U, __m256i __A) { return _mm256_maskz_abs_epi32(__U,__A); } __m128i test_mm_abs_epi64(__m128i __A) { - // CHECK-LABEL: @test_mm_abs_epi64 - // CHECK: [[ABS:%.*]] = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) return _mm_abs_epi64(__A); } __m128i test_mm_mask_abs_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_abs_epi64 - // CHECK: [[ABS:%.*]] = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm_mask_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) // CHECK: select <2 x i1> %{{.*}}, <2 x i64> [[ABS]], <2 x i64> %{{.*}} return _mm_mask_abs_epi64(__W,__U,__A); } __m128i test_mm_maskz_abs_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_abs_epi64 - // CHECK: [[ABS:%.*]] = call <2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm_maskz_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<2 x i64> @llvm.abs.v2i64(<2 x i64> %{{.*}}, i1 false) // CHECK: select <2 x i1> %{{.*}}, <2 x i64> [[ABS]], <2 x i64> %{{.*}} return _mm_maskz_abs_epi64(__U,__A); } __m256i test_mm256_abs_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_abs_epi64 - // CHECK: [[ABS:%.*]] = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm256_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) return _mm256_abs_epi64(__A); } __m256i test_mm256_mask_abs_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_abs_epi64 - // CHECK: [[ABS:%.*]] = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm256_mask_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) // CHECK: select <4 x i1> %{{.*}}, <4 x i64> [[ABS]], <4 x i64> %{{.*}} return _mm256_mask_abs_epi64(__W,__U,__A); } __m256i test_mm256_maskz_abs_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_abs_epi64 - // CHECK: [[ABS:%.*]] = call <4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) + // CHECK-LABEL: test_mm256_maskz_abs_epi64 + // CHECK: [[ABS:%.*]] = call {{.*}}<4 x i64> @llvm.abs.v4i64(<4 x i64> %{{.*}}, i1 false) // CHECK: select <4 x i1> %{{.*}}, <4 x i64> [[ABS]], <4 x i64> %{{.*}} return _mm256_maskz_abs_epi64(__U,__A); } __m128i test_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_max_epi32 + // CHECK-LABEL: test_mm_maskz_max_epi32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4538,7 +4539,7 @@ __m128i test_mm_maskz_max_epi32(__mmask8 __M, __m128i __A, __m128i __B) { return _mm_maskz_max_epi32(__M,__A,__B); } __m128i test_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_max_epi32 + // CHECK-LABEL: test_mm_mask_max_epi32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4546,7 +4547,7 @@ __m128i test_mm_mask_max_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i _ return _mm_mask_max_epi32(__W,__M,__A,__B); } __m256i test_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_max_epi32 + // CHECK-LABEL: test_mm256_maskz_max_epi32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4554,7 +4555,7 @@ __m256i test_mm256_maskz_max_epi32(__mmask8 __M, __m256i __A, __m256i __B) { return _mm256_maskz_max_epi32(__M,__A,__B); } __m256i test_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_max_epi32 + // CHECK-LABEL: test_mm256_mask_max_epi32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4562,41 +4563,41 @@ __m256i test_mm256_mask_max_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256 return _mm256_mask_max_epi32(__W,__M,__A,__B); } __m128i test_mm_maskz_max_epi64(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_max_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_maskz_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_maskz_max_epi64(__M,__A,__B); } __m128i test_mm_mask_max_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_max_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_mask_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_mask_max_epi64(__W,__M,__A,__B); } __m128i test_mm_max_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_max_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) return _mm_max_epi64(__A,__B); } __m256i test_mm256_maskz_max_epi64(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_max_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_maskz_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_maskz_max_epi64(__M,__A,__B); } __m256i test_mm256_mask_max_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_max_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_mask_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_mask_max_epi64(__W,__M,__A,__B); } __m256i test_mm256_max_epi64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_max_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_max_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_max_epi64(__A,__B); } __m128i test_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_max_epu32 + // CHECK-LABEL: test_mm_maskz_max_epu32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4604,7 +4605,7 @@ __m128i test_mm_maskz_max_epu32(__mmask8 __M, __m128i __A, __m128i __B) { return _mm_maskz_max_epu32(__M,__A,__B); } __m128i test_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_max_epu32 + // CHECK-LABEL: test_mm_mask_max_epu32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umax.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4612,7 +4613,7 @@ __m128i test_mm_mask_max_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i _ return _mm_mask_max_epu32(__W,__M,__A,__B); } __m256i test_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_max_epu32 + // CHECK-LABEL: test_mm256_maskz_max_epu32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4620,7 +4621,7 @@ __m256i test_mm256_maskz_max_epu32(__mmask8 __M, __m256i __A, __m256i __B) { return _mm256_maskz_max_epu32(__M,__A,__B); } __m256i test_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_max_epu32 + // CHECK-LABEL: test_mm256_mask_max_epu32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umax.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4628,41 +4629,41 @@ __m256i test_mm256_mask_max_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256 return _mm256_mask_max_epu32(__W,__M,__A,__B); } __m128i test_mm_maskz_max_epu64(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_max_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_maskz_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_maskz_max_epu64(__M,__A,__B); } __m128i test_mm_max_epu64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_max_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) return _mm_max_epu64(__A,__B); } __m128i test_mm_mask_max_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_max_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_mask_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umax.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_mask_max_epu64(__W,__M,__A,__B); } __m256i test_mm256_maskz_max_epu64(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_max_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_maskz_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_maskz_max_epu64(__M,__A,__B); } __m256i test_mm256_max_epu64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_max_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_max_epu64(__A,__B); } __m256i test_mm256_mask_max_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_max_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_mask_max_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umax.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_mask_max_epu64(__W,__M,__A,__B); } __m128i test_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_min_epi32 + // CHECK-LABEL: test_mm_maskz_min_epi32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4670,7 +4671,7 @@ __m128i test_mm_maskz_min_epi32(__mmask8 __M, __m128i __A, __m128i __B) { return _mm_maskz_min_epi32(__M,__A,__B); } __m128i test_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_min_epi32 + // CHECK-LABEL: test_mm_mask_min_epi32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.smin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4678,7 +4679,7 @@ __m128i test_mm_mask_min_epi32(__m128i __W, __mmask8 __M, __m128i __A, __m128i _ return _mm_mask_min_epi32(__W,__M,__A,__B); } __m256i test_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_min_epi32 + // CHECK-LABEL: test_mm256_maskz_min_epi32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4686,7 +4687,7 @@ __m256i test_mm256_maskz_min_epi32(__mmask8 __M, __m256i __A, __m256i __B) { return _mm256_maskz_min_epi32(__M,__A,__B); } __m256i test_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_min_epi32 + // CHECK-LABEL: test_mm256_mask_min_epi32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.smin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4694,41 +4695,41 @@ __m256i test_mm256_mask_min_epi32(__m256i __W, __mmask8 __M, __m256i __A, __m256 return _mm256_mask_min_epi32(__W,__M,__A,__B); } __m128i test_mm_min_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_min_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) return _mm_min_epi64(__A,__B); } __m128i test_mm_mask_min_epi64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_min_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_mask_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_mask_min_epi64(__W,__M,__A,__B); } __m128i test_mm_maskz_min_epi64(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_min_epi64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_maskz_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.smin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_maskz_min_epi64(__M,__A,__B); } __m256i test_mm256_min_epi64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_min_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_min_epi64(__A,__B); } __m256i test_mm256_mask_min_epi64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_min_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_mask_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_mask_min_epi64(__W,__M,__A,__B); } __m256i test_mm256_maskz_min_epi64(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_min_epi64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_maskz_min_epi64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.smin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_maskz_min_epi64(__M,__A,__B); } __m128i test_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_min_epu32 + // CHECK-LABEL: test_mm_maskz_min_epu32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4736,7 +4737,7 @@ __m128i test_mm_maskz_min_epu32(__mmask8 __M, __m128i __A, __m128i __B) { return _mm_maskz_min_epu32(__M,__A,__B); } __m128i test_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_min_epu32 + // CHECK-LABEL: test_mm_mask_min_epu32 // CHECK: [[RES:%.*]] = call <4 x i32> @llvm.umin.v4i32(<4 x i32> %{{.*}}, <4 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <4 x i32> [[RES]] to <2 x i64> // CHECK: [[RES:%.*]] = bitcast <2 x i64> [[TMP]] to <4 x i32> @@ -4744,7 +4745,7 @@ __m128i test_mm_mask_min_epu32(__m128i __W, __mmask8 __M, __m128i __A, __m128i _ return _mm_mask_min_epu32(__W,__M,__A,__B); } __m256i test_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_min_epu32 + // CHECK-LABEL: test_mm256_maskz_min_epu32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4752,7 +4753,7 @@ __m256i test_mm256_maskz_min_epu32(__mmask8 __M, __m256i __A, __m256i __B) { return _mm256_maskz_min_epu32(__M,__A,__B); } __m256i test_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_min_epu32 + // CHECK-LABEL: test_mm256_mask_min_epu32 // CHECK: [[RES:%.*]] = call <8 x i32> @llvm.umin.v8i32(<8 x i32> %{{.*}}, <8 x i32> %{{.*}}) // CHECK: [[TMP:%.*]] = bitcast <8 x i32> [[RES]] to <4 x i64> // CHECK: [[RES:%.*]] = bitcast <4 x i64> [[TMP]] to <8 x i32> @@ -4760,1115 +4761,1115 @@ __m256i test_mm256_mask_min_epu32(__m256i __W, __mmask8 __M, __m256i __A, __m256 return _mm256_mask_min_epu32(__W,__M,__A,__B); } __m128i test_mm_min_epu64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_min_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) return _mm_min_epu64(__A,__B); } __m128i test_mm_mask_min_epu64(__m128i __W, __mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_min_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_mask_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_mask_min_epu64(__W,__M,__A,__B); } __m128i test_mm_maskz_min_epu64(__mmask8 __M, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_min_epu64 - // CHECK: [[RES:%.*]] = call <2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) + // CHECK-LABEL: test_mm_maskz_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<2 x i64> @llvm.umin.v2i64(<2 x i64> %{{.*}}, <2 x i64> %{{.*}}) // CHECK: select <2 x i1> {{.*}}, <2 x i64> [[RES]], <2 x i64> {{.*}} return _mm_maskz_min_epu64(__M,__A,__B); } __m256i test_mm256_min_epu64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_min_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_min_epu64(__A,__B); } __m256i test_mm256_mask_min_epu64(__m256i __W, __mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_min_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_mask_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_mask_min_epu64(__W,__M,__A,__B); } __m256i test_mm256_maskz_min_epu64(__mmask8 __M, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_min_epu64 - // CHECK: [[RES:%.*]] = call <4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) + // CHECK-LABEL: test_mm256_maskz_min_epu64 + // CHECK: [[RES:%.*]] = call {{.*}}<4 x i64> @llvm.umin.v4i64(<4 x i64> %{{.*}}, <4 x i64> %{{.*}}) // CHECK: select <4 x i1> {{.*}}, <4 x i64> [[RES]], <4 x i64> {{.*}} return _mm256_maskz_min_epu64(__M,__A,__B); } __m128d test_mm_roundscale_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_roundscale_pd + // CHECK-LABEL: test_mm_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.128 return _mm_roundscale_pd(__A,4); } __m128d test_mm_mask_roundscale_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_roundscale_pd + // CHECK-LABEL: test_mm_mask_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.128 return _mm_mask_roundscale_pd(__W,__U,__A,4); } __m128d test_mm_maskz_roundscale_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_roundscale_pd + // CHECK-LABEL: test_mm_maskz_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.128 return _mm_maskz_roundscale_pd(__U,__A,4); } __m256d test_mm256_roundscale_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_roundscale_pd + // CHECK-LABEL: test_mm256_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.256 return _mm256_roundscale_pd(__A,4); } __m256d test_mm256_mask_roundscale_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_roundscale_pd + // CHECK-LABEL: test_mm256_mask_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.256 return _mm256_mask_roundscale_pd(__W,__U,__A,4); } __m256d test_mm256_maskz_roundscale_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_roundscale_pd + // CHECK-LABEL: test_mm256_maskz_roundscale_pd // CHECK: @llvm.x86.avx512.mask.rndscale.pd.256 return _mm256_maskz_roundscale_pd(__U,__A,4); } __m128 test_mm_roundscale_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_roundscale_ps + // CHECK-LABEL: test_mm_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.128 return _mm_roundscale_ps(__A,4); } __m128 test_mm_mask_roundscale_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_roundscale_ps + // CHECK-LABEL: test_mm_mask_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.128 return _mm_mask_roundscale_ps(__W,__U,__A,4); } __m128 test_mm_maskz_roundscale_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_roundscale_ps + // CHECK-LABEL: test_mm_maskz_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.128 return _mm_maskz_roundscale_ps(__U,__A, 4); } __m256 test_mm256_roundscale_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_roundscale_ps + // CHECK-LABEL: test_mm256_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.256 return _mm256_roundscale_ps(__A,4); } __m256 test_mm256_mask_roundscale_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_roundscale_ps + // CHECK-LABEL: test_mm256_mask_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.256 return _mm256_mask_roundscale_ps(__W,__U,__A,4); } __m256 test_mm256_maskz_roundscale_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_roundscale_ps + // CHECK-LABEL: test_mm256_maskz_roundscale_ps // CHECK: @llvm.x86.avx512.mask.rndscale.ps.256 return _mm256_maskz_roundscale_ps(__U,__A,4); } __m128d test_mm_scalef_pd(__m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_scalef_pd + // CHECK-LABEL: test_mm_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.128 return _mm_scalef_pd(__A,__B); } __m128d test_mm_mask_scalef_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_scalef_pd + // CHECK-LABEL: test_mm_mask_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.128 return _mm_mask_scalef_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_scalef_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_scalef_pd + // CHECK-LABEL: test_mm_maskz_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.128 return _mm_maskz_scalef_pd(__U,__A,__B); } __m256d test_mm256_scalef_pd(__m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_scalef_pd + // CHECK-LABEL: test_mm256_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.256 return _mm256_scalef_pd(__A,__B); } __m256d test_mm256_mask_scalef_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_scalef_pd + // CHECK-LABEL: test_mm256_mask_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.256 return _mm256_mask_scalef_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_scalef_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_scalef_pd + // CHECK-LABEL: test_mm256_maskz_scalef_pd // CHECK: @llvm.x86.avx512.mask.scalef.pd.256 return _mm256_maskz_scalef_pd(__U,__A,__B); } __m128 test_mm_scalef_ps(__m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_scalef_ps + // CHECK-LABEL: test_mm_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.128 return _mm_scalef_ps(__A,__B); } __m128 test_mm_mask_scalef_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_scalef_ps + // CHECK-LABEL: test_mm_mask_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.128 return _mm_mask_scalef_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_scalef_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_scalef_ps + // CHECK-LABEL: test_mm_maskz_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.128 return _mm_maskz_scalef_ps(__U,__A,__B); } __m256 test_mm256_scalef_ps(__m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_scalef_ps + // CHECK-LABEL: test_mm256_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.256 return _mm256_scalef_ps(__A,__B); } __m256 test_mm256_mask_scalef_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_scalef_ps + // CHECK-LABEL: test_mm256_mask_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.256 return _mm256_mask_scalef_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_scalef_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_scalef_ps + // CHECK-LABEL: test_mm256_maskz_scalef_ps // CHECK: @llvm.x86.avx512.mask.scalef.ps.256 return _mm256_maskz_scalef_ps(__U,__A,__B); } void test_mm_i64scatter_pd(double *__addr, __m128i __index, __m128d __v1) { - // CHECK-LABEL: @test_mm_i64scatter_pd + // CHECK-LABEL: test_mm_i64scatter_pd // CHECK: @llvm.x86.avx512.mask.scatterdiv2.df return _mm_i64scatter_pd(__addr,__index,__v1,2); } void test_mm_mask_i64scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m128d __v1) { - // CHECK-LABEL: @test_mm_mask_i64scatter_pd + // CHECK-LABEL: test_mm_mask_i64scatter_pd // CHECK: @llvm.x86.avx512.mask.scatterdiv2.df return _mm_mask_i64scatter_pd(__addr,__mask,__index,__v1,2); } void test_mm_i64scatter_epi64(long long *__addr, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_i64scatter_epi64 + // CHECK-LABEL: test_mm_i64scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scatterdiv2.di return _mm_i64scatter_epi64(__addr,__index,__v1,2); } void test_mm_mask_i64scatter_epi64(long long *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_mask_i64scatter_epi64 + // CHECK-LABEL: test_mm_mask_i64scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scatterdiv2.di return _mm_mask_i64scatter_epi64(__addr,__mask,__index,__v1,2); } void test_mm256_i64scatter_pd(double *__addr, __m256i __index, __m256d __v1) { - // CHECK-LABEL: @test_mm256_i64scatter_pd + // CHECK-LABEL: test_mm256_i64scatter_pd // CHECK: @llvm.x86.avx512.mask.scatterdiv4.df return _mm256_i64scatter_pd(__addr,__index,__v1,2); } void test_mm256_mask_i64scatter_pd(double *__addr, __mmask8 __mask, __m256i __index, __m256d __v1) { - // CHECK-LABEL: @test_mm256_mask_i64scatter_pd + // CHECK-LABEL: test_mm256_mask_i64scatter_pd // CHECK: @llvm.x86.avx512.mask.scatterdiv4.df return _mm256_mask_i64scatter_pd(__addr,__mask,__index,__v1,2); } void test_mm256_i64scatter_epi64(long long *__addr, __m256i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_i64scatter_epi64 + // CHECK-LABEL: test_mm256_i64scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scatterdiv4.di return _mm256_i64scatter_epi64(__addr,__index,__v1,2); } void test_mm256_mask_i64scatter_epi64(long long *__addr, __mmask8 __mask, __m256i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_mask_i64scatter_epi64 + // CHECK-LABEL: test_mm256_mask_i64scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scatterdiv4.di return _mm256_mask_i64scatter_epi64(__addr,__mask,__index,__v1,2); } void test_mm_i64scatter_ps(float *__addr, __m128i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm_i64scatter_ps + // CHECK-LABEL: test_mm_i64scatter_ps // CHECK: @llvm.x86.avx512.mask.scatterdiv4.sf return _mm_i64scatter_ps(__addr,__index,__v1,2); } void test_mm_mask_i64scatter_ps(float *__addr, __mmask8 __mask, __m128i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm_mask_i64scatter_ps + // CHECK-LABEL: test_mm_mask_i64scatter_ps // CHECK: @llvm.x86.avx512.mask.scatterdiv4.sf return _mm_mask_i64scatter_ps(__addr,__mask,__index,__v1,2); } void test_mm_i64scatter_epi32(int *__addr, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_i64scatter_epi32 + // CHECK-LABEL: test_mm_i64scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scatterdiv4.si return _mm_i64scatter_epi32(__addr,__index,__v1,2); } void test_mm_mask_i64scatter_epi32(int *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_mask_i64scatter_epi32 + // CHECK-LABEL: test_mm_mask_i64scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scatterdiv4.si return _mm_mask_i64scatter_epi32(__addr,__mask,__index,__v1,2); } void test_mm256_i64scatter_ps(float *__addr, __m256i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm256_i64scatter_ps + // CHECK-LABEL: test_mm256_i64scatter_ps // CHECK: @llvm.x86.avx512.mask.scatterdiv8.sf return _mm256_i64scatter_ps(__addr,__index,__v1,2); } void test_mm256_mask_i64scatter_ps(float *__addr, __mmask8 __mask, __m256i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm256_mask_i64scatter_ps + // CHECK-LABEL: test_mm256_mask_i64scatter_ps // CHECK: @llvm.x86.avx512.mask.scatterdiv8.sf return _mm256_mask_i64scatter_ps(__addr,__mask,__index,__v1,2); } void test_mm256_i64scatter_epi32(int *__addr, __m256i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm256_i64scatter_epi32 + // CHECK-LABEL: test_mm256_i64scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scatterdiv8.si return _mm256_i64scatter_epi32(__addr,__index,__v1,2); } void test_mm256_mask_i64scatter_epi32(int *__addr, __mmask8 __mask, __m256i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm256_mask_i64scatter_epi32 + // CHECK-LABEL: test_mm256_mask_i64scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scatterdiv8.si return _mm256_mask_i64scatter_epi32(__addr,__mask,__index,__v1,2); } void test_mm_i32scatter_pd(double *__addr, __m128i __index, __m128d __v1) { - // CHECK-LABEL: @test_mm_i32scatter_pd + // CHECK-LABEL: test_mm_i32scatter_pd // CHECK: @llvm.x86.avx512.mask.scattersiv2.df return _mm_i32scatter_pd(__addr,__index,__v1,2); } void test_mm_mask_i32scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m128d __v1) { - // CHECK-LABEL: @test_mm_mask_i32scatter_pd + // CHECK-LABEL: test_mm_mask_i32scatter_pd // CHECK: @llvm.x86.avx512.mask.scattersiv2.df return _mm_mask_i32scatter_pd(__addr,__mask,__index,__v1,2); } void test_mm_i32scatter_epi64(long long *__addr, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_i32scatter_epi64 + // CHECK-LABEL: test_mm_i32scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scattersiv2.di return _mm_i32scatter_epi64(__addr,__index,__v1,2); } void test_mm_mask_i32scatter_epi64(long long *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_mask_i32scatter_epi64 + // CHECK-LABEL: test_mm_mask_i32scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scattersiv2.di return _mm_mask_i32scatter_epi64(__addr,__mask,__index,__v1,2); } void test_mm256_i32scatter_pd(double *__addr, __m128i __index, __m256d __v1) { - // CHECK-LABEL: @test_mm256_i32scatter_pd + // CHECK-LABEL: test_mm256_i32scatter_pd // CHECK: @llvm.x86.avx512.mask.scattersiv4.df return _mm256_i32scatter_pd(__addr,__index,__v1,2); } void test_mm256_mask_i32scatter_pd(double *__addr, __mmask8 __mask, __m128i __index, __m256d __v1) { - // CHECK-LABEL: @test_mm256_mask_i32scatter_pd + // CHECK-LABEL: test_mm256_mask_i32scatter_pd // CHECK: @llvm.x86.avx512.mask.scattersiv4.df return _mm256_mask_i32scatter_pd(__addr,__mask,__index,__v1,2); } void test_mm256_i32scatter_epi64(long long *__addr, __m128i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_i32scatter_epi64 + // CHECK-LABEL: test_mm256_i32scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scattersiv4.di return _mm256_i32scatter_epi64(__addr,__index,__v1,2); } void test_mm256_mask_i32scatter_epi64(long long *__addr, __mmask8 __mask, __m128i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_mask_i32scatter_epi64 + // CHECK-LABEL: test_mm256_mask_i32scatter_epi64 // CHECK: @llvm.x86.avx512.mask.scattersiv4.di return _mm256_mask_i32scatter_epi64(__addr,__mask,__index,__v1,2); } void test_mm_i32scatter_ps(float *__addr, __m128i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm_i32scatter_ps + // CHECK-LABEL: test_mm_i32scatter_ps // CHECK: @llvm.x86.avx512.mask.scattersiv4.sf return _mm_i32scatter_ps(__addr,__index,__v1,2); } void test_mm_mask_i32scatter_ps(float *__addr, __mmask8 __mask, __m128i __index, __m128 __v1) { - // CHECK-LABEL: @test_mm_mask_i32scatter_ps + // CHECK-LABEL: test_mm_mask_i32scatter_ps // CHECK: @llvm.x86.avx512.mask.scattersiv4.sf return _mm_mask_i32scatter_ps(__addr,__mask,__index,__v1,2); } void test_mm_i32scatter_epi32(int *__addr, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_i32scatter_epi32 + // CHECK-LABEL: test_mm_i32scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scattersiv4.si return _mm_i32scatter_epi32(__addr,__index,__v1,2); } void test_mm_mask_i32scatter_epi32(int *__addr, __mmask8 __mask, __m128i __index, __m128i __v1) { - // CHECK-LABEL: @test_mm_mask_i32scatter_epi32 + // CHECK-LABEL: test_mm_mask_i32scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scattersiv4.si return _mm_mask_i32scatter_epi32(__addr,__mask,__index,__v1,2); } void test_mm256_i32scatter_ps(float *__addr, __m256i __index, __m256 __v1) { - // CHECK-LABEL: @test_mm256_i32scatter_ps + // CHECK-LABEL: test_mm256_i32scatter_ps // CHECK: @llvm.x86.avx512.mask.scattersiv8.sf return _mm256_i32scatter_ps(__addr,__index,__v1,2); } void test_mm256_mask_i32scatter_ps(float *__addr, __mmask8 __mask, __m256i __index, __m256 __v1) { - // CHECK-LABEL: @test_mm256_mask_i32scatter_ps + // CHECK-LABEL: test_mm256_mask_i32scatter_ps // CHECK: @llvm.x86.avx512.mask.scattersiv8.sf return _mm256_mask_i32scatter_ps(__addr,__mask,__index,__v1,2); } void test_mm256_i32scatter_epi32(int *__addr, __m256i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_i32scatter_epi32 + // CHECK-LABEL: test_mm256_i32scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scattersiv8.si return _mm256_i32scatter_epi32(__addr,__index,__v1,2); } void test_mm256_mask_i32scatter_epi32(int *__addr, __mmask8 __mask, __m256i __index, __m256i __v1) { - // CHECK-LABEL: @test_mm256_mask_i32scatter_epi32 + // CHECK-LABEL: test_mm256_mask_i32scatter_epi32 // CHECK: @llvm.x86.avx512.mask.scattersiv8.si return _mm256_mask_i32scatter_epi32(__addr,__mask,__index,__v1,2); } __m128d test_mm_mask_sqrt_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_sqrt_pd + // CHECK-LABEL: test_mm_mask_sqrt_pd // CHECK: @llvm.sqrt.v2f64 // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_sqrt_pd(__W,__U,__A); } __m128d test_mm_maskz_sqrt_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_sqrt_pd + // CHECK-LABEL: test_mm_maskz_sqrt_pd // CHECK: @llvm.sqrt.v2f64 // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_sqrt_pd(__U,__A); } __m256d test_mm256_mask_sqrt_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_sqrt_pd + // CHECK-LABEL: test_mm256_mask_sqrt_pd // CHECK: @llvm.sqrt.v4f64 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_sqrt_pd(__W,__U,__A); } __m256d test_mm256_maskz_sqrt_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_sqrt_pd + // CHECK-LABEL: test_mm256_maskz_sqrt_pd // CHECK: @llvm.sqrt.v4f64 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_sqrt_pd(__U,__A); } __m128 test_mm_mask_sqrt_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_sqrt_ps + // CHECK-LABEL: test_mm_mask_sqrt_ps // CHECK: @llvm.sqrt.v4f32 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_sqrt_ps(__W,__U,__A); } __m128 test_mm_maskz_sqrt_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_sqrt_ps + // CHECK-LABEL: test_mm_maskz_sqrt_ps // CHECK: @llvm.sqrt.v4f32 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_sqrt_ps(__U,__A); } __m256 test_mm256_mask_sqrt_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_sqrt_ps + // CHECK-LABEL: test_mm256_mask_sqrt_ps // CHECK: @llvm.sqrt.v8f32 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_sqrt_ps(__W,__U,__A); } __m256 test_mm256_maskz_sqrt_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_sqrt_ps + // CHECK-LABEL: test_mm256_maskz_sqrt_ps // CHECK: @llvm.sqrt.v8f32 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_sqrt_ps(__U,__A); } __m128d test_mm_mask_sub_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_sub_pd + // CHECK-LABEL: test_mm_mask_sub_pd // CHECK: fsub <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_sub_pd(__W,__U,__A,__B); } __m128d test_mm_maskz_sub_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_sub_pd + // CHECK-LABEL: test_mm_maskz_sub_pd // CHECK: fsub <2 x double> %{{.*}}, %{{.*}} // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_sub_pd(__U,__A,__B); } __m256d test_mm256_mask_sub_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_sub_pd + // CHECK-LABEL: test_mm256_mask_sub_pd // CHECK: fsub <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_sub_pd(__W,__U,__A,__B); } __m256d test_mm256_maskz_sub_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_sub_pd + // CHECK-LABEL: test_mm256_maskz_sub_pd // CHECK: fsub <4 x double> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_sub_pd(__U,__A,__B); } __m128 test_mm_mask_sub_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_sub_ps + // CHECK-LABEL: test_mm_mask_sub_ps // CHECK: fsub <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_sub_ps(__W,__U,__A,__B); } __m128 test_mm_maskz_sub_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_sub_ps + // CHECK-LABEL: test_mm_maskz_sub_ps // CHECK: fsub <4 x float> %{{.*}}, %{{.*}} // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_sub_ps(__U,__A,__B); } __m256 test_mm256_mask_sub_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_sub_ps + // CHECK-LABEL: test_mm256_mask_sub_ps // CHECK: fsub <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_sub_ps(__W,__U,__A,__B); } __m256 test_mm256_maskz_sub_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_sub_ps + // CHECK-LABEL: test_mm256_maskz_sub_ps // CHECK: fsub <8 x float> %{{.*}}, %{{.*}} // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_sub_ps(__U,__A,__B); } __m128i test_mm_mask2_permutex2var_epi32(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B) { - // CHECK-LABEL: @test_mm_mask2_permutex2var_epi32 + // CHECK-LABEL: test_mm_mask2_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.128 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask2_permutex2var_epi32(__A,__I,__U,__B); } __m256i test_mm256_mask2_permutex2var_epi32(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask2_permutex2var_epi32 + // CHECK-LABEL: test_mm256_mask2_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask2_permutex2var_epi32(__A,__I,__U,__B); } __m128d test_mm_mask2_permutex2var_pd(__m128d __A, __m128i __I, __mmask8 __U, __m128d __B) { - // CHECK-LABEL: @test_mm_mask2_permutex2var_pd + // CHECK-LABEL: test_mm_mask2_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.128 // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask2_permutex2var_pd(__A,__I,__U,__B); } __m256d test_mm256_mask2_permutex2var_pd(__m256d __A, __m256i __I, __mmask8 __U, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask2_permutex2var_pd + // CHECK-LABEL: test_mm256_mask2_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask2_permutex2var_pd(__A,__I,__U,__B); } __m128 test_mm_mask2_permutex2var_ps(__m128 __A, __m128i __I, __mmask8 __U, __m128 __B) { - // CHECK-LABEL: @test_mm_mask2_permutex2var_ps + // CHECK-LABEL: test_mm_mask2_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.128 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask2_permutex2var_ps(__A,__I,__U,__B); } __m256 test_mm256_mask2_permutex2var_ps(__m256 __A, __m256i __I, __mmask8 __U, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask2_permutex2var_ps + // CHECK-LABEL: test_mm256_mask2_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask2_permutex2var_ps(__A,__I,__U,__B); } __m128i test_mm_mask2_permutex2var_epi64(__m128i __A, __m128i __I, __mmask8 __U, __m128i __B) { - // CHECK-LABEL: @test_mm_mask2_permutex2var_epi64 + // CHECK-LABEL: test_mm_mask2_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask2_permutex2var_epi64(__A,__I,__U,__B); } __m256i test_mm256_mask2_permutex2var_epi64(__m256i __A, __m256i __I, __mmask8 __U, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask2_permutex2var_epi64 + // CHECK-LABEL: test_mm256_mask2_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask2_permutex2var_epi64(__A,__I,__U,__B); } __m128i test_mm_permutex2var_epi32(__m128i __A, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_permutex2var_epi32 + // CHECK-LABEL: test_mm_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.128 return _mm_permutex2var_epi32(__A,__I,__B); } __m128i test_mm_mask_permutex2var_epi32(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_permutex2var_epi32 + // CHECK-LABEL: test_mm_mask_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.128 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_permutex2var_epi32(__A,__U,__I,__B); } __m128i test_mm_maskz_permutex2var_epi32(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_permutex2var_epi32 + // CHECK-LABEL: test_mm_maskz_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.128 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_permutex2var_epi32(__U,__A,__I,__B); } __m256i test_mm256_permutex2var_epi32(__m256i __A, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_permutex2var_epi32 + // CHECK-LABEL: test_mm256_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.256 return _mm256_permutex2var_epi32(__A,__I,__B); } __m256i test_mm256_mask_permutex2var_epi32(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_permutex2var_epi32 + // CHECK-LABEL: test_mm256_mask_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_permutex2var_epi32(__A,__U,__I,__B); } __m256i test_mm256_maskz_permutex2var_epi32(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_permutex2var_epi32 + // CHECK-LABEL: test_mm256_maskz_permutex2var_epi32 // CHECK: @llvm.x86.avx512.vpermi2var.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_permutex2var_epi32(__U,__A,__I,__B); } __m128d test_mm_permutex2var_pd(__m128d __A, __m128i __I, __m128d __B) { - // CHECK-LABEL: @test_mm_permutex2var_pd + // CHECK-LABEL: test_mm_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.128 return _mm_permutex2var_pd(__A,__I,__B); } __m128d test_mm_mask_permutex2var_pd(__m128d __A, __mmask8 __U, __m128i __I, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_permutex2var_pd + // CHECK-LABEL: test_mm_mask_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.128 // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_permutex2var_pd(__A,__U,__I,__B); } __m128d test_mm_maskz_permutex2var_pd(__mmask8 __U, __m128d __A, __m128i __I, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_permutex2var_pd + // CHECK-LABEL: test_mm_maskz_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.128 // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_permutex2var_pd(__U,__A,__I,__B); } __m256d test_mm256_permutex2var_pd(__m256d __A, __m256i __I, __m256d __B) { - // CHECK-LABEL: @test_mm256_permutex2var_pd + // CHECK-LABEL: test_mm256_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.256 return _mm256_permutex2var_pd(__A,__I,__B); } __m256d test_mm256_mask_permutex2var_pd(__m256d __A, __mmask8 __U, __m256i __I, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_permutex2var_pd + // CHECK-LABEL: test_mm256_mask_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_permutex2var_pd(__A,__U,__I,__B); } __m256d test_mm256_maskz_permutex2var_pd(__mmask8 __U, __m256d __A, __m256i __I, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_permutex2var_pd + // CHECK-LABEL: test_mm256_maskz_permutex2var_pd // CHECK: @llvm.x86.avx512.vpermi2var.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_permutex2var_pd(__U,__A,__I,__B); } __m128 test_mm_permutex2var_ps(__m128 __A, __m128i __I, __m128 __B) { - // CHECK-LABEL: @test_mm_permutex2var_ps + // CHECK-LABEL: test_mm_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.128 return _mm_permutex2var_ps(__A,__I,__B); } __m128 test_mm_mask_permutex2var_ps(__m128 __A, __mmask8 __U, __m128i __I, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_permutex2var_ps + // CHECK-LABEL: test_mm_mask_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.128 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_permutex2var_ps(__A,__U,__I,__B); } __m128 test_mm_maskz_permutex2var_ps(__mmask8 __U, __m128 __A, __m128i __I, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_permutex2var_ps + // CHECK-LABEL: test_mm_maskz_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.128 // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_permutex2var_ps(__U,__A,__I,__B); } __m256 test_mm256_permutex2var_ps(__m256 __A, __m256i __I, __m256 __B) { - // CHECK-LABEL: @test_mm256_permutex2var_ps + // CHECK-LABEL: test_mm256_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.256 return _mm256_permutex2var_ps(__A,__I,__B); } __m256 test_mm256_mask_permutex2var_ps(__m256 __A, __mmask8 __U, __m256i __I, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_permutex2var_ps + // CHECK-LABEL: test_mm256_mask_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_permutex2var_ps(__A,__U,__I,__B); } __m256 test_mm256_maskz_permutex2var_ps(__mmask8 __U, __m256 __A, __m256i __I, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_permutex2var_ps + // CHECK-LABEL: test_mm256_maskz_permutex2var_ps // CHECK: @llvm.x86.avx512.vpermi2var.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_permutex2var_ps(__U,__A,__I,__B); } __m128i test_mm_permutex2var_epi64(__m128i __A, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_permutex2var_epi64 + // CHECK-LABEL: test_mm_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.128 return _mm_permutex2var_epi64(__A,__I,__B); } __m128i test_mm_mask_permutex2var_epi64(__m128i __A, __mmask8 __U, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_permutex2var_epi64 + // CHECK-LABEL: test_mm_mask_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_permutex2var_epi64(__A,__U,__I,__B); } __m128i test_mm_maskz_permutex2var_epi64(__mmask8 __U, __m128i __A, __m128i __I, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_permutex2var_epi64 + // CHECK-LABEL: test_mm_maskz_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_permutex2var_epi64(__U,__A,__I,__B); } __m256i test_mm256_permutex2var_epi64(__m256i __A, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_permutex2var_epi64 + // CHECK-LABEL: test_mm256_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.256 return _mm256_permutex2var_epi64(__A,__I,__B); } __m256i test_mm256_mask_permutex2var_epi64(__m256i __A, __mmask8 __U, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_permutex2var_epi64 + // CHECK-LABEL: test_mm256_mask_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_permutex2var_epi64(__A,__U,__I,__B); } __m256i test_mm256_maskz_permutex2var_epi64(__mmask8 __U, __m256i __A, __m256i __I, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_permutex2var_epi64 + // CHECK-LABEL: test_mm256_maskz_permutex2var_epi64 // CHECK: @llvm.x86.avx512.vpermi2var.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_permutex2var_epi64(__U,__A,__I,__B); } __m128i test_mm_mask_cvtepi8_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi8_epi32 + // CHECK-LABEL: test_mm_mask_cvtepi8_epi32 // CHECK: sext <4 x i8> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_cvtepi8_epi32(__W, __U, __A); } __m128i test_mm_maskz_cvtepi8_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi8_epi32 + // CHECK-LABEL: test_mm_maskz_cvtepi8_epi32 // CHECK: sext <4 x i8> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_cvtepi8_epi32(__U, __A); } __m256i test_mm256_mask_cvtepi8_epi32(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi8_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepi8_epi32 // CHECK: sext <8 x i8> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_cvtepi8_epi32(__W, __U, __A); } __m256i test_mm256_maskz_cvtepi8_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi8_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtepi8_epi32 // CHECK: sext <8 x i8> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_cvtepi8_epi32(__U, __A); } __m128i test_mm_mask_cvtepi8_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi8_epi64 + // CHECK-LABEL: test_mm_mask_cvtepi8_epi64 // CHECK: sext <2 x i8> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepi8_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi8_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepi8_epi64 // CHECK: sext <2 x i8> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepi8_epi64(__U, __A); } __m256i test_mm256_mask_cvtepi8_epi64(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi8_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepi8_epi64 // CHECK: sext <4 x i8> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepi8_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtepi8_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi8_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepi8_epi64 // CHECK: sext <4 x i8> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepi8_epi64(__U, __A); } __m128i test_mm_mask_cvtepi32_epi64(__m128i __W, __mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_epi64 + // CHECK-LABEL: test_mm_mask_cvtepi32_epi64 // CHECK: sext <2 x i32> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepi32_epi64(__W, __U, __X); } __m128i test_mm_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm_maskz_cvtepi32_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepi32_epi64 // CHECK: sext <2 x i32> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepi32_epi64(__U, __X); } __m256i test_mm256_mask_cvtepi32_epi64(__m256i __W, __mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepi32_epi64 // CHECK: sext <4 x i32> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepi32_epi64(__W, __U, __X); } __m256i test_mm256_maskz_cvtepi32_epi64(__mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi32_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepi32_epi64 // CHECK: sext <4 x i32> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepi32_epi64(__U, __X); } __m128i test_mm_mask_cvtepi16_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi16_epi32 + // CHECK-LABEL: test_mm_mask_cvtepi16_epi32 // CHECK: sext <4 x i16> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_cvtepi16_epi32(__W, __U, __A); } __m128i test_mm_maskz_cvtepi16_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi16_epi32 + // CHECK-LABEL: test_mm_maskz_cvtepi16_epi32 // CHECK: sext <4 x i16> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_cvtepi16_epi32(__U, __A); } __m256i test_mm256_mask_cvtepi16_epi32(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi16_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepi16_epi32 // CHECK: sext <8 x i16> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_cvtepi16_epi32(__W, __U, __A); } __m256i test_mm256_maskz_cvtepi16_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi16_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtepi16_epi32 // CHECK: sext <8 x i16> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_cvtepi16_epi32(__U, __A); } __m128i test_mm_mask_cvtepi16_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi16_epi64 + // CHECK-LABEL: test_mm_mask_cvtepi16_epi64 // CHECK: sext <2 x i16> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepi16_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi16_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepi16_epi64 // CHECK: sext <2 x i16> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepi16_epi64(__U, __A); } __m256i test_mm256_mask_cvtepi16_epi64(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi16_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepi16_epi64 // CHECK: sext <4 x i16> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepi16_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtepi16_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi16_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepi16_epi64 // CHECK: sext <4 x i16> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepi16_epi64(__U, __A); } __m128i test_mm_mask_cvtepu8_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu8_epi32 + // CHECK-LABEL: test_mm_mask_cvtepu8_epi32 // CHECK: zext <4 x i8> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_cvtepu8_epi32(__W, __U, __A); } __m128i test_mm_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu8_epi32 + // CHECK-LABEL: test_mm_maskz_cvtepu8_epi32 // CHECK: zext <4 x i8> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_cvtepu8_epi32(__U, __A); } __m256i test_mm256_mask_cvtepu8_epi32(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu8_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepu8_epi32 // CHECK: zext <8 x i8> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_cvtepu8_epi32(__W, __U, __A); } __m256i test_mm256_maskz_cvtepu8_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu8_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtepu8_epi32 // CHECK: zext <8 x i8> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_cvtepu8_epi32(__U, __A); } __m128i test_mm_mask_cvtepu8_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu8_epi64 + // CHECK-LABEL: test_mm_mask_cvtepu8_epi64 // CHECK: zext <2 x i8> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepu8_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu8_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepu8_epi64 // CHECK: zext <2 x i8> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepu8_epi64(__U, __A); } __m256i test_mm256_mask_cvtepu8_epi64(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu8_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepu8_epi64 // CHECK: zext <4 x i8> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepu8_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtepu8_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu8_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepu8_epi64 // CHECK: zext <4 x i8> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepu8_epi64(__U, __A); } __m128i test_mm_mask_cvtepu32_epi64(__m128i __W, __mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm_mask_cvtepu32_epi64 + // CHECK-LABEL: test_mm_mask_cvtepu32_epi64 // CHECK: zext <2 x i32> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepu32_epi64(__W, __U, __X); } __m128i test_mm_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm_maskz_cvtepu32_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepu32_epi64 // CHECK: zext <2 x i32> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepu32_epi64(__U, __X); } __m256i test_mm256_mask_cvtepu32_epi64(__m256i __W, __mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm256_mask_cvtepu32_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepu32_epi64 // CHECK: zext <4 x i32> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepu32_epi64(__W, __U, __X); } __m256i test_mm256_maskz_cvtepu32_epi64(__mmask8 __U, __m128i __X) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu32_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepu32_epi64 // CHECK: zext <4 x i32> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepu32_epi64(__U, __X); } __m128i test_mm_mask_cvtepu16_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu16_epi32 + // CHECK-LABEL: test_mm_mask_cvtepu16_epi32 // CHECK: zext <4 x i16> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_cvtepu16_epi32(__W, __U, __A); } __m128i test_mm_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu16_epi32 + // CHECK-LABEL: test_mm_maskz_cvtepu16_epi32 // CHECK: zext <4 x i16> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_cvtepu16_epi32(__U, __A); } __m256i test_mm256_mask_cvtepu16_epi32(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu16_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepu16_epi32 // CHECK: zext <8 x i16> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_cvtepu16_epi32(__W, __U, __A); } __m256i test_mm256_maskz_cvtepu16_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu16_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtepu16_epi32 // CHECK: zext <8 x i16> %{{.*}} to <8 x i32> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_cvtepu16_epi32(__U, __A); } __m128i test_mm_mask_cvtepu16_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepu16_epi64 + // CHECK-LABEL: test_mm_mask_cvtepu16_epi64 // CHECK: zext <2 x i16> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_cvtepu16_epi64(__W, __U, __A); } __m128i test_mm_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepu16_epi64 + // CHECK-LABEL: test_mm_maskz_cvtepu16_epi64 // CHECK: zext <2 x i16> %{{.*}} to <2 x i64> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_cvtepu16_epi64(__U, __A); } __m256i test_mm256_mask_cvtepu16_epi64(__m256i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepu16_epi64 + // CHECK-LABEL: test_mm256_mask_cvtepu16_epi64 // CHECK: zext <4 x i16> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_cvtepu16_epi64(__W, __U, __A); } __m256i test_mm256_maskz_cvtepu16_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepu16_epi64 + // CHECK-LABEL: test_mm256_maskz_cvtepu16_epi64 // CHECK: zext <4 x i16> %{{.*}} to <4 x i64> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_cvtepu16_epi64(__U, __A); } __m128i test_mm_rol_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_rol_epi32 + // CHECK-LABEL: test_mm_rol_epi32 // CHECK: @llvm.fshl.v4i32 return _mm_rol_epi32(__A, 5); } __m128i test_mm_mask_rol_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_rol_epi32 + // CHECK-LABEL: test_mm_mask_rol_epi32 // CHECK: @llvm.fshl.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_rol_epi32(__W, __U, __A, 5); } __m128i test_mm_maskz_rol_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_rol_epi32 + // CHECK-LABEL: test_mm_maskz_rol_epi32 // CHECK: @llvm.fshl.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_rol_epi32(__U, __A, 5); } __m256i test_mm256_rol_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_rol_epi32 + // CHECK-LABEL: test_mm256_rol_epi32 // CHECK: @llvm.fshl.v8i32 return _mm256_rol_epi32(__A, 5); } __m256i test_mm256_mask_rol_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_rol_epi32 + // CHECK-LABEL: test_mm256_mask_rol_epi32 // CHECK: @llvm.fshl.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_rol_epi32(__W, __U, __A, 5); } __m256i test_mm256_maskz_rol_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_rol_epi32 + // CHECK-LABEL: test_mm256_maskz_rol_epi32 // CHECK: @llvm.fshl.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_rol_epi32(__U, __A, 5); } __m128i test_mm_rol_epi64(__m128i __A) { - // CHECK-LABEL: @test_mm_rol_epi64 + // CHECK-LABEL: test_mm_rol_epi64 // CHECK: @llvm.fshl.v2i64 return _mm_rol_epi64(__A, 5); } __m128i test_mm_mask_rol_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_rol_epi64 + // CHECK-LABEL: test_mm_mask_rol_epi64 // CHECK: @llvm.fshl.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_rol_epi64(__W, __U, __A, 5); } __m128i test_mm_maskz_rol_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_rol_epi64 + // CHECK-LABEL: test_mm_maskz_rol_epi64 // CHECK: @llvm.fshl.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_rol_epi64(__U, __A, 5); } __m256i test_mm256_rol_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_rol_epi64 + // CHECK-LABEL: test_mm256_rol_epi64 // CHECK: @llvm.fshl.v4i64 return _mm256_rol_epi64(__A, 5); } __m256i test_mm256_mask_rol_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_rol_epi64 + // CHECK-LABEL: test_mm256_mask_rol_epi64 // CHECK: @llvm.fshl.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_rol_epi64(__W, __U, __A, 5); } __m256i test_mm256_maskz_rol_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_rol_epi64 + // CHECK-LABEL: test_mm256_maskz_rol_epi64 // CHECK: @llvm.fshl.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_rol_epi64(__U, __A, 5); } __m128i test_mm_rolv_epi32(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_rolv_epi32 + // CHECK-LABEL: test_mm_rolv_epi32 // CHECK: llvm.fshl.v4i32 return _mm_rolv_epi32(__A, __B); } __m128i test_mm_mask_rolv_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_rolv_epi32 + // CHECK-LABEL: test_mm_mask_rolv_epi32 // CHECK: llvm.fshl.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_rolv_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_rolv_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_rolv_epi32 + // CHECK-LABEL: test_mm_maskz_rolv_epi32 // CHECK: llvm.fshl.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_rolv_epi32(__U, __A, __B); } __m256i test_mm256_rolv_epi32(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_rolv_epi32 + // CHECK-LABEL: test_mm256_rolv_epi32 // CHECK: @llvm.fshl.v8i32 return _mm256_rolv_epi32(__A, __B); } __m256i test_mm256_mask_rolv_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_rolv_epi32 + // CHECK-LABEL: test_mm256_mask_rolv_epi32 // CHECK: @llvm.fshl.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_rolv_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_rolv_epi32(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_rolv_epi32 + // CHECK-LABEL: test_mm256_maskz_rolv_epi32 // CHECK: @llvm.fshl.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_rolv_epi32(__U, __A, __B); } __m128i test_mm_rolv_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_rolv_epi64 + // CHECK-LABEL: test_mm_rolv_epi64 // CHECK: @llvm.fshl.v2i64 return _mm_rolv_epi64(__A, __B); } __m128i test_mm_mask_rolv_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_rolv_epi64 + // CHECK-LABEL: test_mm_mask_rolv_epi64 // CHECK: @llvm.fshl.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_rolv_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_rolv_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_rolv_epi64 + // CHECK-LABEL: test_mm_maskz_rolv_epi64 // CHECK: @llvm.fshl.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_rolv_epi64(__U, __A, __B); } __m256i test_mm256_rolv_epi64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_rolv_epi64 + // CHECK-LABEL: test_mm256_rolv_epi64 // CHECK: @llvm.fshl.v4i64 return _mm256_rolv_epi64(__A, __B); } __m256i test_mm256_mask_rolv_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_rolv_epi64 + // CHECK-LABEL: test_mm256_mask_rolv_epi64 // CHECK: @llvm.fshl.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_rolv_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_rolv_epi64(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_rolv_epi64 + // CHECK-LABEL: test_mm256_maskz_rolv_epi64 // CHECK: @llvm.fshl.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_rolv_epi64(__U, __A, __B); } __m128i test_mm_ror_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_ror_epi32 + // CHECK-LABEL: test_mm_ror_epi32 // CHECK: @llvm.fshr.v4i32 return _mm_ror_epi32(__A, 5); } __m128i test_mm_mask_ror_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_ror_epi32 + // CHECK-LABEL: test_mm_mask_ror_epi32 // CHECK: @llvm.fshr.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_ror_epi32(__W, __U, __A, 5); } __m128i test_mm_maskz_ror_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_ror_epi32 + // CHECK-LABEL: test_mm_maskz_ror_epi32 // CHECK: @llvm.fshr.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_ror_epi32(__U, __A, 5); } __m256i test_mm256_ror_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_ror_epi32 + // CHECK-LABEL: test_mm256_ror_epi32 // CHECK: @llvm.fshr.v8i32 return _mm256_ror_epi32(__A, 5); } __m256i test_mm256_mask_ror_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_ror_epi32 + // CHECK-LABEL: test_mm256_mask_ror_epi32 // CHECK: @llvm.fshr.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_ror_epi32(__W, __U, __A, 5); } __m256i test_mm256_maskz_ror_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_ror_epi32 + // CHECK-LABEL: test_mm256_maskz_ror_epi32 // CHECK: @llvm.fshr.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_ror_epi32(__U, __A, 5); } __m128i test_mm_ror_epi64(__m128i __A) { - // CHECK-LABEL: @test_mm_ror_epi64 + // CHECK-LABEL: test_mm_ror_epi64 // CHECK: @llvm.fshr.v2i64 return _mm_ror_epi64(__A, 5); } __m128i test_mm_mask_ror_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_ror_epi64 + // CHECK-LABEL: test_mm_mask_ror_epi64 // CHECK: @llvm.fshr.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_ror_epi64(__W, __U, __A, 5); } __m128i test_mm_maskz_ror_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_ror_epi64 + // CHECK-LABEL: test_mm_maskz_ror_epi64 // CHECK: @llvm.fshr.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_ror_epi64(__U, __A, 5); } __m256i test_mm256_ror_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_ror_epi64 + // CHECK-LABEL: test_mm256_ror_epi64 // CHECK: @llvm.fshr.v4i64 return _mm256_ror_epi64(__A, 5); } __m256i test_mm256_mask_ror_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_ror_epi64 + // CHECK-LABEL: test_mm256_mask_ror_epi64 // CHECK: @llvm.fshr.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_ror_epi64(__W, __U, __A,5); } __m256i test_mm256_maskz_ror_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_ror_epi64 + // CHECK-LABEL: test_mm256_maskz_ror_epi64 // CHECK: @llvm.fshr.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_ror_epi64(__U, __A, 5); @@ -5876,798 +5877,798 @@ __m256i test_mm256_maskz_ror_epi64(__mmask8 __U, __m256i __A) { __m128i test_mm_rorv_epi32(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_rorv_epi32 + // CHECK-LABEL: test_mm_rorv_epi32 // CHECK: @llvm.fshr.v4i32 return _mm_rorv_epi32(__A, __B); } __m128i test_mm_mask_rorv_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_rorv_epi32 + // CHECK-LABEL: test_mm_mask_rorv_epi32 // CHECK: @llvm.fshr.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_rorv_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_rorv_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_rorv_epi32 + // CHECK-LABEL: test_mm_maskz_rorv_epi32 // CHECK: @llvm.fshr.v4i32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_rorv_epi32(__U, __A, __B); } __m256i test_mm256_rorv_epi32(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_rorv_epi32 + // CHECK-LABEL: test_mm256_rorv_epi32 // CHECK: @llvm.fshr.v8i32 return _mm256_rorv_epi32(__A, __B); } __m256i test_mm256_mask_rorv_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_rorv_epi32 + // CHECK-LABEL: test_mm256_mask_rorv_epi32 // CHECK: @llvm.fshr.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_rorv_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_rorv_epi32(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_rorv_epi32 + // CHECK-LABEL: test_mm256_maskz_rorv_epi32 // CHECK: @llvm.fshr.v8i32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_rorv_epi32(__U, __A, __B); } __m128i test_mm_rorv_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_rorv_epi64 + // CHECK-LABEL: test_mm_rorv_epi64 // CHECK: @llvm.fshr.v2i64 return _mm_rorv_epi64(__A, __B); } __m128i test_mm_mask_rorv_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_rorv_epi64 + // CHECK-LABEL: test_mm_mask_rorv_epi64 // CHECK: @llvm.fshr.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_rorv_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_rorv_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_rorv_epi64 + // CHECK-LABEL: test_mm_maskz_rorv_epi64 // CHECK: @llvm.fshr.v2i64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_rorv_epi64(__U, __A, __B); } __m256i test_mm256_rorv_epi64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_rorv_epi64 + // CHECK-LABEL: test_mm256_rorv_epi64 // CHECK: @llvm.fshr.v4i64 return _mm256_rorv_epi64(__A, __B); } __m256i test_mm256_mask_rorv_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_rorv_epi64 + // CHECK-LABEL: test_mm256_mask_rorv_epi64 // CHECK: @llvm.fshr.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_rorv_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_rorv_epi64(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_rorv_epi64 + // CHECK-LABEL: test_mm256_maskz_rorv_epi64 // CHECK: @llvm.fshr.v4i64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_rorv_epi64(__U, __A, __B); } __m128i test_mm_mask_sllv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_sllv_epi64 + // CHECK-LABEL: test_mm_mask_sllv_epi64 // CHECK: @llvm.x86.avx2.psllv.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_sllv_epi64(__W, __U, __X, __Y); } __m128i test_mm_maskz_sllv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_sllv_epi64 + // CHECK-LABEL: test_mm_maskz_sllv_epi64 // CHECK: @llvm.x86.avx2.psllv.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_sllv_epi64(__U, __X, __Y); } __m256i test_mm256_mask_sllv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_sllv_epi64 + // CHECK-LABEL: test_mm256_mask_sllv_epi64 // CHECK: @llvm.x86.avx2.psllv.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_sllv_epi64(__W, __U, __X, __Y); } __m256i test_mm256_maskz_sllv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_sllv_epi64 + // CHECK-LABEL: test_mm256_maskz_sllv_epi64 // CHECK: @llvm.x86.avx2.psllv.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_sllv_epi64(__U, __X, __Y); } __m128i test_mm_mask_sllv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_sllv_epi32 + // CHECK-LABEL: test_mm_mask_sllv_epi32 // CHECK: @llvm.x86.avx2.psllv.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_sllv_epi32(__W, __U, __X, __Y); } __m128i test_mm_maskz_sllv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_sllv_epi32 + // CHECK-LABEL: test_mm_maskz_sllv_epi32 // CHECK: @llvm.x86.avx2.psllv.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_sllv_epi32(__U, __X, __Y); } __m256i test_mm256_mask_sllv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_sllv_epi32 + // CHECK-LABEL: test_mm256_mask_sllv_epi32 // CHECK: @llvm.x86.avx2.psllv.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_sllv_epi32(__W, __U, __X, __Y); } __m256i test_mm256_maskz_sllv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_sllv_epi32 + // CHECK-LABEL: test_mm256_maskz_sllv_epi32 // CHECK: @llvm.x86.avx2.psllv.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_sllv_epi32(__U, __X, __Y); } __m128i test_mm_mask_srlv_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_srlv_epi64 + // CHECK-LABEL: test_mm_mask_srlv_epi64 // CHECK: @llvm.x86.avx2.psrlv.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srlv_epi64(__W, __U, __X, __Y); } __m128i test_mm_maskz_srlv_epi64(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_srlv_epi64 + // CHECK-LABEL: test_mm_maskz_srlv_epi64 // CHECK: @llvm.x86.avx2.psrlv.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srlv_epi64(__U, __X, __Y); } __m256i test_mm256_mask_srlv_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_srlv_epi64 + // CHECK-LABEL: test_mm256_mask_srlv_epi64 // CHECK: @llvm.x86.avx2.psrlv.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srlv_epi64(__W, __U, __X, __Y); } __m256i test_mm256_maskz_srlv_epi64(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_srlv_epi64 + // CHECK-LABEL: test_mm256_maskz_srlv_epi64 // CHECK: @llvm.x86.avx2.psrlv.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srlv_epi64(__U, __X, __Y); } __m128i test_mm_mask_srlv_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_srlv_epi32 + // CHECK-LABEL: test_mm_mask_srlv_epi32 // CHECK: @llvm.x86.avx2.psrlv.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srlv_epi32(__W, __U, __X, __Y); } __m128i test_mm_maskz_srlv_epi32(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_srlv_epi32 + // CHECK-LABEL: test_mm_maskz_srlv_epi32 // CHECK: @llvm.x86.avx2.psrlv.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srlv_epi32(__U, __X, __Y); } __m256i test_mm256_mask_srlv_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_srlv_epi32 + // CHECK-LABEL: test_mm256_mask_srlv_epi32 // CHECK: @llvm.x86.avx2.psrlv.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srlv_epi32(__W, __U, __X, __Y); } __m256i test_mm256_maskz_srlv_epi32(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_srlv_epi32 + // CHECK-LABEL: test_mm256_maskz_srlv_epi32 // CHECK: @llvm.x86.avx2.psrlv.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srlv_epi32(__U, __X, __Y); } __m128i test_mm_mask_srl_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_srl_epi32 + // CHECK-LABEL: test_mm_mask_srl_epi32 // CHECK: @llvm.x86.sse2.psrl.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srl_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_srl_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_srl_epi32 + // CHECK-LABEL: test_mm_maskz_srl_epi32 // CHECK: @llvm.x86.sse2.psrl.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srl_epi32(__U, __A, __B); } __m256i test_mm256_mask_srl_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_srl_epi32 + // CHECK-LABEL: test_mm256_mask_srl_epi32 // CHECK: @llvm.x86.avx2.psrl.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srl_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_srl_epi32(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_srl_epi32 + // CHECK-LABEL: test_mm256_maskz_srl_epi32 // CHECK: @llvm.x86.avx2.psrl.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srl_epi32(__U, __A, __B); } __m128i test_mm_mask_srli_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_srli_epi32 + // CHECK-LABEL: test_mm_mask_srli_epi32 // CHECK: @llvm.x86.sse2.psrli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srli_epi32(__W, __U, __A, 5); } __m128i test_mm_mask_srli_epi32_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_srli_epi32_2 + // CHECK-LABEL: test_mm_mask_srli_epi32_2 // CHECK: @llvm.x86.sse2.psrli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srli_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_srli_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_srli_epi32 + // CHECK-LABEL: test_mm_maskz_srli_epi32 // CHECK: @llvm.x86.sse2.psrli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srli_epi32(__U, __A, 5); } __m128i test_mm_maskz_srli_epi32_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_srli_epi32_2 + // CHECK-LABEL: test_mm_maskz_srli_epi32_2 // CHECK: @llvm.x86.sse2.psrli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srli_epi32(__U, __A, __B); } __m256i test_mm256_mask_srli_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_srli_epi32 + // CHECK-LABEL: test_mm256_mask_srli_epi32 // CHECK: @llvm.x86.avx2.psrli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srli_epi32(__W, __U, __A, 5); } __m256i test_mm256_mask_srli_epi32_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_srli_epi32_2 + // CHECK-LABEL: test_mm256_mask_srli_epi32_2 // CHECK: @llvm.x86.avx2.psrli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srli_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_srli_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_srli_epi32 + // CHECK-LABEL: test_mm256_maskz_srli_epi32 // CHECK: @llvm.x86.avx2.psrli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srli_epi32(__U, __A, 5); } __m256i test_mm256_maskz_srli_epi32_2(__mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_srli_epi32_2 + // CHECK-LABEL: test_mm256_maskz_srli_epi32_2 // CHECK: @llvm.x86.avx2.psrli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srli_epi32(__U, __A, __B); } __m128i test_mm_mask_srl_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_srl_epi64 + // CHECK-LABEL: test_mm_mask_srl_epi64 // CHECK: @llvm.x86.sse2.psrl.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srl_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_srl_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_srl_epi64 + // CHECK-LABEL: test_mm_maskz_srl_epi64 // CHECK: @llvm.x86.sse2.psrl.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srl_epi64(__U, __A, __B); } __m256i test_mm256_mask_srl_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_srl_epi64 + // CHECK-LABEL: test_mm256_mask_srl_epi64 // CHECK: @llvm.x86.avx2.psrl.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srl_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_srl_epi64(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_srl_epi64 + // CHECK-LABEL: test_mm256_maskz_srl_epi64 // CHECK: @llvm.x86.avx2.psrl.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srl_epi64(__U, __A, __B); } __m128i test_mm_mask_srli_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_srli_epi64 + // CHECK-LABEL: test_mm_mask_srli_epi64 // CHECK: @llvm.x86.sse2.psrli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srli_epi64(__W, __U, __A, 5); } __m128i test_mm_mask_srli_epi64_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_srli_epi64_2 + // CHECK-LABEL: test_mm_mask_srli_epi64_2 // CHECK: @llvm.x86.sse2.psrli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srli_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_srli_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_srli_epi64 + // CHECK-LABEL: test_mm_maskz_srli_epi64 // CHECK: @llvm.x86.sse2.psrli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srli_epi64(__U, __A, 5); } __m128i test_mm_maskz_srli_epi64_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_srli_epi64_2 + // CHECK-LABEL: test_mm_maskz_srli_epi64_2 // CHECK: @llvm.x86.sse2.psrli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srli_epi64(__U, __A, __B); } __m256i test_mm256_mask_srli_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_srli_epi64 + // CHECK-LABEL: test_mm256_mask_srli_epi64 // CHECK: @llvm.x86.avx2.psrli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srli_epi64(__W, __U, __A, 5); } __m256i test_mm256_mask_srli_epi64_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_srli_epi64_2 + // CHECK-LABEL: test_mm256_mask_srli_epi64_2 // CHECK: @llvm.x86.avx2.psrli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srli_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_srli_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_srli_epi64 + // CHECK-LABEL: test_mm256_maskz_srli_epi64 // CHECK: @llvm.x86.avx2.psrli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srli_epi64(__U, __A, 5); } __m256i test_mm256_maskz_srli_epi64_2(__mmask8 __U,__m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_srli_epi64_2 + // CHECK-LABEL: test_mm256_maskz_srli_epi64_2 // CHECK: @llvm.x86.avx2.psrli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srli_epi64(__U, __A, __B); } __m128i test_mm_mask_sll_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_sll_epi32 + // CHECK-LABEL: test_mm_mask_sll_epi32 // CHECK: @llvm.x86.sse2.psll.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_sll_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_sll_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_sll_epi32 + // CHECK-LABEL: test_mm_maskz_sll_epi32 // CHECK: @llvm.x86.sse2.psll.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_sll_epi32(__U, __A, __B); } __m256i test_mm256_mask_sll_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_sll_epi32 + // CHECK-LABEL: test_mm256_mask_sll_epi32 // CHECK: @llvm.x86.avx2.psll.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_sll_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_sll_epi32(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_sll_epi32 + // CHECK-LABEL: test_mm256_maskz_sll_epi32 // CHECK: @llvm.x86.avx2.psll.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_sll_epi32(__U, __A, __B); } __m128i test_mm_mask_slli_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_slli_epi32 + // CHECK-LABEL: test_mm_mask_slli_epi32 // CHECK: @llvm.x86.sse2.pslli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_slli_epi32(__W, __U, __A, 5); } __m128i test_mm_mask_slli_epi32_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_slli_epi32_2 + // CHECK-LABEL: test_mm_mask_slli_epi32_2 // CHECK: @llvm.x86.sse2.pslli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_slli_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_slli_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_slli_epi32 + // CHECK-LABEL: test_mm_maskz_slli_epi32 // CHECK: @llvm.x86.sse2.pslli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_slli_epi32(__U, __A, 5); } __m128i test_mm_maskz_slli_epi32_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_slli_epi32_2 + // CHECK-LABEL: test_mm_maskz_slli_epi32_2 // CHECK: @llvm.x86.sse2.pslli.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_slli_epi32(__U, __A, __B); } __m256i test_mm256_mask_slli_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_slli_epi32 + // CHECK-LABEL: test_mm256_mask_slli_epi32 // CHECK: @llvm.x86.avx2.pslli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_slli_epi32(__W, __U, __A, 5); } __m256i test_mm256_mask_slli_epi32_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_slli_epi32_2 + // CHECK-LABEL: test_mm256_mask_slli_epi32_2 // CHECK: @llvm.x86.avx2.pslli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_slli_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_slli_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_slli_epi32 + // CHECK-LABEL: test_mm256_maskz_slli_epi32 // CHECK: @llvm.x86.avx2.pslli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_slli_epi32(__U, __A, 5); } __m256i test_mm256_maskz_slli_epi32_2(__mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_slli_epi32_2 + // CHECK-LABEL: test_mm256_maskz_slli_epi32_2 // CHECK: @llvm.x86.avx2.pslli.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_slli_epi32(__U, __A, __B); } __m128i test_mm_mask_sll_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_sll_epi64 + // CHECK-LABEL: test_mm_mask_sll_epi64 // CHECK: @llvm.x86.sse2.psll.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_sll_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_sll_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_sll_epi64 + // CHECK-LABEL: test_mm_maskz_sll_epi64 // CHECK: @llvm.x86.sse2.psll.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_sll_epi64(__U, __A, __B); } __m256i test_mm256_mask_sll_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_sll_epi64 + // CHECK-LABEL: test_mm256_mask_sll_epi64 // CHECK: @llvm.x86.avx2.psll.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_sll_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_sll_epi64(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_sll_epi64 + // CHECK-LABEL: test_mm256_maskz_sll_epi64 // CHECK: @llvm.x86.avx2.psll.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_sll_epi64(__U, __A, __B); } __m128i test_mm_mask_slli_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_slli_epi64 + // CHECK-LABEL: test_mm_mask_slli_epi64 // CHECK: @llvm.x86.sse2.pslli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_slli_epi64(__W, __U, __A, 5); } __m128i test_mm_mask_slli_epi64_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_slli_epi64_2 + // CHECK-LABEL: test_mm_mask_slli_epi64_2 // CHECK: @llvm.x86.sse2.pslli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_slli_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_slli_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_slli_epi64 + // CHECK-LABEL: test_mm_maskz_slli_epi64 // CHECK: @llvm.x86.sse2.pslli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_slli_epi64(__U, __A, 5); } __m128i test_mm_maskz_slli_epi64_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_slli_epi64_2 + // CHECK-LABEL: test_mm_maskz_slli_epi64_2 // CHECK: @llvm.x86.sse2.pslli.q // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_slli_epi64(__U, __A, __B); } __m256i test_mm256_mask_slli_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_slli_epi64 + // CHECK-LABEL: test_mm256_mask_slli_epi64 // CHECK: @llvm.x86.avx2.pslli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_slli_epi64(__W, __U, __A, 5); } __m256i test_mm256_mask_slli_epi64_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_slli_epi64_2 + // CHECK-LABEL: test_mm256_mask_slli_epi64_2 // CHECK: @llvm.x86.avx2.pslli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_slli_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_slli_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_slli_epi64 + // CHECK-LABEL: test_mm256_maskz_slli_epi64 // CHECK: @llvm.x86.avx2.pslli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_slli_epi64(__U, __A, 5); } __m256i test_mm256_maskz_slli_epi64_2(__mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_slli_epi64_2 + // CHECK-LABEL: test_mm256_maskz_slli_epi64_2 // CHECK: @llvm.x86.avx2.pslli.q // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_slli_epi64(__U, __A, __B); } __m128i test_mm_mask_srav_epi32(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_srav_epi32 + // CHECK-LABEL: test_mm_mask_srav_epi32 // CHECK: @llvm.x86.avx2.psrav.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srav_epi32(__W, __U, __X, __Y); } __m128i test_mm_maskz_srav_epi32(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_srav_epi32 + // CHECK-LABEL: test_mm_maskz_srav_epi32 // CHECK: @llvm.x86.avx2.psrav.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srav_epi32(__U, __X, __Y); } __m256i test_mm256_mask_srav_epi32(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_srav_epi32 + // CHECK-LABEL: test_mm256_mask_srav_epi32 // CHECK: @llvm.x86.avx2.psrav.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srav_epi32(__W, __U, __X, __Y); } __m256i test_mm256_maskz_srav_epi32(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_srav_epi32 + // CHECK-LABEL: test_mm256_maskz_srav_epi32 // CHECK: @llvm.x86.avx2.psrav.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srav_epi32(__U, __X, __Y); } __m128i test_mm_srav_epi64(__m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_srav_epi64 + // CHECK-LABEL: test_mm_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.128 return _mm_srav_epi64(__X, __Y); } __m128i test_mm_mask_srav_epi64(__m128i __W, __mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_mask_srav_epi64 + // CHECK-LABEL: test_mm_mask_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srav_epi64(__W, __U, __X, __Y); } __m128i test_mm_maskz_srav_epi64(__mmask8 __U, __m128i __X, __m128i __Y) { - // CHECK-LABEL: @test_mm_maskz_srav_epi64 + // CHECK-LABEL: test_mm_maskz_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srav_epi64(__U, __X, __Y); } __m256i test_mm256_srav_epi64(__m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_srav_epi64 + // CHECK-LABEL: test_mm256_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.256 return _mm256_srav_epi64(__X, __Y); } __m256i test_mm256_mask_srav_epi64(__m256i __W, __mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_srav_epi64 + // CHECK-LABEL: test_mm256_mask_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srav_epi64(__W, __U, __X, __Y); } __m256i test_mm256_maskz_srav_epi64(__mmask8 __U, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_srav_epi64 + // CHECK-LABEL: test_mm256_maskz_srav_epi64 // CHECK: @llvm.x86.avx512.psrav.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srav_epi64(__U, __X, __Y); } void test_mm_store_epi32(void *__P, __m128i __A) { - // CHECK-LABEL: @test_mm_store_epi32 + // CHECK-LABEL: test_mm_store_epi32 // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}} return _mm_store_epi32(__P, __A); } void test_mm_mask_store_epi32(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_store_epi32 + // CHECK-LABEL: test_mm_mask_store_epi32 // CHECK: @llvm.masked.store.v4i32.p0(<4 x i32> %{{.*}}, ptr %{{.}}, i32 16, <4 x i1> %{{.*}}) return _mm_mask_store_epi32(__P, __U, __A); } void test_mm256_store_epi32(void *__P, __m256i __A) { - // CHECK-LABEL: @test_mm256_store_epi32 + // CHECK-LABEL: test_mm256_store_epi32 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}} return _mm256_store_epi32(__P, __A); } void test_mm256_mask_store_epi32(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_store_epi32 + // CHECK-LABEL: test_mm256_mask_store_epi32 // CHECK: @llvm.masked.store.v8i32.p0(<8 x i32> %{{.*}}, ptr %{{.}}, i32 32, <8 x i1> %{{.*}}) return _mm256_mask_store_epi32(__P, __U, __A); } __m128i test_mm_mask_mov_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_mov_epi32 + // CHECK-LABEL: test_mm_mask_mov_epi32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_mov_epi32(__W, __U, __A); } __m128i test_mm_maskz_mov_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_mov_epi32 + // CHECK-LABEL: test_mm_maskz_mov_epi32 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_mov_epi32(__U, __A); } __m256i test_mm256_mask_mov_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_mov_epi32 + // CHECK-LABEL: test_mm256_mask_mov_epi32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_mov_epi32(__W, __U, __A); } __m256i test_mm256_maskz_mov_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_mov_epi32 + // CHECK-LABEL: test_mm256_maskz_mov_epi32 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_mov_epi32(__U, __A); } __m128i test_mm_mask_mov_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_mov_epi64 + // CHECK-LABEL: test_mm_mask_mov_epi64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_mov_epi64(__W, __U, __A); } __m128i test_mm_maskz_mov_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_mov_epi64 + // CHECK-LABEL: test_mm_maskz_mov_epi64 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_mov_epi64(__U, __A); } __m256i test_mm256_mask_mov_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_mov_epi64 + // CHECK-LABEL: test_mm256_mask_mov_epi64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_mov_epi64(__W, __U, __A); } __m256i test_mm256_maskz_mov_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_mov_epi64 + // CHECK-LABEL: test_mm256_maskz_mov_epi64 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_mov_epi64(__U, __A); } __m128i test_mm_load_epi32(void const *__P) { - // CHECK-LABEL: @test_mm_load_epi32 + // CHECK-LABEL: test_mm_load_epi32 // CHECK: load <2 x i64>, ptr %{{.*}} return _mm_load_epi32(__P); } __m128i test_mm_mask_load_epi32(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_load_epi32 + // CHECK-LABEL: test_mm_mask_load_epi32 // CHECK: @llvm.masked.load.v4i32.p0(ptr %{{.*}}, i32 16, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_mask_load_epi32(__W, __U, __P); } __m128i test_mm_maskz_load_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_load_epi32 + // CHECK-LABEL: test_mm_maskz_load_epi32 // CHECK: @llvm.masked.load.v4i32.p0(ptr %{{.*}}, i32 16, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_maskz_load_epi32(__U, __P); } __m256i test_mm256_load_epi32(void const *__P) { - // CHECK-LABEL: @test_mm256_load_epi32 + // CHECK-LABEL: test_mm256_load_epi32 // CHECK: load <4 x i64>, ptr %{{.*}} return _mm256_load_epi32(__P); } __m256i test_mm256_mask_load_epi32(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_load_epi32 + // CHECK-LABEL: test_mm256_mask_load_epi32 // CHECK: @llvm.masked.load.v8i32.p0(ptr %{{.*}}, i32 32, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_mask_load_epi32(__W, __U, __P); } __m256i test_mm256_maskz_load_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_load_epi32 + // CHECK-LABEL: test_mm256_maskz_load_epi32 // CHECK: @llvm.masked.load.v8i32.p0(ptr %{{.*}}, i32 32, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_maskz_load_epi32(__U, __P); } __m128i test_mm_load_epi64(void const *__P) { - // CHECK-LABEL: @test_mm_load_epi64 + // CHECK-LABEL: test_mm_load_epi64 // CHECK: load <2 x i64>, ptr %{{.*}} return _mm_load_epi64(__P); } __m128i test_mm_mask_load_epi64(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_load_epi64 + // CHECK-LABEL: test_mm_mask_load_epi64 // CHECK: @llvm.masked.load.v2i64.p0(ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_mask_load_epi64(__W, __U, __P); } __m128i test_mm_maskz_load_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_load_epi64 + // CHECK-LABEL: test_mm_maskz_load_epi64 // CHECK: @llvm.masked.load.v2i64.p0(ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_maskz_load_epi64(__U, __P); } __m256i test_mm256_load_epi64(void const *__P) { - // CHECK-LABEL: @test_mm256_load_epi64 + // CHECK-LABEL: test_mm256_load_epi64 // CHECK: load <4 x i64>, ptr %{{.*}} return _mm256_load_epi64(__P); } __m256i test_mm256_mask_load_epi64(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_load_epi64 + // CHECK-LABEL: test_mm256_mask_load_epi64 // CHECK: @llvm.masked.load.v4i64.p0(ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_mask_load_epi64(__W, __U, __P); } __m256i test_mm256_maskz_load_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_load_epi64 + // CHECK-LABEL: test_mm256_maskz_load_epi64 // CHECK: @llvm.masked.load.v4i64.p0(ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_maskz_load_epi64(__U, __P); } void test_mm_store_epi64(void *__P, __m128i __A) { - // CHECK-LABEL: @test_mm_store_epi64 + // CHECK-LABEL: test_mm_store_epi64 // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}} return _mm_store_epi64(__P, __A); } void test_mm_mask_store_epi64(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_store_epi64 + // CHECK-LABEL: test_mm_mask_store_epi64 // CHECK: @llvm.masked.store.v2i64.p0(<2 x i64> %{{.*}}, ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}) return _mm_mask_store_epi64(__P, __U, __A); } void test_mm256_store_epi64(void *__P, __m256i __A) { - // CHECK-LABEL: @test_mm256_store_epi64 + // CHECK-LABEL: test_mm256_store_epi64 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}} return _mm256_store_epi64(__P, __A); } void test_mm256_mask_store_epi64(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_store_epi64 + // CHECK-LABEL: test_mm256_mask_store_epi64 // CHECK: @llvm.masked.store.v4i64.p0(<4 x i64> %{{.*}}, ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}) return _mm256_mask_store_epi64(__P, __U, __A); } __m128d test_mm_mask_movedup_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_movedup_pd + // CHECK-LABEL: test_mm_mask_movedup_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> zeroinitializer // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_movedup_pd(__W, __U, __A); } __m128d test_mm_maskz_movedup_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_movedup_pd + // CHECK-LABEL: test_mm_maskz_movedup_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> zeroinitializer // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_movedup_pd(__U, __A); } __m256d test_mm256_mask_movedup_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_movedup_pd + // CHECK-LABEL: test_mm256_mask_movedup_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 0, i32 2, i32 2> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_movedup_pd(__W, __U, __A); } __m256d test_mm256_maskz_movedup_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_movedup_pd + // CHECK-LABEL: test_mm256_maskz_movedup_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 0, i32 2, i32 2> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_movedup_pd(__U, __A); } __m128i test_mm_mask_set1_epi32(__m128i __O, __mmask8 __M) { - // CHECK-LABEL: @test_mm_mask_set1_epi32 + // CHECK-LABEL: test_mm_mask_set1_epi32 // CHECK: insertelement <4 x i32> poison, i32 %{{.*}}, i32 0 // CHECK: insertelement <4 x i32> %{{.*}}32 1 // CHECK: insertelement <4 x i32> %{{.*}}32 2 @@ -6678,7 +6679,7 @@ __m128i test_mm_mask_set1_epi32(__m128i __O, __mmask8 __M) { } __m128i test_mm_maskz_set1_epi32(__mmask8 __M) { - // CHECK-LABEL: @test_mm_maskz_set1_epi32 + // CHECK-LABEL: test_mm_maskz_set1_epi32 // CHECK: insertelement <4 x i32> poison, i32 %{{.*}}, i32 0 // CHECK: insertelement <4 x i32> %{{.*}}32 1 // CHECK: insertelement <4 x i32> %{{.*}}32 2 @@ -6689,7 +6690,7 @@ __m128i test_mm_maskz_set1_epi32(__mmask8 __M) { } __m256i test_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M) { - // CHECK-LABEL: @test_mm256_mask_set1_epi32 + // CHECK-LABEL: test_mm256_mask_set1_epi32 // CHECK: insertelement <8 x i32> poison, i32 %{{.*}}, i32 0 // CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, i32 1 // CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, i32 2 @@ -6703,7 +6704,7 @@ __m256i test_mm256_mask_set1_epi32(__m256i __O, __mmask8 __M) { } __m256i test_mm256_maskz_set1_epi32(__mmask8 __M) { - // CHECK-LABEL: @test_mm256_maskz_set1_epi32 + // CHECK-LABEL: test_mm256_maskz_set1_epi32 // CHECK: insertelement <8 x i32> poison, i32 %{{.*}}, i32 0 // CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, i32 1 // CHECK: insertelement <8 x i32> %{{.*}}, i32 %{{.*}}, i32 2 @@ -6717,7 +6718,7 @@ __m256i test_mm256_maskz_set1_epi32(__mmask8 __M) { } __m128i test_mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) { - // CHECK-LABEL: @test_mm_mask_set1_epi64 + // CHECK-LABEL: test_mm_mask_set1_epi64 // CHECK: insertelement <2 x i64> poison, i64 %{{.*}}, i32 0 // CHECK: insertelement <2 x i64> %{{.*}}, i64 %{{.*}}, i32 1 // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -6726,7 +6727,7 @@ __m128i test_mm_mask_set1_epi64(__m128i __O, __mmask8 __M, long long __A) { } __m128i test_mm_maskz_set1_epi64(__mmask8 __M, long long __A) { - // CHECK-LABEL: @test_mm_maskz_set1_epi64 + // CHECK-LABEL: test_mm_maskz_set1_epi64 // CHECK: insertelement <2 x i64> poison, i64 %{{.*}}, i32 0 // CHECK: insertelement <2 x i64> %{{.*}}, i64 %{{.*}}, i32 1 // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <2 x i32> <i32 0, i32 1> @@ -6735,7 +6736,7 @@ __m128i test_mm_maskz_set1_epi64(__mmask8 __M, long long __A) { } __m256i test_mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) { - // CHECK-LABEL: @test_mm256_mask_set1_epi64 + // CHECK-LABEL: test_mm256_mask_set1_epi64 // CHECK: insertelement <4 x i64> poison, i64 %{{.*}}, i32 0 // CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i32 1 // CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i32 2 @@ -6746,7 +6747,7 @@ __m256i test_mm256_mask_set1_epi64(__m256i __O, __mmask8 __M, long long __A) { } __m256i test_mm256_maskz_set1_epi64(__mmask8 __M, long long __A) { - // CHECK-LABEL: @test_mm256_maskz_set1_epi64 + // CHECK-LABEL: test_mm256_maskz_set1_epi64 // CHECK: insertelement <4 x i64> poison, i64 %{{.*}}, i32 0 // CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i32 1 // CHECK: insertelement <4 x i64> %{{.*}}, i64 %{{.*}}, i32 2 @@ -6757,646 +6758,646 @@ __m256i test_mm256_maskz_set1_epi64(__mmask8 __M, long long __A) { } __m128d test_mm_fixupimm_pd(__m128d __A, __m128d __B, __m128i __C) { - // CHECK-LABEL: @test_mm_fixupimm_pd + // CHECK-LABEL: test_mm_fixupimm_pd // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.128 return _mm_fixupimm_pd(__A, __B, __C, 5); } __m128d test_mm_mask_fixupimm_pd(__m128d __A, __mmask8 __U, __m128d __B, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_fixupimm_pd + // CHECK-LABEL: test_mm_mask_fixupimm_pd // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.128 return _mm_mask_fixupimm_pd(__A, __U, __B, __C, 5); } __m128d test_mm_maskz_fixupimm_pd(__mmask8 __U, __m128d __A, __m128d __B, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_fixupimm_pd + // CHECK-LABEL: test_mm_maskz_fixupimm_pd // CHECK: @llvm.x86.avx512.maskz.fixupimm.pd.128 return _mm_maskz_fixupimm_pd(__U, __A, __B, __C, 5); } __m256d test_mm256_fixupimm_pd(__m256d __A, __m256d __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_fixupimm_pd + // CHECK-LABEL: test_mm256_fixupimm_pd // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.256 return _mm256_fixupimm_pd(__A, __B, __C, 5); } __m256d test_mm256_mask_fixupimm_pd(__m256d __A, __mmask8 __U, __m256d __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_fixupimm_pd + // CHECK-LABEL: test_mm256_mask_fixupimm_pd // CHECK: @llvm.x86.avx512.mask.fixupimm.pd.256 return _mm256_mask_fixupimm_pd(__A, __U, __B, __C, 5); } __m256d test_mm256_maskz_fixupimm_pd(__mmask8 __U, __m256d __A, __m256d __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_fixupimm_pd + // CHECK-LABEL: test_mm256_maskz_fixupimm_pd // CHECK: @llvm.x86.avx512.maskz.fixupimm.pd.256 return _mm256_maskz_fixupimm_pd(__U, __A, __B, __C, 5); } __m128 test_mm_fixupimm_ps(__m128 __A, __m128 __B, __m128i __C) { - // CHECK-LABEL: @test_mm_fixupimm_ps + // CHECK-LABEL: test_mm_fixupimm_ps // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.128 return _mm_fixupimm_ps(__A, __B, __C, 5); } __m128 test_mm_mask_fixupimm_ps(__m128 __A, __mmask8 __U, __m128 __B, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_fixupimm_ps + // CHECK-LABEL: test_mm_mask_fixupimm_ps // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.128 return _mm_mask_fixupimm_ps(__A, __U, __B, __C, 5); } __m128 test_mm_maskz_fixupimm_ps(__mmask8 __U, __m128 __A, __m128 __B, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_fixupimm_ps + // CHECK-LABEL: test_mm_maskz_fixupimm_ps // CHECK: @llvm.x86.avx512.maskz.fixupimm.ps.128 return _mm_maskz_fixupimm_ps(__U, __A, __B, __C, 5); } __m256 test_mm256_fixupimm_ps(__m256 __A, __m256 __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_fixupimm_ps + // CHECK-LABEL: test_mm256_fixupimm_ps // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.256 return _mm256_fixupimm_ps(__A, __B, __C, 5); } __m256 test_mm256_mask_fixupimm_ps(__m256 __A, __mmask8 __U, __m256 __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_fixupimm_ps + // CHECK-LABEL: test_mm256_mask_fixupimm_ps // CHECK: @llvm.x86.avx512.mask.fixupimm.ps.256 return _mm256_mask_fixupimm_ps(__A, __U, __B, __C, 5); } __m256 test_mm256_maskz_fixupimm_ps(__mmask8 __U, __m256 __A, __m256 __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_fixupimm_ps + // CHECK-LABEL: test_mm256_maskz_fixupimm_ps // CHECK: @llvm.x86.avx512.maskz.fixupimm.ps.256 return _mm256_maskz_fixupimm_ps(__U, __A, __B, __C, 5); } __m128d test_mm_mask_load_pd(__m128d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_load_pd + // CHECK-LABEL: test_mm_mask_load_pd // CHECK: @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_mask_load_pd(__W, __U, __P); } __m128d test_mm_maskz_load_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_load_pd + // CHECK-LABEL: test_mm_maskz_load_pd // CHECK: @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_maskz_load_pd(__U, __P); } __m256d test_mm256_mask_load_pd(__m256d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_load_pd + // CHECK-LABEL: test_mm256_mask_load_pd // CHECK: @llvm.masked.load.v4f64.p0(ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_mask_load_pd(__W, __U, __P); } __m256d test_mm256_maskz_load_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_load_pd + // CHECK-LABEL: test_mm256_maskz_load_pd // CHECK: @llvm.masked.load.v4f64.p0(ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_maskz_load_pd(__U, __P); } __m128 test_mm_mask_load_ps(__m128 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_load_ps + // CHECK-LABEL: test_mm_mask_load_ps // CHECK: @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 16, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_mask_load_ps(__W, __U, __P); } __m128 test_mm_maskz_load_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_load_ps + // CHECK-LABEL: test_mm_maskz_load_ps // CHECK: @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 16, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_maskz_load_ps(__U, __P); } __m256 test_mm256_mask_load_ps(__m256 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_load_ps + // CHECK-LABEL: test_mm256_mask_load_ps // CHECK: @llvm.masked.load.v8f32.p0(ptr %{{.*}}, i32 32, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_mask_load_ps(__W, __U, __P); } __m256 test_mm256_maskz_load_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_load_ps + // CHECK-LABEL: test_mm256_maskz_load_ps // CHECK: @llvm.masked.load.v8f32.p0(ptr %{{.*}}, i32 32, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_maskz_load_ps(__U, __P); } __m128i test_mm_loadu_epi64(void const *__P) { - // CHECK-LABEL: @test_mm_loadu_epi64 + // CHECK-LABEL: test_mm_loadu_epi64 // CHECK: load <2 x i64>, ptr %{{.*}}, align 1{{$}} return _mm_loadu_epi64(__P); } __m128i test_mm_mask_loadu_epi64(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_loadu_epi64 + // CHECK-LABEL: test_mm_mask_loadu_epi64 // CHECK: @llvm.masked.load.v2i64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_mask_loadu_epi64(__W, __U, __P); } __m128i test_mm_maskz_loadu_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_loadu_epi64 + // CHECK-LABEL: test_mm_maskz_loadu_epi64 // CHECK: @llvm.masked.load.v2i64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x i64> %{{.*}}) return _mm_maskz_loadu_epi64(__U, __P); } __m256i test_mm256_loadu_epi64(void const *__P) { - // CHECK-LABEL: @test_mm256_loadu_epi64 + // CHECK-LABEL: test_mm256_loadu_epi64 // CHECK: load <4 x i64>, ptr %{{.*}}, align 1{{$}} return _mm256_loadu_epi64(__P); } __m256i test_mm256_mask_loadu_epi64(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_loadu_epi64 + // CHECK-LABEL: test_mm256_mask_loadu_epi64 // CHECK: @llvm.masked.load.v4i64.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_mask_loadu_epi64(__W, __U, __P); } __m256i test_mm256_maskz_loadu_epi64(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_loadu_epi64 + // CHECK-LABEL: test_mm256_maskz_loadu_epi64 // CHECK: @llvm.masked.load.v4i64.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x i64> %{{.*}}) return _mm256_maskz_loadu_epi64(__U, __P); } __m128i test_mm_loadu_epi32(void const *__P) { - // CHECK-LABEL: @test_mm_loadu_epi32 + // CHECK-LABEL: test_mm_loadu_epi32 // CHECK: load <2 x i64>, ptr %{{.*}}, align 1{{$}} return _mm_loadu_epi32(__P); } __m128i test_mm_mask_loadu_epi32(__m128i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_loadu_epi32 + // CHECK-LABEL: test_mm_mask_loadu_epi32 // CHECK: @llvm.masked.load.v4i32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_mask_loadu_epi32(__W, __U, __P); } __m128i test_mm_maskz_loadu_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_loadu_epi32 + // CHECK-LABEL: test_mm_maskz_loadu_epi32 // CHECK: @llvm.masked.load.v4i32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x i32> %{{.*}}) return _mm_maskz_loadu_epi32(__U, __P); } __m256i test_mm256_loadu_epi32(void const *__P) { - // CHECK-LABEL: @test_mm256_loadu_epi32 + // CHECK-LABEL: test_mm256_loadu_epi32 // CHECK: load <4 x i64>, ptr %{{.*}}, align 1{{$}} return _mm256_loadu_epi32(__P); } __m256i test_mm256_mask_loadu_epi32(__m256i __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_loadu_epi32 + // CHECK-LABEL: test_mm256_mask_loadu_epi32 // CHECK: @llvm.masked.load.v8i32.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_mask_loadu_epi32(__W, __U, __P); } __m256i test_mm256_maskz_loadu_epi32(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_loadu_epi32 + // CHECK-LABEL: test_mm256_maskz_loadu_epi32 // CHECK: @llvm.masked.load.v8i32.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x i32> %{{.*}}) return _mm256_maskz_loadu_epi32(__U, __P); } __m128d test_mm_mask_loadu_pd(__m128d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_loadu_pd + // CHECK-LABEL: test_mm_mask_loadu_pd // CHECK: @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_mask_loadu_pd(__W, __U, __P); } __m128d test_mm_maskz_loadu_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_loadu_pd + // CHECK-LABEL: test_mm_maskz_loadu_pd // CHECK: @llvm.masked.load.v2f64.p0(ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}, <2 x double> %{{.*}}) return _mm_maskz_loadu_pd(__U, __P); } __m256d test_mm256_mask_loadu_pd(__m256d __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_loadu_pd + // CHECK-LABEL: test_mm256_mask_loadu_pd // CHECK: @llvm.masked.load.v4f64.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_mask_loadu_pd(__W, __U, __P); } __m256d test_mm256_maskz_loadu_pd(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_loadu_pd + // CHECK-LABEL: test_mm256_maskz_loadu_pd // CHECK: @llvm.masked.load.v4f64.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x double> %{{.*}}) return _mm256_maskz_loadu_pd(__U, __P); } __m128 test_mm_mask_loadu_ps(__m128 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_mask_loadu_ps + // CHECK-LABEL: test_mm_mask_loadu_ps // CHECK: @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_mask_loadu_ps(__W, __U, __P); } __m128 test_mm_maskz_loadu_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm_maskz_loadu_ps + // CHECK-LABEL: test_mm_maskz_loadu_ps // CHECK: @llvm.masked.load.v4f32.p0(ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}, <4 x float> %{{.*}}) return _mm_maskz_loadu_ps(__U, __P); } __m256 test_mm256_mask_loadu_ps(__m256 __W, __mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_mask_loadu_ps + // CHECK-LABEL: test_mm256_mask_loadu_ps // CHECK: @llvm.masked.load.v8f32.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_mask_loadu_ps(__W, __U, __P); } __m256 test_mm256_maskz_loadu_ps(__mmask8 __U, void const *__P) { - // CHECK-LABEL: @test_mm256_maskz_loadu_ps + // CHECK-LABEL: test_mm256_maskz_loadu_ps // CHECK: @llvm.masked.load.v8f32.p0(ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}, <8 x float> %{{.*}}) return _mm256_maskz_loadu_ps(__U, __P); } void test_mm_mask_store_pd(void *__P, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_store_pd + // CHECK-LABEL: test_mm_mask_store_pd // CHECK: @llvm.masked.store.v2f64.p0(<2 x double> %{{.*}}, ptr %{{.*}}, i32 16, <2 x i1> %{{.*}}) return _mm_mask_store_pd(__P, __U, __A); } void test_mm256_mask_store_pd(void *__P, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_store_pd + // CHECK-LABEL: test_mm256_mask_store_pd // CHECK: @llvm.masked.store.v4f64.p0(<4 x double> %{{.*}}, ptr %{{.*}}, i32 32, <4 x i1> %{{.*}}) return _mm256_mask_store_pd(__P, __U, __A); } void test_mm_mask_store_ps(void *__P, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_store_ps + // CHECK-LABEL: test_mm_mask_store_ps // CHECK: @llvm.masked.store.v4f32.p0(<4 x float> %{{.*}}, ptr %{{.*}}, i32 16, <4 x i1> %{{.*}}) return _mm_mask_store_ps(__P, __U, __A); } void test_mm256_mask_store_ps(void *__P, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_store_ps + // CHECK-LABEL: test_mm256_mask_store_ps // CHECK: @llvm.masked.store.v8f32.p0(<8 x float> %{{.*}}, ptr %{{.*}}, i32 32, <8 x i1> %{{.*}}) return _mm256_mask_store_ps(__P, __U, __A); } void test_mm_storeu_epi64(void *__p, __m128i __a) { - // check-label: @test_mm_storeu_epi64 + // CHECK-LABEL: test_mm_storeu_epi64 // check: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm_storeu_epi64(__p, __a); } void test_mm_mask_storeu_epi64(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_storeu_epi64 + // CHECK-LABEL: test_mm_mask_storeu_epi64 // CHECK: @llvm.masked.store.v2i64.p0(<2 x i64> %{{.*}}, ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}) return _mm_mask_storeu_epi64(__P, __U, __A); } void test_mm256_storeu_epi64(void *__P, __m256i __A) { - // CHECK-LABEL: @test_mm256_storeu_epi64 + // CHECK-LABEL: test_mm256_storeu_epi64 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm256_storeu_epi64(__P, __A); } void test_mm256_mask_storeu_epi64(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_storeu_epi64 + // CHECK-LABEL: test_mm256_mask_storeu_epi64 // CHECK: @llvm.masked.store.v4i64.p0(<4 x i64> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}) return _mm256_mask_storeu_epi64(__P, __U, __A); } void test_mm_storeu_epi32(void *__P, __m128i __A) { - // CHECK-LABEL: @test_mm_storeu_epi32 + // CHECK-LABEL: test_mm_storeu_epi32 // CHECK: store <2 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm_storeu_epi32(__P, __A); } void test_mm_mask_storeu_epi32(void *__P, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_storeu_epi32 + // CHECK-LABEL: test_mm_mask_storeu_epi32 // CHECK: @llvm.masked.store.v4i32.p0(<4 x i32> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}) return _mm_mask_storeu_epi32(__P, __U, __A); } void test_mm256_storeu_epi32(void *__P, __m256i __A) { - // CHECK-LABEL: @test_mm256_storeu_epi32 + // CHECK-LABEL: test_mm256_storeu_epi32 // CHECK: store <4 x i64> %{{.*}}, ptr %{{.*}}, align 1{{$}} return _mm256_storeu_epi32(__P, __A); } void test_mm256_mask_storeu_epi32(void *__P, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_storeu_epi32 + // CHECK-LABEL: test_mm256_mask_storeu_epi32 // CHECK: @llvm.masked.store.v8i32.p0(<8 x i32> %{{.*}}, ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}) return _mm256_mask_storeu_epi32(__P, __U, __A); } void test_mm_mask_storeu_pd(void *__P, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_storeu_pd + // CHECK-LABEL: test_mm_mask_storeu_pd // CHECK: @llvm.masked.store.v2f64.p0(<2 x double> %{{.*}}, ptr %{{.*}}, i32 1, <2 x i1> %{{.*}}) return _mm_mask_storeu_pd(__P, __U, __A); } void test_mm256_mask_storeu_pd(void *__P, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_storeu_pd + // CHECK-LABEL: test_mm256_mask_storeu_pd // CHECK: @llvm.masked.store.v4f64.p0(<4 x double> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}) return _mm256_mask_storeu_pd(__P, __U, __A); } void test_mm_mask_storeu_ps(void *__P, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_storeu_ps + // CHECK-LABEL: test_mm_mask_storeu_ps // CHECK: @llvm.masked.store.v4f32.p0(<4 x float> %{{.*}}, ptr %{{.*}}, i32 1, <4 x i1> %{{.*}}) return _mm_mask_storeu_ps(__P, __U, __A); } void test_mm256_mask_storeu_ps(void *__P, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_storeu_ps + // CHECK-LABEL: test_mm256_mask_storeu_ps // CHECK: @llvm.masked.store.v8f32.p0(<8 x float> %{{.*}}, ptr %{{.*}}, i32 1, <8 x i1> %{{.*}}) return _mm256_mask_storeu_ps(__P, __U, __A); } __m128d test_mm_mask_unpackhi_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_unpackhi_pd + // CHECK-LABEL: test_mm_mask_unpackhi_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_unpackhi_pd(__W, __U, __A, __B); } __m128d test_mm_maskz_unpackhi_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_unpackhi_pd + // CHECK-LABEL: test_mm_maskz_unpackhi_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_unpackhi_pd(__U, __A, __B); } __m256d test_mm256_mask_unpackhi_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_unpackhi_pd + // CHECK-LABEL: test_mm256_mask_unpackhi_pd // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}} <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_unpackhi_pd(__W, __U, __A, __B); } __m256d test_mm256_maskz_unpackhi_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_unpackhi_pd + // CHECK-LABEL: test_mm256_maskz_unpackhi_pd // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}} <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_unpackhi_pd(__U, __A, __B); } __m128 test_mm_mask_unpackhi_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_unpackhi_ps + // CHECK-LABEL: test_mm_mask_unpackhi_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 6, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}} <4 x float> %{{.*}} return _mm_mask_unpackhi_ps(__W, __U, __A, __B); } __m128 test_mm_maskz_unpackhi_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_unpackhi_ps + // CHECK-LABEL: test_mm_maskz_unpackhi_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 2, i32 6, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}} <4 x float> %{{.*}} return _mm_maskz_unpackhi_ps(__U, __A, __B); } __m256 test_mm256_mask_unpackhi_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_unpackhi_ps + // CHECK-LABEL: test_mm256_mask_unpackhi_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_unpackhi_ps(__W, __U, __A, __B); } __m256 test_mm256_maskz_unpackhi_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_unpackhi_ps + // CHECK-LABEL: test_mm256_maskz_unpackhi_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_unpackhi_ps(__U, __A, __B); } __m128d test_mm_mask_unpacklo_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_unpacklo_pd + // CHECK-LABEL: test_mm_mask_unpacklo_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 0, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_unpacklo_pd(__W, __U, __A, __B); } __m128d test_mm_maskz_unpacklo_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_unpacklo_pd + // CHECK-LABEL: test_mm_maskz_unpacklo_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 0, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_unpacklo_pd(__U, __A, __B); } __m256d test_mm256_mask_unpacklo_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_unpacklo_pd + // CHECK-LABEL: test_mm256_mask_unpacklo_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}} <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_unpacklo_pd(__W, __U, __A, __B); } __m256d test_mm256_maskz_unpacklo_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_unpacklo_pd + // CHECK-LABEL: test_mm256_maskz_unpacklo_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}} <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_unpacklo_pd(__U, __A, __B); } __m128 test_mm_mask_unpacklo_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_unpacklo_ps + // CHECK-LABEL: test_mm_mask_unpacklo_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_unpacklo_ps(__W, __U, __A, __B); } __m128 test_mm_maskz_unpacklo_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_unpacklo_ps + // CHECK-LABEL: test_mm_maskz_unpacklo_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_unpacklo_ps(__U, __A, __B); } __m256 test_mm256_mask_unpacklo_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_unpacklo_ps + // CHECK-LABEL: test_mm256_mask_unpacklo_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_unpacklo_ps(__W, __U, __A, __B); } __m256 test_mm256_maskz_unpacklo_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_unpacklo_ps + // CHECK-LABEL: test_mm256_maskz_unpacklo_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_unpacklo_ps(__U, __A, __B); } __m128d test_mm_rcp14_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_rcp14_pd + // CHECK-LABEL: test_mm_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.128 return _mm_rcp14_pd(__A); } __m128d test_mm_mask_rcp14_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_rcp14_pd + // CHECK-LABEL: test_mm_mask_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.128 return _mm_mask_rcp14_pd(__W, __U, __A); } __m128d test_mm_maskz_rcp14_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_rcp14_pd + // CHECK-LABEL: test_mm_maskz_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.128 return _mm_maskz_rcp14_pd(__U, __A); } __m256d test_mm256_rcp14_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_rcp14_pd + // CHECK-LABEL: test_mm256_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.256 return _mm256_rcp14_pd(__A); } __m256d test_mm256_mask_rcp14_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_rcp14_pd + // CHECK-LABEL: test_mm256_mask_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.256 return _mm256_mask_rcp14_pd(__W, __U, __A); } __m256d test_mm256_maskz_rcp14_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_rcp14_pd + // CHECK-LABEL: test_mm256_maskz_rcp14_pd // CHECK: @llvm.x86.avx512.rcp14.pd.256 return _mm256_maskz_rcp14_pd(__U, __A); } __m128 test_mm_rcp14_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_rcp14_ps + // CHECK-LABEL: test_mm_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.128 return _mm_rcp14_ps(__A); } __m128 test_mm_mask_rcp14_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_rcp14_ps + // CHECK-LABEL: test_mm_mask_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.128 return _mm_mask_rcp14_ps(__W, __U, __A); } __m128 test_mm_maskz_rcp14_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_rcp14_ps + // CHECK-LABEL: test_mm_maskz_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.128 return _mm_maskz_rcp14_ps(__U, __A); } __m256 test_mm256_rcp14_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_rcp14_ps + // CHECK-LABEL: test_mm256_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.256 return _mm256_rcp14_ps(__A); } __m256 test_mm256_mask_rcp14_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_rcp14_ps + // CHECK-LABEL: test_mm256_mask_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.256 return _mm256_mask_rcp14_ps(__W, __U, __A); } __m256 test_mm256_maskz_rcp14_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_rcp14_ps + // CHECK-LABEL: test_mm256_maskz_rcp14_ps // CHECK: @llvm.x86.avx512.rcp14.ps.256 return _mm256_maskz_rcp14_ps(__U, __A); } __m128d test_mm_mask_permute_pd(__m128d __W, __mmask8 __U, __m128d __X) { - // CHECK-LABEL: @test_mm_mask_permute_pd + // CHECK-LABEL: test_mm_mask_permute_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> poison, <2 x i32> <i32 1, i32 0> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_permute_pd(__W, __U, __X, 1); } __m128d test_mm_maskz_permute_pd(__mmask8 __U, __m128d __X) { - // CHECK-LABEL: @test_mm_maskz_permute_pd + // CHECK-LABEL: test_mm_maskz_permute_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> poison, <2 x i32> <i32 1, i32 0> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_permute_pd(__U, __X, 1); } __m256d test_mm256_mask_permute_pd(__m256d __W, __mmask8 __U, __m256d __X) { - // CHECK-LABEL: @test_mm256_mask_permute_pd + // CHECK-LABEL: test_mm256_mask_permute_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_permute_pd(__W, __U, __X, 5); } __m256d test_mm256_maskz_permute_pd(__mmask8 __U, __m256d __X) { - // CHECK-LABEL: @test_mm256_maskz_permute_pd + // CHECK-LABEL: test_mm256_maskz_permute_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <4 x i32> <i32 1, i32 0, i32 3, i32 2> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_permute_pd(__U, __X, 5); } __m128 test_mm_mask_permute_ps(__m128 __W, __mmask8 __U, __m128 __X) { - // CHECK-LABEL: @test_mm_mask_permute_ps + // CHECK-LABEL: test_mm_mask_permute_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_permute_ps(__W, __U, __X, 0x1b); } __m128 test_mm_maskz_permute_ps(__mmask8 __U, __m128 __X) { - // CHECK-LABEL: @test_mm_maskz_permute_ps + // CHECK-LABEL: test_mm_maskz_permute_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> poison, <4 x i32> <i32 3, i32 2, i32 1, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_permute_ps(__U, __X, 0x1b); } __m256 test_mm256_mask_permute_ps(__m256 __W, __mmask8 __U, __m256 __X) { - // CHECK-LABEL: @test_mm256_mask_permute_ps + // CHECK-LABEL: test_mm256_mask_permute_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> poison, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_permute_ps(__W, __U, __X, 0x1b); } __m256 test_mm256_maskz_permute_ps(__mmask8 __U, __m256 __X) { - // CHECK-LABEL: @test_mm256_maskz_permute_ps + // CHECK-LABEL: test_mm256_maskz_permute_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> poison, <8 x i32> <i32 3, i32 2, i32 1, i32 0, i32 7, i32 6, i32 5, i32 4> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_permute_ps(__U, __X, 0x1b); } __m128d test_mm_mask_permutevar_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_permutevar_pd + // CHECK-LABEL: test_mm_mask_permutevar_pd // CHECK: @llvm.x86.avx.vpermilvar.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_permutevar_pd(__W, __U, __A, __C); } __m128d test_mm_maskz_permutevar_pd(__mmask8 __U, __m128d __A, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_permutevar_pd + // CHECK-LABEL: test_mm_maskz_permutevar_pd // CHECK: @llvm.x86.avx.vpermilvar.pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_permutevar_pd(__U, __A, __C); } __m256d test_mm256_mask_permutevar_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_permutevar_pd + // CHECK-LABEL: test_mm256_mask_permutevar_pd // CHECK: @llvm.x86.avx.vpermilvar.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_permutevar_pd(__W, __U, __A, __C); } __m256d test_mm256_maskz_permutevar_pd(__mmask8 __U, __m256d __A, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_permutevar_pd + // CHECK-LABEL: test_mm256_maskz_permutevar_pd // CHECK: @llvm.x86.avx.vpermilvar.pd.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_permutevar_pd(__U, __A, __C); } __m128 test_mm_mask_permutevar_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_permutevar_ps + // CHECK-LABEL: test_mm_mask_permutevar_ps // CHECK: @llvm.x86.avx.vpermilvar.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_permutevar_ps(__W, __U, __A, __C); } __m128 test_mm_maskz_permutevar_ps(__mmask8 __U, __m128 __A, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_permutevar_ps + // CHECK-LABEL: test_mm_maskz_permutevar_ps // CHECK: @llvm.x86.avx.vpermilvar.ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_permutevar_ps(__U, __A, __C); } __m256 test_mm256_mask_permutevar_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_permutevar_ps + // CHECK-LABEL: test_mm256_mask_permutevar_ps // CHECK: @llvm.x86.avx.vpermilvar.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_permutevar_ps(__W, __U, __A, __C); } __m256 test_mm256_maskz_permutevar_ps(__mmask8 __U, __m256 __A, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_permutevar_ps + // CHECK-LABEL: test_mm256_maskz_permutevar_ps // CHECK: @llvm.x86.avx.vpermilvar.ps.256 // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_permutevar_ps(__U, __A, __C); } __mmask8 test_mm_test_epi32_mask(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_test_epi32_mask + // CHECK-LABEL: test_mm_test_epi32_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} return _mm_test_epi32_mask(__A, __B); } __mmask8 test_mm_mask_test_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_test_epi32_mask + // CHECK-LABEL: test_mm_mask_test_epi32_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} @@ -7404,14 +7405,14 @@ __mmask8 test_mm_mask_test_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B) { } __mmask8 test_mm256_test_epi32_mask(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_test_epi32_mask + // CHECK-LABEL: test_mm256_test_epi32_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} return _mm256_test_epi32_mask(__A, __B); } __mmask8 test_mm256_mask_test_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_test_epi32_mask + // CHECK-LABEL: test_mm256_mask_test_epi32_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} @@ -7419,14 +7420,14 @@ __mmask8 test_mm256_mask_test_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B) } __mmask8 test_mm_test_epi64_mask(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_test_epi64_mask + // CHECK-LABEL: test_mm_test_epi64_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} return _mm_test_epi64_mask(__A, __B); } __mmask8 test_mm_mask_test_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_test_epi64_mask + // CHECK-LABEL: test_mm_mask_test_epi64_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} @@ -7434,14 +7435,14 @@ __mmask8 test_mm_mask_test_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B) { } __mmask8 test_mm256_test_epi64_mask(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_test_epi64_mask + // CHECK-LABEL: test_mm256_test_epi64_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} return _mm256_test_epi64_mask(__A, __B); } __mmask8 test_mm256_mask_test_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_test_epi64_mask + // CHECK-LABEL: test_mm256_mask_test_epi64_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp ne <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} @@ -7449,14 +7450,14 @@ __mmask8 test_mm256_mask_test_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B) } __mmask8 test_mm_testn_epi32_mask(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_testn_epi32_mask + // CHECK-LABEL: test_mm_testn_epi32_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} return _mm_testn_epi32_mask(__A, __B); } __mmask8 test_mm_mask_testn_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_testn_epi32_mask + // CHECK-LABEL: test_mm_mask_testn_epi32_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} @@ -7464,14 +7465,14 @@ __mmask8 test_mm_mask_testn_epi32_mask(__mmask8 __U, __m128i __A, __m128i __B) { } __mmask8 test_mm256_testn_epi32_mask(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_testn_epi32_mask + // CHECK-LABEL: test_mm256_testn_epi32_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} return _mm256_testn_epi32_mask(__A, __B); } __mmask8 test_mm256_mask_testn_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_testn_epi32_mask + // CHECK-LABEL: test_mm256_mask_testn_epi32_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} @@ -7479,14 +7480,14 @@ __mmask8 test_mm256_mask_testn_epi32_mask(__mmask8 __U, __m256i __A, __m256i __B } __mmask8 test_mm_testn_epi64_mask(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_testn_epi64_mask + // CHECK-LABEL: test_mm_testn_epi64_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} return _mm_testn_epi64_mask(__A, __B); } __mmask8 test_mm_mask_testn_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_testn_epi64_mask + // CHECK-LABEL: test_mm_mask_testn_epi64_mask // CHECK: and <2 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} @@ -7494,14 +7495,14 @@ __mmask8 test_mm_mask_testn_epi64_mask(__mmask8 __U, __m128i __A, __m128i __B) { } __mmask8 test_mm256_testn_epi64_mask(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_testn_epi64_mask + // CHECK-LABEL: test_mm256_testn_epi64_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} return _mm256_testn_epi64_mask(__A, __B); } __mmask8 test_mm256_mask_testn_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_testn_epi64_mask + // CHECK-LABEL: test_mm256_mask_testn_epi64_mask // CHECK: and <4 x i64> %{{.*}}, %{{.*}} // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} @@ -7509,428 +7510,428 @@ __mmask8 test_mm256_mask_testn_epi64_mask(__mmask8 __U, __m256i __A, __m256i __B } __m128i test_mm_mask_unpackhi_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_unpackhi_epi32 + // CHECK-LABEL: test_mm_mask_unpackhi_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 6, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_unpackhi_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_unpackhi_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_unpackhi_epi32 + // CHECK-LABEL: test_mm_maskz_unpackhi_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 2, i32 6, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_unpackhi_epi32(__U, __A, __B); } __m256i test_mm256_mask_unpackhi_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_unpackhi_epi32 + // CHECK-LABEL: test_mm256_mask_unpackhi_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_unpackhi_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_unpackhi_epi32(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_unpackhi_epi32 + // CHECK-LABEL: test_mm256_maskz_unpackhi_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 2, i32 10, i32 3, i32 11, i32 6, i32 14, i32 7, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_unpackhi_epi32(__U, __A, __B); } __m128i test_mm_mask_unpackhi_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_unpackhi_epi64 + // CHECK-LABEL: test_mm_mask_unpackhi_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_unpackhi_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_unpackhi_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_unpackhi_epi64 + // CHECK-LABEL: test_mm_maskz_unpackhi_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_unpackhi_epi64(__U, __A, __B); } __m256i test_mm256_mask_unpackhi_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_unpackhi_epi64 + // CHECK-LABEL: test_mm256_mask_unpackhi_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 5, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_unpackhi_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_unpackhi_epi64(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_unpackhi_epi64 + // CHECK-LABEL: test_mm256_maskz_unpackhi_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 5, i32 3, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_unpackhi_epi64(__U, __A, __B); } __m128i test_mm_mask_unpacklo_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_unpacklo_epi32 + // CHECK-LABEL: test_mm_mask_unpacklo_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_unpacklo_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_unpacklo_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_unpacklo_epi32 + // CHECK-LABEL: test_mm_maskz_unpacklo_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 1, i32 5> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_unpacklo_epi32(__U, __A, __B); } __m256i test_mm256_mask_unpacklo_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_unpacklo_epi32 + // CHECK-LABEL: test_mm256_mask_unpacklo_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_unpacklo_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_unpacklo_epi32(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_unpacklo_epi32 + // CHECK-LABEL: test_mm256_maskz_unpacklo_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 8, i32 1, i32 9, i32 4, i32 12, i32 5, i32 13> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_unpacklo_epi32(__U, __A, __B); } __m128i test_mm_mask_unpacklo_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_unpacklo_epi64 + // CHECK-LABEL: test_mm_mask_unpacklo_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 0, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_unpacklo_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_unpacklo_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_unpacklo_epi64 + // CHECK-LABEL: test_mm_maskz_unpacklo_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 0, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_unpacklo_epi64(__U, __A, __B); } __m256i test_mm256_mask_unpacklo_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_unpacklo_epi64 + // CHECK-LABEL: test_mm256_mask_unpacklo_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_unpacklo_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_unpacklo_epi64(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_unpacklo_epi64 + // CHECK-LABEL: test_mm256_maskz_unpacklo_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 0, i32 4, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_unpacklo_epi64(__U, __A, __B); } __m128i test_mm_mask_sra_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_sra_epi32 + // CHECK-LABEL: test_mm_mask_sra_epi32 // CHECK: @llvm.x86.sse2.psra.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_sra_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_sra_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_sra_epi32 + // CHECK-LABEL: test_mm_maskz_sra_epi32 // CHECK: @llvm.x86.sse2.psra.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_sra_epi32(__U, __A, __B); } __m256i test_mm256_mask_sra_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_sra_epi32 + // CHECK-LABEL: test_mm256_mask_sra_epi32 // CHECK: @llvm.x86.avx2.psra.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_sra_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_sra_epi32(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_sra_epi32 + // CHECK-LABEL: test_mm256_maskz_sra_epi32 // CHECK: @llvm.x86.avx2.psra.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_sra_epi32(__U, __A, __B); } __m128i test_mm_mask_srai_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_srai_epi32 + // CHECK-LABEL: test_mm_mask_srai_epi32 // CHECK: @llvm.x86.sse2.psrai.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srai_epi32(__W, __U, __A, 5); } __m128i test_mm_mask_srai_epi32_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_srai_epi32_2 + // CHECK-LABEL: test_mm_mask_srai_epi32_2 // CHECK: @llvm.x86.sse2.psrai.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_srai_epi32(__W, __U, __A, __B); } __m128i test_mm_maskz_srai_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_srai_epi32 + // CHECK-LABEL: test_mm_maskz_srai_epi32 // CHECK: @llvm.x86.sse2.psrai.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srai_epi32(__U, __A, 5); } __m128i test_mm_maskz_srai_epi32_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_srai_epi32_2 + // CHECK-LABEL: test_mm_maskz_srai_epi32_2 // CHECK: @llvm.x86.sse2.psrai.d // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_srai_epi32(__U, __A, __B); } __m256i test_mm256_mask_srai_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_srai_epi32 + // CHECK-LABEL: test_mm256_mask_srai_epi32 // CHECK: @llvm.x86.avx2.psrai.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srai_epi32(__W, __U, __A, 5); } __m256i test_mm256_mask_srai_epi32_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_srai_epi32_2 + // CHECK-LABEL: test_mm256_mask_srai_epi32_2 // CHECK: @llvm.x86.avx2.psrai.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_srai_epi32(__W, __U, __A, __B); } __m256i test_mm256_maskz_srai_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_srai_epi32 + // CHECK-LABEL: test_mm256_maskz_srai_epi32 // CHECK: @llvm.x86.avx2.psrai.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srai_epi32(__U, __A, 5); } __m256i test_mm256_maskz_srai_epi32_2(__mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_srai_epi32_2 + // CHECK-LABEL: test_mm256_maskz_srai_epi32_2 // CHECK: @llvm.x86.avx2.psrai.d // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_srai_epi32(__U, __A, __B); } __m128i test_mm_sra_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_sra_epi64 + // CHECK-LABEL: test_mm_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.128 return _mm_sra_epi64(__A, __B); } __m128i test_mm_mask_sra_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_sra_epi64 + // CHECK-LABEL: test_mm_mask_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_sra_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_sra_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_sra_epi64 + // CHECK-LABEL: test_mm_maskz_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_sra_epi64(__U, __A, __B); } __m256i test_mm256_sra_epi64(__m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_sra_epi64 + // CHECK-LABEL: test_mm256_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.256 return _mm256_sra_epi64(__A, __B); } __m256i test_mm256_mask_sra_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_sra_epi64 + // CHECK-LABEL: test_mm256_mask_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_sra_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_sra_epi64(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_sra_epi64 + // CHECK-LABEL: test_mm256_maskz_sra_epi64 // CHECK: @llvm.x86.avx512.psra.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_sra_epi64(__U, __A, __B); } __m128i test_mm_srai_epi64(__m128i __A) { - // CHECK-LABEL: @test_mm_srai_epi64 + // CHECK-LABEL: test_mm_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.128 return _mm_srai_epi64(__A, 5); } __m128i test_mm_srai_epi64_2(__m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_srai_epi64_2 + // CHECK-LABEL: test_mm_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.128 return _mm_srai_epi64(__A, __B); } __m128i test_mm_mask_srai_epi64(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_srai_epi64 + // CHECK-LABEL: test_mm_mask_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srai_epi64(__W, __U, __A, 5); } __m128i test_mm_mask_srai_epi64_2(__m128i __W, __mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_mask_srai_epi64_2 + // CHECK-LABEL: test_mm_mask_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_srai_epi64(__W, __U, __A, __B); } __m128i test_mm_maskz_srai_epi64(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_srai_epi64 + // CHECK-LABEL: test_mm_maskz_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srai_epi64(__U, __A, 5); } __m128i test_mm_maskz_srai_epi64_2(__mmask8 __U, __m128i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm_maskz_srai_epi64_2 + // CHECK-LABEL: test_mm_maskz_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_srai_epi64(__U, __A, __B); } __m256i test_mm256_srai_epi64(__m256i __A) { - // CHECK-LABEL: @test_mm256_srai_epi64 + // CHECK-LABEL: test_mm256_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.256 return _mm256_srai_epi64(__A, 5); } __m256i test_mm256_srai_epi64_2(__m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_srai_epi64_2 + // CHECK-LABEL: test_mm256_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.256 return _mm256_srai_epi64(__A, __B); } __m256i test_mm256_mask_srai_epi64(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_srai_epi64 + // CHECK-LABEL: test_mm256_mask_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srai_epi64(__W, __U, __A, 5); } __m256i test_mm256_mask_srai_epi64_2(__m256i __W, __mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_mask_srai_epi64_2 + // CHECK-LABEL: test_mm256_mask_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_srai_epi64(__W, __U, __A, __B); } __m256i test_mm256_maskz_srai_epi64(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_srai_epi64 + // CHECK-LABEL: test_mm256_maskz_srai_epi64 // CHECK: @llvm.x86.avx512.psrai.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srai_epi64(__U, __A, 5); } __m256i test_mm256_maskz_srai_epi64_2(__mmask8 __U, __m256i __A, unsigned int __B) { - // CHECK-LABEL: @test_mm256_maskz_srai_epi64_2 + // CHECK-LABEL: test_mm256_maskz_srai_epi64_2 // CHECK: @llvm.x86.avx512.psrai.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_srai_epi64(__U, __A, __B); } __m128i test_mm_ternarylogic_epi32(__m128i __A, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_ternarylogic_epi32 + // CHECK-LABEL: test_mm_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.128 return _mm_ternarylogic_epi32(__A, __B, __C, 4); } __m128i test_mm_mask_ternarylogic_epi32(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_ternarylogic_epi32 + // CHECK-LABEL: test_mm_mask_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.128 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_ternarylogic_epi32(__A, __U, __B, __C, 4); } __m128i test_mm_maskz_ternarylogic_epi32(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_ternarylogic_epi32 + // CHECK-LABEL: test_mm_maskz_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.128 // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> zeroinitializer return _mm_maskz_ternarylogic_epi32(__U, __A, __B, __C, 4); } __m256i test_mm256_ternarylogic_epi32(__m256i __A, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_ternarylogic_epi32 + // CHECK-LABEL: test_mm256_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.256 return _mm256_ternarylogic_epi32(__A, __B, __C, 4); } __m256i test_mm256_mask_ternarylogic_epi32(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_ternarylogic_epi32 + // CHECK-LABEL: test_mm256_mask_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_ternarylogic_epi32(__A, __U, __B, __C, 4); } __m256i test_mm256_maskz_ternarylogic_epi32(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_ternarylogic_epi32 + // CHECK-LABEL: test_mm256_maskz_ternarylogic_epi32 // CHECK: @llvm.x86.avx512.pternlog.d.256 // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> zeroinitializer return _mm256_maskz_ternarylogic_epi32(__U, __A, __B, __C, 4); } __m128i test_mm_ternarylogic_epi64(__m128i __A, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_ternarylogic_epi64 + // CHECK-LABEL: test_mm_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.128 return _mm_ternarylogic_epi64(__A, __B, __C, 4); } __m128i test_mm_mask_ternarylogic_epi64(__m128i __A, __mmask8 __U, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_mask_ternarylogic_epi64 + // CHECK-LABEL: test_mm_mask_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_ternarylogic_epi64(__A, __U, __B, __C, 4); } __m128i test_mm_maskz_ternarylogic_epi64(__mmask8 __U, __m128i __A, __m128i __B, __m128i __C) { - // CHECK-LABEL: @test_mm_maskz_ternarylogic_epi64 + // CHECK-LABEL: test_mm_maskz_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.128 // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> zeroinitializer return _mm_maskz_ternarylogic_epi64(__U, __A, __B, __C, 4); } __m256i test_mm256_ternarylogic_epi64(__m256i __A, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_ternarylogic_epi64 + // CHECK-LABEL: test_mm256_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.256 return _mm256_ternarylogic_epi64(__A, __B, __C, 4); } __m256i test_mm256_mask_ternarylogic_epi64(__m256i __A, __mmask8 __U, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_mask_ternarylogic_epi64 + // CHECK-LABEL: test_mm256_mask_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_ternarylogic_epi64(__A, __U, __B, __C, 4); } __m256i test_mm256_maskz_ternarylogic_epi64(__mmask8 __U, __m256i __A, __m256i __B, __m256i __C) { - // CHECK-LABEL: @test_mm256_maskz_ternarylogic_epi64 + // CHECK-LABEL: test_mm256_maskz_ternarylogic_epi64 // CHECK: @llvm.x86.avx512.pternlog.q.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> zeroinitializer return _mm256_maskz_ternarylogic_epi64(__U, __A, __B, __C, 4); } __m256 test_mm256_shuffle_f32x4(__m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_shuffle_f32x4 + // CHECK-LABEL: test_mm256_shuffle_f32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> return _mm256_shuffle_f32x4(__A, __B, 3); } __m256 test_mm256_mask_shuffle_f32x4(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_f32x4 + // CHECK-LABEL: test_mm256_mask_shuffle_f32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_shuffle_f32x4(__W, __U, __A, __B, 3); } __m256 test_mm256_maskz_shuffle_f32x4(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_f32x4 + // CHECK-LABEL: test_mm256_maskz_shuffle_f32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_shuffle_f32x4(__U, __A, __B, 3); } __m256d test_mm256_shuffle_f64x2(__m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_shuffle_f64x2 + // CHECK-LABEL: test_mm256_shuffle_f64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> return _mm256_shuffle_f64x2(__A, __B, 3); } __m256d test_mm256_mask_shuffle_f64x2(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_f64x2 + // CHECK-LABEL: test_mm256_mask_shuffle_f64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -7938,7 +7939,7 @@ __m256d test_mm256_mask_shuffle_f64x2(__m256d __W, __mmask8 __U, __m256d __A, __ } __m256d test_mm256_maskz_shuffle_f64x2(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_f64x2 + // CHECK-LABEL: test_mm256_maskz_shuffle_f64x2 // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} @@ -7946,33 +7947,33 @@ __m256d test_mm256_maskz_shuffle_f64x2(__mmask8 __U, __m256d __A, __m256d __B) { } __m256i test_mm256_shuffle_i32x4(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_shuffle_i32x4 + // CHECK-LABEL: test_mm256_shuffle_i32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> return _mm256_shuffle_i32x4(__A, __B, 3); } __m256i test_mm256_mask_shuffle_i32x4(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_i32x4 + // CHECK-LABEL: test_mm256_mask_shuffle_i32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_shuffle_i32x4(__W, __U, __A, __B, 3); } __m256i test_mm256_maskz_shuffle_i32x4(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_i32x4 + // CHECK-LABEL: test_mm256_maskz_shuffle_i32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 4, i32 5, i32 6, i32 7, i32 12, i32 13, i32 14, i32 15> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_shuffle_i32x4(__U, __A, __B, 3); } __m256i test_mm256_shuffle_i64x2(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_shuffle_i64x2 + // CHECK-LABEL: test_mm256_shuffle_i64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> return _mm256_shuffle_i64x2(__A, __B, 3); } __m256i test_mm256_mask_shuffle_i64x2(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_i64x2 + // CHECK-LABEL: test_mm256_mask_shuffle_i64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} @@ -7980,7 +7981,7 @@ __m256i test_mm256_mask_shuffle_i64x2(__m256i __W, __mmask8 __U, __m256i __A, __ } __m256i test_mm256_maskz_shuffle_i64x2(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_i64x2 + // CHECK-LABEL: test_mm256_maskz_shuffle_i64x2 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 2, i32 3, i32 6, i32 7> // CHECK: shufflevector <8 x i1> %{{.*}}, <8 x i1> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} @@ -7988,1576 +7989,1576 @@ __m256i test_mm256_maskz_shuffle_i64x2(__mmask8 __U, __m256i __A, __m256i __B) { } __m128d test_mm_mask_shuffle_pd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_mask_shuffle_pd + // CHECK-LABEL: test_mm_mask_shuffle_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_shuffle_pd(__W, __U, __A, __B, 3); } __m128d test_mm_maskz_shuffle_pd(__mmask8 __U, __m128d __A, __m128d __B) { - // CHECK-LABEL: @test_mm_maskz_shuffle_pd + // CHECK-LABEL: test_mm_maskz_shuffle_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <2 x i32> <i32 1, i32 3> // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_shuffle_pd(__U, __A, __B, 3); } __m256d test_mm256_mask_shuffle_pd(__m256d __W, __mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_pd + // CHECK-LABEL: test_mm256_mask_shuffle_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 1, i32 5, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_shuffle_pd(__W, __U, __A, __B, 3); } __m256d test_mm256_maskz_shuffle_pd(__mmask8 __U, __m256d __A, __m256d __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_pd + // CHECK-LABEL: test_mm256_maskz_shuffle_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> %{{.*}}, <4 x i32> <i32 1, i32 5, i32 2, i32 6> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_shuffle_pd(__U, __A, __B, 3); } __m128 test_mm_mask_shuffle_ps(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_mask_shuffle_ps + // CHECK-LABEL: test_mm_mask_shuffle_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_shuffle_ps(__W, __U, __A, __B, 4); } __m128 test_mm_maskz_shuffle_ps(__mmask8 __U, __m128 __A, __m128 __B) { - // CHECK-LABEL: @test_mm_maskz_shuffle_ps + // CHECK-LABEL: test_mm_maskz_shuffle_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 4, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_shuffle_ps(__U, __A, __B, 4); } __m256 test_mm256_mask_shuffle_ps(__m256 __W, __mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_mask_shuffle_ps + // CHECK-LABEL: test_mm256_mask_shuffle_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 8, i32 8, i32 4, i32 5, i32 12, i32 12> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_shuffle_ps(__W, __U, __A, __B, 4); } __m256 test_mm256_maskz_shuffle_ps(__mmask8 __U, __m256 __A, __m256 __B) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_ps + // CHECK-LABEL: test_mm256_maskz_shuffle_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 8, i32 8, i32 4, i32 5, i32 12, i32 12> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_shuffle_ps(__U, __A, __B, 4); } __m128d test_mm_rsqrt14_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_rsqrt14_pd + // CHECK-LABEL: test_mm_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.128 return _mm_rsqrt14_pd(__A); } __m128d test_mm_mask_rsqrt14_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_rsqrt14_pd + // CHECK-LABEL: test_mm_mask_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.128 return _mm_mask_rsqrt14_pd(__W, __U, __A); } __m128d test_mm_maskz_rsqrt14_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_rsqrt14_pd + // CHECK-LABEL: test_mm_maskz_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.128 return _mm_maskz_rsqrt14_pd(__U, __A); } __m256d test_mm256_rsqrt14_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_rsqrt14_pd + // CHECK-LABEL: test_mm256_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.256 return _mm256_rsqrt14_pd(__A); } __m256d test_mm256_mask_rsqrt14_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_rsqrt14_pd + // CHECK-LABEL: test_mm256_mask_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.256 return _mm256_mask_rsqrt14_pd(__W, __U, __A); } __m256d test_mm256_maskz_rsqrt14_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_rsqrt14_pd + // CHECK-LABEL: test_mm256_maskz_rsqrt14_pd // CHECK: @llvm.x86.avx512.rsqrt14.pd.256 return _mm256_maskz_rsqrt14_pd(__U, __A); } __m128 test_mm_rsqrt14_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_rsqrt14_ps + // CHECK-LABEL: test_mm_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.128 return _mm_rsqrt14_ps(__A); } __m128 test_mm_mask_rsqrt14_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_rsqrt14_ps + // CHECK-LABEL: test_mm_mask_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.128 return _mm_mask_rsqrt14_ps(__W, __U, __A); } __m128 test_mm_maskz_rsqrt14_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_rsqrt14_ps + // CHECK-LABEL: test_mm_maskz_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.128 return _mm_maskz_rsqrt14_ps(__U, __A); } __m256 test_mm256_rsqrt14_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_rsqrt14_ps + // CHECK-LABEL: test_mm256_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.256 return _mm256_rsqrt14_ps(__A); } __m256 test_mm256_mask_rsqrt14_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_rsqrt14_ps + // CHECK-LABEL: test_mm256_mask_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.256 return _mm256_mask_rsqrt14_ps(__W, __U, __A); } __m256 test_mm256_maskz_rsqrt14_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_rsqrt14_ps + // CHECK-LABEL: test_mm256_maskz_rsqrt14_ps // CHECK: @llvm.x86.avx512.rsqrt14.ps.256 return _mm256_maskz_rsqrt14_ps(__U, __A); } __m256 test_mm256_broadcast_f32x4(__m128 __A) { - // CHECK-LABEL: @test_mm256_broadcast_f32x4 + // CHECK-LABEL: test_mm256_broadcast_f32x4 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm256_broadcast_f32x4(__A); } __m256 test_mm256_mask_broadcast_f32x4(__m256 __O, __mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_f32x4 + // CHECK-LABEL: test_mm256_mask_broadcast_f32x4 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_broadcast_f32x4(__O, __M, __A); } __m256 test_mm256_maskz_broadcast_f32x4(__mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_f32x4 + // CHECK-LABEL: test_mm256_maskz_broadcast_f32x4 // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_broadcast_f32x4(__M, __A); } __m256i test_mm256_broadcast_i32x4(__m128i const* __A) { - // CHECK-LABEL: @test_mm256_broadcast_i32x4 + // CHECK-LABEL: test_mm256_broadcast_i32x4 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> return _mm256_broadcast_i32x4(_mm_loadu_si128(__A)); } __m256i test_mm256_mask_broadcast_i32x4(__m256i __O, __mmask8 __M, __m128i const* __A) { - // CHECK-LABEL: @test_mm256_mask_broadcast_i32x4 + // CHECK-LABEL: test_mm256_mask_broadcast_i32x4 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_broadcast_i32x4(__O, __M, _mm_loadu_si128(__A)); } __m256i test_mm256_maskz_broadcast_i32x4(__mmask8 __M, __m128i const* __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcast_i32x4 + // CHECK-LABEL: test_mm256_maskz_broadcast_i32x4 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 0, i32 1, i32 2, i32 3> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_broadcast_i32x4(__M, _mm_loadu_si128(__A)); } __m256d test_mm256_mask_broadcastsd_pd(__m256d __O, __mmask8 __M, __m128d __A) { - // CHECK-LABEL: @test_mm256_mask_broadcastsd_pd + // CHECK-LABEL: test_mm256_mask_broadcastsd_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_broadcastsd_pd(__O, __M, __A); } __m256d test_mm256_maskz_broadcastsd_pd(__mmask8 __M, __m128d __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcastsd_pd + // CHECK-LABEL: test_mm256_maskz_broadcastsd_pd // CHECK: shufflevector <2 x double> %{{.*}}, <2 x double> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_broadcastsd_pd(__M, __A); } __m128 test_mm_mask_broadcastss_ps(__m128 __O, __mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_broadcastss_ps + // CHECK-LABEL: test_mm_mask_broadcastss_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_broadcastss_ps(__O, __M, __A); } __m128 test_mm_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_broadcastss_ps + // CHECK-LABEL: test_mm_maskz_broadcastss_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_broadcastss_ps(__M, __A); } __m256 test_mm256_mask_broadcastss_ps(__m256 __O, __mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_mask_broadcastss_ps + // CHECK-LABEL: test_mm256_mask_broadcastss_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> zeroinitializer // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_broadcastss_ps(__O, __M, __A); } __m256 test_mm256_maskz_broadcastss_ps(__mmask8 __M, __m128 __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcastss_ps + // CHECK-LABEL: test_mm256_maskz_broadcastss_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <8 x i32> zeroinitializer // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_broadcastss_ps(__M, __A); } __m128i test_mm_mask_broadcastd_epi32(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_broadcastd_epi32 + // CHECK-LABEL: test_mm_mask_broadcastd_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_broadcastd_epi32(__O, __M, __A); } __m128i test_mm_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_broadcastd_epi32 + // CHECK-LABEL: test_mm_maskz_broadcastd_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_broadcastd_epi32(__M, __A); } __m256i test_mm256_mask_broadcastd_epi32(__m256i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_broadcastd_epi32 + // CHECK-LABEL: test_mm256_mask_broadcastd_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> zeroinitializer // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_broadcastd_epi32(__O, __M, __A); } __m256i test_mm256_maskz_broadcastd_epi32(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcastd_epi32 + // CHECK-LABEL: test_mm256_maskz_broadcastd_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <8 x i32> zeroinitializer // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_broadcastd_epi32(__M, __A); } __m128i test_mm_mask_broadcastq_epi64(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_broadcastq_epi64 + // CHECK-LABEL: test_mm_mask_broadcastq_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> zeroinitializer // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_broadcastq_epi64(__O, __M, __A); } __m128i test_mm_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_broadcastq_epi64 + // CHECK-LABEL: test_mm_maskz_broadcastq_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> zeroinitializer // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_broadcastq_epi64(__M, __A); } __m256i test_mm256_mask_broadcastq_epi64(__m256i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_broadcastq_epi64 + // CHECK-LABEL: test_mm256_mask_broadcastq_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_broadcastq_epi64(__O, __M, __A); } __m256i test_mm256_maskz_broadcastq_epi64(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_broadcastq_epi64 + // CHECK-LABEL: test_mm256_maskz_broadcastq_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <4 x i32> zeroinitializer // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_broadcastq_epi64(__M, __A); } __m128i test_mm_cvtsepi32_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtsepi32_epi8 + // CHECK-LABEL: test_mm_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.128 return _mm_cvtsepi32_epi8(__A); } __m128i test_mm_mask_cvtsepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi32_epi8 + // CHECK-LABEL: test_mm_mask_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.128 return _mm_mask_cvtsepi32_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtsepi32_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtsepi32_epi8 + // CHECK-LABEL: test_mm_maskz_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.128 return _mm_maskz_cvtsepi32_epi8(__M, __A); } void test_mm_mask_cvtsepi32_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi32_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtsepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.mem.128 return _mm_mask_cvtsepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtsepi32_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtsepi32_epi8 + // CHECK-LABEL: test_mm256_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.256 return _mm256_cvtsepi32_epi8(__A); } __m128i test_mm256_mask_cvtsepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi32_epi8 + // CHECK-LABEL: test_mm256_mask_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.256 return _mm256_mask_cvtsepi32_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtsepi32_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtsepi32_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtsepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.256 return _mm256_maskz_cvtsepi32_epi8(__M, __A); } void test_mm256_mask_cvtsepi32_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi32_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtsepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.db.mem.256 return _mm256_mask_cvtsepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtsepi32_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtsepi32_epi16 + // CHECK-LABEL: test_mm_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.128 return _mm_cvtsepi32_epi16(__A); } __m128i test_mm_mask_cvtsepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi32_epi16 + // CHECK-LABEL: test_mm_mask_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.128 return _mm_mask_cvtsepi32_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtsepi32_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtsepi32_epi16 + // CHECK-LABEL: test_mm_maskz_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.128 return _mm_maskz_cvtsepi32_epi16(__M, __A); } void test_mm_mask_cvtsepi32_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi32_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtsepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.mem.128 return _mm_mask_cvtsepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtsepi32_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtsepi32_epi16 + // CHECK-LABEL: test_mm256_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.256 return _mm256_cvtsepi32_epi16(__A); } __m128i test_mm256_mask_cvtsepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi32_epi16 + // CHECK-LABEL: test_mm256_mask_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.256 return _mm256_mask_cvtsepi32_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtsepi32_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtsepi32_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtsepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.256 return _mm256_maskz_cvtsepi32_epi16(__M, __A); } void test_mm256_mask_cvtsepi32_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi32_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtsepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.dw.mem.256 return _mm256_mask_cvtsepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm_cvtsepi64_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtsepi64_epi8 + // CHECK-LABEL: test_mm_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.128 return _mm_cvtsepi64_epi8(__A); } __m128i test_mm_mask_cvtsepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_epi8 + // CHECK-LABEL: test_mm_mask_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.128 return _mm_mask_cvtsepi64_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtsepi64_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtsepi64_epi8 + // CHECK-LABEL: test_mm_maskz_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.128 return _mm_maskz_cvtsepi64_epi8(__M, __A); } void test_mm_mask_cvtsepi64_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtsepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.mem.128 return _mm_mask_cvtsepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtsepi64_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtsepi64_epi8 + // CHECK-LABEL: test_mm256_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.256 return _mm256_cvtsepi64_epi8(__A); } __m128i test_mm256_mask_cvtsepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_epi8 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.256 return _mm256_mask_cvtsepi64_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtsepi64_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtsepi64_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtsepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.256 return _mm256_maskz_cvtsepi64_epi8(__M, __A); } void test_mm256_mask_cvtsepi64_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovs.qb.mem.256 return _mm256_mask_cvtsepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtsepi64_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtsepi64_epi32 + // CHECK-LABEL: test_mm_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.128 return _mm_cvtsepi64_epi32(__A); } __m128i test_mm_mask_cvtsepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_epi32 + // CHECK-LABEL: test_mm_mask_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.128 return _mm_mask_cvtsepi64_epi32(__O, __M, __A); } __m128i test_mm_maskz_cvtsepi64_epi32(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtsepi64_epi32 + // CHECK-LABEL: test_mm_maskz_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.128 return _mm_maskz_cvtsepi64_epi32(__M, __A); } void test_mm_mask_cvtsepi64_storeu_epi32(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_storeu_epi32 + // CHECK-LABEL: test_mm_mask_cvtsepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.mem.128 return _mm_mask_cvtsepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm256_cvtsepi64_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtsepi64_epi32 + // CHECK-LABEL: test_mm256_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.256 return _mm256_cvtsepi64_epi32(__A); } __m128i test_mm256_mask_cvtsepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_epi32 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.256 return _mm256_mask_cvtsepi64_epi32(__O, __M, __A); } __m128i test_mm256_maskz_cvtsepi64_epi32(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtsepi64_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtsepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.256 return _mm256_maskz_cvtsepi64_epi32(__M, __A); } void test_mm256_mask_cvtsepi64_storeu_epi32(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_storeu_epi32 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmovs.qd.mem.256 return _mm256_mask_cvtsepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm_cvtsepi64_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtsepi64_epi16 + // CHECK-LABEL: test_mm_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.128 return _mm_cvtsepi64_epi16(__A); } __m128i test_mm_mask_cvtsepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_epi16 + // CHECK-LABEL: test_mm_mask_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.128 return _mm_mask_cvtsepi64_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtsepi64_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtsepi64_epi16 + // CHECK-LABEL: test_mm_maskz_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.128 return _mm_maskz_cvtsepi64_epi16(__M, __A); } void test_mm_mask_cvtsepi64_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtsepi64_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtsepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.mem.128 return _mm_mask_cvtsepi64_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtsepi64_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtsepi64_epi16 + // CHECK-LABEL: test_mm256_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.256 return _mm256_cvtsepi64_epi16(__A); } __m128i test_mm256_mask_cvtsepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_epi16 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.256 return _mm256_mask_cvtsepi64_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtsepi64_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtsepi64_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtsepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.256 return _mm256_maskz_cvtsepi64_epi16(__M, __A); } void test_mm256_mask_cvtsepi64_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtsepi64_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtsepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovs.qw.mem.256 return _mm256_mask_cvtsepi64_storeu_epi16(__P, __M, __A); } __m128i test_mm_cvtusepi32_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtusepi32_epi8 + // CHECK-LABEL: test_mm_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.128 return _mm_cvtusepi32_epi8(__A); } __m128i test_mm_mask_cvtusepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi32_epi8 + // CHECK-LABEL: test_mm_mask_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.128 return _mm_mask_cvtusepi32_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtusepi32_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtusepi32_epi8 + // CHECK-LABEL: test_mm_maskz_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.128 return _mm_maskz_cvtusepi32_epi8(__M, __A); } void test_mm_mask_cvtusepi32_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi32_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtusepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.mem.128 return _mm_mask_cvtusepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtusepi32_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtusepi32_epi8 + // CHECK-LABEL: test_mm256_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.256 return _mm256_cvtusepi32_epi8(__A); } __m128i test_mm256_mask_cvtusepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi32_epi8 + // CHECK-LABEL: test_mm256_mask_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.256 return _mm256_mask_cvtusepi32_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtusepi32_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtusepi32_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtusepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.256 return _mm256_maskz_cvtusepi32_epi8(__M, __A); } void test_mm256_mask_cvtusepi32_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi32_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtusepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.db.mem.256 return _mm256_mask_cvtusepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtusepi32_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtusepi32_epi16 + // CHECK-LABEL: test_mm_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.128 return _mm_cvtusepi32_epi16(__A); } __m128i test_mm_mask_cvtusepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi32_epi16 + // CHECK-LABEL: test_mm_mask_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.128 return _mm_mask_cvtusepi32_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtusepi32_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtusepi32_epi16 + // CHECK-LABEL: test_mm_maskz_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.128 return _mm_maskz_cvtusepi32_epi16(__M, __A); } void test_mm_mask_cvtusepi32_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi32_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtusepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.mem.128 return _mm_mask_cvtusepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtusepi32_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtusepi32_epi16 + // CHECK-LABEL: test_mm256_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.256 return _mm256_cvtusepi32_epi16(__A); } __m128i test_mm256_mask_cvtusepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi32_epi16 + // CHECK-LABEL: test_mm256_mask_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.256 return _mm256_mask_cvtusepi32_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtusepi32_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtusepi32_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtusepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.256 return _mm256_maskz_cvtusepi32_epi16(__M, __A); } void test_mm256_mask_cvtusepi32_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi32_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtusepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.dw.mem.256 return _mm256_mask_cvtusepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm_cvtusepi64_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtusepi64_epi8 + // CHECK-LABEL: test_mm_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.128 return _mm_cvtusepi64_epi8(__A); } __m128i test_mm_mask_cvtusepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_epi8 + // CHECK-LABEL: test_mm_mask_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.128 return _mm_mask_cvtusepi64_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtusepi64_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtusepi64_epi8 + // CHECK-LABEL: test_mm_maskz_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.128 return _mm_maskz_cvtusepi64_epi8(__M, __A); } void test_mm_mask_cvtusepi64_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtusepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.mem.128 return _mm_mask_cvtusepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtusepi64_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtusepi64_epi8 + // CHECK-LABEL: test_mm256_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.256 return _mm256_cvtusepi64_epi8(__A); } __m128i test_mm256_mask_cvtusepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_epi8 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.256 return _mm256_mask_cvtusepi64_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtusepi64_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtusepi64_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtusepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.256 return _mm256_maskz_cvtusepi64_epi8(__M, __A); } void test_mm256_mask_cvtusepi64_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmovus.qb.mem.256 return _mm256_mask_cvtusepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtusepi64_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtusepi64_epi32 + // CHECK-LABEL: test_mm_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.128 return _mm_cvtusepi64_epi32(__A); } __m128i test_mm_mask_cvtusepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_epi32 + // CHECK-LABEL: test_mm_mask_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.128 return _mm_mask_cvtusepi64_epi32(__O, __M, __A); } __m128i test_mm_maskz_cvtusepi64_epi32(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtusepi64_epi32 + // CHECK-LABEL: test_mm_maskz_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.128 return _mm_maskz_cvtusepi64_epi32(__M, __A); } void test_mm_mask_cvtusepi64_storeu_epi32(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_storeu_epi32 + // CHECK-LABEL: test_mm_mask_cvtusepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.mem.128 return _mm_mask_cvtusepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm256_cvtusepi64_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtusepi64_epi32 + // CHECK-LABEL: test_mm256_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.256 return _mm256_cvtusepi64_epi32(__A); } __m128i test_mm256_mask_cvtusepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_epi32 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.256 return _mm256_mask_cvtusepi64_epi32(__O, __M, __A); } __m128i test_mm256_maskz_cvtusepi64_epi32(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtusepi64_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtusepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.256 return _mm256_maskz_cvtusepi64_epi32(__M, __A); } void test_mm256_mask_cvtusepi64_storeu_epi32(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_storeu_epi32 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmovus.qd.mem.256 return _mm256_mask_cvtusepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm_cvtusepi64_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtusepi64_epi16 + // CHECK-LABEL: test_mm_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.128 return _mm_cvtusepi64_epi16(__A); } __m128i test_mm_mask_cvtusepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_epi16 + // CHECK-LABEL: test_mm_mask_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.128 return _mm_mask_cvtusepi64_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtusepi64_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtusepi64_epi16 + // CHECK-LABEL: test_mm_maskz_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.128 return _mm_maskz_cvtusepi64_epi16(__M, __A); } void test_mm_mask_cvtusepi64_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtusepi64_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtusepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.mem.128 return _mm_mask_cvtusepi64_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtusepi64_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtusepi64_epi16 + // CHECK-LABEL: test_mm256_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.256 return _mm256_cvtusepi64_epi16(__A); } __m128i test_mm256_mask_cvtusepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_epi16 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.256 return _mm256_mask_cvtusepi64_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtusepi64_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtusepi64_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtusepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.256 return _mm256_maskz_cvtusepi64_epi16(__M, __A); } void test_mm256_mask_cvtusepi64_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtusepi64_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtusepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmovus.qw.mem.256 return _mm256_mask_cvtusepi64_storeu_epi16(__P, __M, __A); } __m128i test_mm_cvtepi32_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi32_epi8 + // CHECK-LABEL: test_mm_cvtepi32_epi8 // CHECK: trunc <4 x i32> %{{.*}} to <4 x i8> // CHECK: shufflevector <4 x i8> %{{.*}}, <4 x i8> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7> return _mm_cvtepi32_epi8(__A); } __m128i test_mm_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_epi8 + // CHECK-LABEL: test_mm_mask_cvtepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.128 return _mm_mask_cvtepi32_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtepi32_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi32_epi8 + // CHECK-LABEL: test_mm_maskz_cvtepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.128 return _mm_maskz_cvtepi32_epi8(__M, __A); } void test_mm_mask_cvtepi32_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.mem.128 return _mm_mask_cvtepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtepi32_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi32_epi8 + // CHECK-LABEL: test_mm256_cvtepi32_epi8 // CHECK: trunc <8 x i32> %{{.*}} to <8 x i8> // CHECK: shufflevector <8 x i8> %{{.*}}, <8 x i8> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8, i32 9, i32 10, i32 11, i32 12, i32 13, i32 14, i32 15> return _mm256_cvtepi32_epi8(__A); } __m128i test_mm256_mask_cvtepi32_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_epi8 + // CHECK-LABEL: test_mm256_mask_cvtepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.256 return _mm256_mask_cvtepi32_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtepi32_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi32_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtepi32_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.256 return _mm256_maskz_cvtepi32_epi8(__M, __A); } void test_mm256_mask_cvtepi32_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtepi32_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.db.mem.256 return _mm256_mask_cvtepi32_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtepi32_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi32_epi16 + // CHECK-LABEL: test_mm_cvtepi32_epi16 // CHECK: trunc <4 x i32> %{{.*}} to <4 x i16> // CHECK: shufflevector <4 x i16> %{{.*}}, <4 x i16> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm_cvtepi32_epi16(__A); } __m128i test_mm_mask_cvtepi32_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_epi16 + // CHECK-LABEL: test_mm_mask_cvtepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.128 return _mm_mask_cvtepi32_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtepi32_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi32_epi16 + // CHECK-LABEL: test_mm_maskz_cvtepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.128 return _mm_maskz_cvtepi32_epi16(__M, __A); } void test_mm_mask_cvtepi32_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi32_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.mem.128 return _mm_mask_cvtepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtepi32_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi32_epi16 + // CHECK-LABEL: test_mm256_cvtepi32_epi16 // CHECK: trunc <8 x i32> %{{.*}} to <8 x i16> return _mm256_cvtepi32_epi16(__A); } __m128i test_mm256_mask_cvtepi32_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_epi16 + // CHECK-LABEL: test_mm256_mask_cvtepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.256 return _mm256_mask_cvtepi32_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtepi32_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi32_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtepi32_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.256 return _mm256_maskz_cvtepi32_epi16(__M, __A); } void test_mm256_mask_cvtepi32_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi32_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtepi32_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.dw.mem.256 return _mm256_mask_cvtepi32_storeu_epi16(__P, __M, __A); } __m128i test_mm_cvtepi64_epi8(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi64_epi8 + // CHECK-LABEL: test_mm_cvtepi64_epi8 // CHECK: trunc <2 x i64> %{{.*}} to <2 x i8> // CHECK: shufflevector <2 x i8> %{{.*}}, <2 x i8> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3, i32 3> return _mm_cvtepi64_epi8(__A); } __m128i test_mm_mask_cvtepi64_epi8(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_epi8 + // CHECK-LABEL: test_mm_mask_cvtepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.128 return _mm_mask_cvtepi64_epi8(__O, __M, __A); } __m128i test_mm_maskz_cvtepi64_epi8(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi64_epi8 + // CHECK-LABEL: test_mm_maskz_cvtepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.128 return _mm_maskz_cvtepi64_epi8(__M, __A); } void test_mm_mask_cvtepi64_storeu_epi8(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_storeu_epi8 + // CHECK-LABEL: test_mm_mask_cvtepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.mem.128 return _mm_mask_cvtepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm256_cvtepi64_epi8(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi64_epi8 + // CHECK-LABEL: test_mm256_cvtepi64_epi8 // CHECK: trunc <4 x i64> %{{.*}} to <4 x i8> // CHECK: shufflevector <4 x i8> %{{.*}}, <4 x i8> %{{.*}}, <16 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7> return _mm256_cvtepi64_epi8(__A); } __m128i test_mm256_mask_cvtepi64_epi8(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_epi8 + // CHECK-LABEL: test_mm256_mask_cvtepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.256 return _mm256_mask_cvtepi64_epi8(__O, __M, __A); } __m128i test_mm256_maskz_cvtepi64_epi8(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi64_epi8 + // CHECK-LABEL: test_mm256_maskz_cvtepi64_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.256 return _mm256_maskz_cvtepi64_epi8(__M, __A); } void test_mm256_mask_cvtepi64_storeu_epi8(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_storeu_epi8 + // CHECK-LABEL: test_mm256_mask_cvtepi64_storeu_epi8 // CHECK: @llvm.x86.avx512.mask.pmov.qb.mem.256 return _mm256_mask_cvtepi64_storeu_epi8(__P, __M, __A); } __m128i test_mm_cvtepi64_epi32(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi64_epi32 + // CHECK-LABEL: test_mm_cvtepi64_epi32 // CHECK: trunc <2 x i64> %{{.*}} to <2 x i32> // CHECK: shufflevector <2 x i32> %{{.*}}, <2 x i32> %{{.*}}, <4 x i32> <i32 0, i32 1, i32 2, i32 3> return _mm_cvtepi64_epi32(__A); } __m128i test_mm_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_epi32 + // CHECK-LABEL: test_mm_mask_cvtepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmov.qd.128 return _mm_mask_cvtepi64_epi32(__O, __M, __A); } __m128i test_mm_maskz_cvtepi64_epi32(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi64_epi32 + // CHECK-LABEL: test_mm_maskz_cvtepi64_epi32 // CHECK: @llvm.x86.avx512.mask.pmov.qd.128 return _mm_maskz_cvtepi64_epi32(__M, __A); } void test_mm_mask_cvtepi64_storeu_epi32(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_storeu_epi32 + // CHECK-LABEL: test_mm_mask_cvtepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmov.qd.mem.128 return _mm_mask_cvtepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm256_cvtepi64_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi64_epi32 + // CHECK-LABEL: test_mm256_cvtepi64_epi32 // CHECK: trunc <4 x i64> %{{.*}} to <4 x i32> return _mm256_cvtepi64_epi32(__A); } __m128i test_mm256_mask_cvtepi64_epi32(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepi64_epi32 // CHECK: trunc <4 x i64> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm256_mask_cvtepi64_epi32(__O, __M, __A); } __m128i test_mm256_maskz_cvtepi64_epi32(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi64_epi32 + // CHECK-LABEL: test_mm256_maskz_cvtepi64_epi32 // CHECK: trunc <4 x i64> %{{.*}} to <4 x i32> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm256_maskz_cvtepi64_epi32(__M, __A); } void test_mm256_mask_cvtepi64_storeu_epi32(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_storeu_epi32 + // CHECK-LABEL: test_mm256_mask_cvtepi64_storeu_epi32 // CHECK: @llvm.x86.avx512.mask.pmov.qd.mem.256 return _mm256_mask_cvtepi64_storeu_epi32(__P, __M, __A); } __m128i test_mm_cvtepi64_epi16(__m128i __A) { - // CHECK-LABEL: @test_mm_cvtepi64_epi16 + // CHECK-LABEL: test_mm_cvtepi64_epi16 // CHECK: trunc <2 x i64> %{{.*}} to <2 x i16> // CHECK: shufflevector <2 x i16> %{{.*}}, <2 x i16> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 3, i32 3, i32 3, i32 3> return _mm_cvtepi64_epi16(__A); } __m128i test_mm_mask_cvtepi64_epi16(__m128i __O, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_epi16 + // CHECK-LABEL: test_mm_mask_cvtepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.128 return _mm_mask_cvtepi64_epi16(__O, __M, __A); } __m128i test_mm_maskz_cvtepi64_epi16(__mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtepi64_epi16 + // CHECK-LABEL: test_mm_maskz_cvtepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.128 return _mm_maskz_cvtepi64_epi16(__M, __A); } void test_mm_mask_cvtepi64_storeu_epi16(void * __P, __mmask8 __M, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtepi64_storeu_epi16 + // CHECK-LABEL: test_mm_mask_cvtepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.mem.128 return _mm_mask_cvtepi64_storeu_epi16(__P, __M, __A); } __m128i test_mm256_cvtepi64_epi16(__m256i __A) { - // CHECK-LABEL: @test_mm256_cvtepi64_epi16 + // CHECK-LABEL: test_mm256_cvtepi64_epi16 // CHECK: trunc <4 x i64> %{{.*}} to <4 x i16> // CHECK: shufflevector <4 x i16> %{{.*}}, <4 x i16> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7> return _mm256_cvtepi64_epi16(__A); } __m128i test_mm256_mask_cvtepi64_epi16(__m128i __O, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_epi16 + // CHECK-LABEL: test_mm256_mask_cvtepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.256 return _mm256_mask_cvtepi64_epi16(__O, __M, __A); } __m128i test_mm256_maskz_cvtepi64_epi16(__mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtepi64_epi16 + // CHECK-LABEL: test_mm256_maskz_cvtepi64_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.256 return _mm256_maskz_cvtepi64_epi16(__M, __A); } void test_mm256_mask_cvtepi64_storeu_epi16(void * __P, __mmask8 __M, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtepi64_storeu_epi16 + // CHECK-LABEL: test_mm256_mask_cvtepi64_storeu_epi16 // CHECK: @llvm.x86.avx512.mask.pmov.qw.mem.256 return _mm256_mask_cvtepi64_storeu_epi16(__P, __M, __A); } __m128 test_mm256_extractf32x4_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_extractf32x4_ps + // CHECK-LABEL: test_mm256_extractf32x4_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> return _mm256_extractf32x4_ps(__A, 1); } __m128 test_mm256_mask_extractf32x4_ps(__m128 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_extractf32x4_ps + // CHECK-LABEL: test_mm256_mask_extractf32x4_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_mask_extractf32x4_ps(__W, __U, __A, 1); } __m128 test_mm256_maskz_extractf32x4_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_extractf32x4_ps + // CHECK-LABEL: test_mm256_maskz_extractf32x4_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm256_maskz_extractf32x4_ps(__U, __A, 1); } __m128i test_mm256_extracti32x4_epi32(__m256i __A) { - // CHECK-LABEL: @test_mm256_extracti32x4_epi32 + // CHECK-LABEL: test_mm256_extracti32x4_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> return _mm256_extracti32x4_epi32(__A, 1); } __m128i test_mm256_mask_extracti32x4_epi32(__m128i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_extracti32x4_epi32 + // CHECK-LABEL: test_mm256_mask_extracti32x4_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm256_mask_extracti32x4_epi32(__W, __U, __A, 1); } __m128i test_mm256_maskz_extracti32x4_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_extracti32x4_epi32 + // CHECK-LABEL: test_mm256_maskz_extracti32x4_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> poison, <4 x i32> <i32 4, i32 5, i32 6, i32 7> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm256_maskz_extracti32x4_epi32(__U, __A, 1); } __m256 test_mm256_insertf32x4(__m256 __A, __m128 __B) { - // CHECK-LABEL: @test_mm256_insertf32x4 + // CHECK-LABEL: test_mm256_insertf32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> return _mm256_insertf32x4(__A, __B, 1); } __m256 test_mm256_mask_insertf32x4(__m256 __W, __mmask8 __U, __m256 __A, __m128 __B) { - // CHECK-LABEL: @test_mm256_mask_insertf32x4 + // CHECK-LABEL: test_mm256_mask_insertf32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_insertf32x4(__W, __U, __A, __B, 1); } __m256 test_mm256_maskz_insertf32x4(__mmask8 __U, __m256 __A, __m128 __B) { - // CHECK-LABEL: @test_mm256_maskz_insertf32x4 + // CHECK-LABEL: test_mm256_maskz_insertf32x4 // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_insertf32x4(__U, __A, __B, 1); } __m256i test_mm256_inserti32x4(__m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_inserti32x4 + // CHECK-LABEL: test_mm256_inserti32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> return _mm256_inserti32x4(__A, __B, 1); } __m256i test_mm256_mask_inserti32x4(__m256i __W, __mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_mask_inserti32x4 + // CHECK-LABEL: test_mm256_mask_inserti32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_inserti32x4(__W, __U, __A, __B, 1); } __m256i test_mm256_maskz_inserti32x4(__mmask8 __U, __m256i __A, __m128i __B) { - // CHECK-LABEL: @test_mm256_maskz_inserti32x4 + // CHECK-LABEL: test_mm256_maskz_inserti32x4 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 8, i32 9, i32 10, i32 11> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_inserti32x4(__U, __A, __B, 1); } __m128d test_mm_getmant_pd(__m128d __A) { - // CHECK-LABEL: @test_mm_getmant_pd + // CHECK-LABEL: test_mm_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.128 return _mm_getmant_pd(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128d test_mm_mask_getmant_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_getmant_pd + // CHECK-LABEL: test_mm_mask_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.128 return _mm_mask_getmant_pd(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128d test_mm_maskz_getmant_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_getmant_pd + // CHECK-LABEL: test_mm_maskz_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.128 return _mm_maskz_getmant_pd(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256d test_mm256_getmant_pd(__m256d __A) { - // CHECK-LABEL: @test_mm256_getmant_pd + // CHECK-LABEL: test_mm256_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.256 return _mm256_getmant_pd(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256d test_mm256_mask_getmant_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_getmant_pd + // CHECK-LABEL: test_mm256_mask_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.256 return _mm256_mask_getmant_pd(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256d test_mm256_maskz_getmant_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_getmant_pd + // CHECK-LABEL: test_mm256_maskz_getmant_pd // CHECK: @llvm.x86.avx512.mask.getmant.pd.256 return _mm256_maskz_getmant_pd(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128 test_mm_getmant_ps(__m128 __A) { - // CHECK-LABEL: @test_mm_getmant_ps + // CHECK-LABEL: test_mm_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.128 return _mm_getmant_ps(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128 test_mm_mask_getmant_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_getmant_ps + // CHECK-LABEL: test_mm_mask_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.128 return _mm_mask_getmant_ps(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128 test_mm_maskz_getmant_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_getmant_ps + // CHECK-LABEL: test_mm_maskz_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.128 return _mm_maskz_getmant_ps(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256 test_mm256_getmant_ps(__m256 __A) { - // CHECK-LABEL: @test_mm256_getmant_ps + // CHECK-LABEL: test_mm256_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.256 return _mm256_getmant_ps(__A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256 test_mm256_mask_getmant_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_getmant_ps + // CHECK-LABEL: test_mm256_mask_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.256 return _mm256_mask_getmant_ps(__W, __U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m256 test_mm256_maskz_getmant_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_getmant_ps + // CHECK-LABEL: test_mm256_maskz_getmant_ps // CHECK: @llvm.x86.avx512.mask.getmant.ps.256 return _mm256_maskz_getmant_ps(__U, __A,_MM_MANT_NORM_p5_2, _MM_MANT_SIGN_nan); } __m128d test_mm_mmask_i64gather_pd(__m128d __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mmask_i64gather_pd + // CHECK-LABEL: test_mm_mmask_i64gather_pd // CHECK: @llvm.x86.avx512.mask.gather3div2.df return _mm_mmask_i64gather_pd(__v1_old, __mask, __index, __addr, 2); } __m128i test_mm_mmask_i64gather_epi64(__m128i __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mmask_i64gather_epi64 + // CHECK-LABEL: test_mm_mmask_i64gather_epi64 // CHECK: @llvm.x86.avx512.mask.gather3div2.di return _mm_mmask_i64gather_epi64(__v1_old, __mask, __index, __addr, 2); } __m256d test_mm256_mmask_i64gather_pd(__m256d __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mmask_i64gather_pd + // CHECK-LABEL: test_mm256_mmask_i64gather_pd // CHECK: @llvm.x86.avx512.mask.gather3div4.df return _mm256_mmask_i64gather_pd(__v1_old, __mask, __index, __addr, 2); } __m256i test_mm256_mmask_i64gather_epi64(__m256i __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mmask_i64gather_epi64 + // CHECK-LABEL: test_mm256_mmask_i64gather_epi64 // CHECK: @llvm.x86.avx512.mask.gather3div4.di return _mm256_mmask_i64gather_epi64(__v1_old, __mask, __index, __addr, 2); } __m128 test_mm_mmask_i64gather_ps(__m128 __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mmask_i64gather_ps + // CHECK-LABEL: test_mm_mmask_i64gather_ps // CHECK: @llvm.x86.avx512.mask.gather3div4.sf return _mm_mmask_i64gather_ps(__v1_old, __mask, __index, __addr, 2); } __m128i test_mm_mmask_i64gather_epi32(__m128i __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mmask_i64gather_epi32 + // CHECK-LABEL: test_mm_mmask_i64gather_epi32 // CHECK: @llvm.x86.avx512.mask.gather3div4.si return _mm_mmask_i64gather_epi32(__v1_old, __mask, __index, __addr, 2); } __m128 test_mm256_mmask_i64gather_ps(__m128 __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mmask_i64gather_ps + // CHECK-LABEL: test_mm256_mmask_i64gather_ps // CHECK: @llvm.x86.avx512.mask.gather3div8.sf return _mm256_mmask_i64gather_ps(__v1_old, __mask, __index, __addr, 2); } __m128i test_mm256_mmask_i64gather_epi32(__m128i __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mmask_i64gather_epi32 + // CHECK-LABEL: test_mm256_mmask_i64gather_epi32 // CHECK: @llvm.x86.avx512.mask.gather3div8.si return _mm256_mmask_i64gather_epi32(__v1_old, __mask, __index, __addr, 2); } __m128d test_mm_mask_i32gather_pd(__m128d __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mask_i32gather_pd + // CHECK-LABEL: test_mm_mask_i32gather_pd // CHECK: @llvm.x86.avx512.mask.gather3siv2.df return _mm_mmask_i32gather_pd(__v1_old, __mask, __index, __addr, 2); } __m128i test_mm_mask_i32gather_epi64(__m128i __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mask_i32gather_epi64 + // CHECK-LABEL: test_mm_mask_i32gather_epi64 // CHECK: @llvm.x86.avx512.mask.gather3siv2.di return _mm_mmask_i32gather_epi64(__v1_old, __mask, __index, __addr, 2); } __m256d test_mm256_mask_i32gather_pd(__m256d __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mask_i32gather_pd + // CHECK-LABEL: test_mm256_mask_i32gather_pd // CHECK: @llvm.x86.avx512.mask.gather3siv4.df return _mm256_mmask_i32gather_pd(__v1_old, __mask, __index, __addr, 2); } __m256i test_mm256_mask_i32gather_epi64(__m256i __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mask_i32gather_epi64 + // CHECK-LABEL: test_mm256_mask_i32gather_epi64 // CHECK: @llvm.x86.avx512.mask.gather3siv4.di return _mm256_mmask_i32gather_epi64(__v1_old, __mask, __index, __addr, 2); } __m128 test_mm_mask_i32gather_ps(__m128 __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mask_i32gather_ps + // CHECK-LABEL: test_mm_mask_i32gather_ps // CHECK: @llvm.x86.avx512.mask.gather3siv4.sf return _mm_mmask_i32gather_ps(__v1_old, __mask, __index, __addr, 2); } __m128i test_mm_mask_i32gather_epi32(__m128i __v1_old, __mmask8 __mask, __m128i __index, void const *__addr) { - // CHECK-LABEL: @test_mm_mask_i32gather_epi32 + // CHECK-LABEL: test_mm_mask_i32gather_epi32 // CHECK: @llvm.x86.avx512.mask.gather3siv4.si return _mm_mmask_i32gather_epi32(__v1_old, __mask, __index, __addr, 2); } __m256 test_mm256_mask_i32gather_ps(__m256 __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mask_i32gather_ps + // CHECK-LABEL: test_mm256_mask_i32gather_ps // CHECK: @llvm.x86.avx512.mask.gather3siv8.sf return _mm256_mmask_i32gather_ps(__v1_old, __mask, __index, __addr, 2); } __m256i test_mm256_mask_i32gather_epi32(__m256i __v1_old, __mmask8 __mask, __m256i __index, void const *__addr) { - // CHECK-LABEL: @test_mm256_mask_i32gather_epi32 + // CHECK-LABEL: test_mm256_mask_i32gather_epi32 // CHECK: @llvm.x86.avx512.mask.gather3siv8.si return _mm256_mmask_i32gather_epi32(__v1_old, __mask, __index, __addr, 2); } __m256d test_mm256_permutex_pd(__m256d __X) { - // CHECK-LABEL: @test_mm256_permutex_pd + // CHECK-LABEL: test_mm256_permutex_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <4 x i32> <i32 3, i32 0, i32 0, i32 0> return _mm256_permutex_pd(__X, 3); } __m256d test_mm256_mask_permutex_pd(__m256d __W, __mmask8 __U, __m256d __X) { - // CHECK-LABEL: @test_mm256_mask_permutex_pd + // CHECK-LABEL: test_mm256_mask_permutex_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <4 x i32> <i32 1, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_permutex_pd(__W, __U, __X, 1); } __m256d test_mm256_maskz_permutex_pd(__mmask8 __U, __m256d __X) { - // CHECK-LABEL: @test_mm256_maskz_permutex_pd + // CHECK-LABEL: test_mm256_maskz_permutex_pd // CHECK: shufflevector <4 x double> %{{.*}}, <4 x double> poison, <4 x i32> <i32 1, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_permutex_pd(__U, __X, 1); } __m256i test_mm256_permutex_epi64(__m256i __X) { - // CHECK-LABEL: @test_mm256_permutex_epi64 + // CHECK-LABEL: test_mm256_permutex_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <4 x i32> <i32 3, i32 0, i32 0, i32 0> return _mm256_permutex_epi64(__X, 3); } __m256i test_mm256_mask_permutex_epi64(__m256i __W, __mmask8 __M, __m256i __X) { - // CHECK-LABEL: @test_mm256_mask_permutex_epi64 + // CHECK-LABEL: test_mm256_mask_permutex_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <4 x i32> <i32 3, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_permutex_epi64(__W, __M, __X, 3); } __m256i test_mm256_maskz_permutex_epi64(__mmask8 __M, __m256i __X) { - // CHECK-LABEL: @test_mm256_maskz_permutex_epi64 + // CHECK-LABEL: test_mm256_maskz_permutex_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> poison, <4 x i32> <i32 3, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_permutex_epi64(__M, __X, 3); } __m256d test_mm256_permutexvar_pd(__m256i __X, __m256d __Y) { - // CHECK-LABEL: @test_mm256_permutexvar_pd + // CHECK-LABEL: test_mm256_permutexvar_pd // CHECK: @llvm.x86.avx512.permvar.df.256 return _mm256_permutexvar_pd(__X, __Y); } __m256d test_mm256_mask_permutexvar_pd(__m256d __W, __mmask8 __U, __m256i __X, __m256d __Y) { - // CHECK-LABEL: @test_mm256_mask_permutexvar_pd + // CHECK-LABEL: test_mm256_mask_permutexvar_pd // CHECK: @llvm.x86.avx512.permvar.df.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_permutexvar_pd(__W, __U, __X, __Y); } __m256d test_mm256_maskz_permutexvar_pd(__mmask8 __U, __m256i __X, __m256d __Y) { - // CHECK-LABEL: @test_mm256_maskz_permutexvar_pd + // CHECK-LABEL: test_mm256_maskz_permutexvar_pd // CHECK: @llvm.x86.avx512.permvar.df.256 // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_permutexvar_pd(__U, __X, __Y); } __m256i test_mm256_maskz_permutexvar_epi64(__mmask8 __M, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_permutexvar_epi64 + // CHECK-LABEL: test_mm256_maskz_permutexvar_epi64 // CHECK: @llvm.x86.avx512.permvar.di.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_permutexvar_epi64(__M, __X, __Y); } __m256i test_mm256_mask_permutexvar_epi64(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_permutexvar_epi64 + // CHECK-LABEL: test_mm256_mask_permutexvar_epi64 // CHECK: @llvm.x86.avx512.permvar.di.256 // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_permutexvar_epi64(__W, __M, __X, __Y); } __m256 test_mm256_mask_permutexvar_ps(__m256 __W, __mmask8 __U, __m256i __X, __m256 __Y) { - // CHECK-LABEL: @test_mm256_mask_permutexvar_ps + // CHECK-LABEL: test_mm256_mask_permutexvar_ps // CHECK: @llvm.x86.avx2.permps // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_permutexvar_ps(__W, __U, __X, __Y); } __m256 test_mm256_maskz_permutexvar_ps(__mmask8 __U, __m256i __X, __m256 __Y) { - // CHECK-LABEL: @test_mm256_maskz_permutexvar_ps + // CHECK-LABEL: test_mm256_maskz_permutexvar_ps // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_permutexvar_ps(__U, __X, __Y); } __m256 test_mm256_permutexvar_ps(__m256i __X, __m256 __Y) { - // CHECK-LABEL: @test_mm256_permutexvar_ps + // CHECK-LABEL: test_mm256_permutexvar_ps // CHECK: @llvm.x86.avx2.permps return _mm256_permutexvar_ps( __X, __Y); } __m256i test_mm256_maskz_permutexvar_epi32(__mmask8 __M, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_maskz_permutexvar_epi32 + // CHECK-LABEL: test_mm256_maskz_permutexvar_epi32 // CHECK: @llvm.x86.avx2.permd // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_permutexvar_epi32(__M, __X, __Y); } __m256i test_mm256_permutexvar_epi32(__m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_permutexvar_epi32 + // CHECK-LABEL: test_mm256_permutexvar_epi32 // CHECK: @llvm.x86.avx2.permd return _mm256_permutexvar_epi32(__X, __Y); } __m256i test_mm256_mask_permutexvar_epi32(__m256i __W, __mmask8 __M, __m256i __X, __m256i __Y) { - // CHECK-LABEL: @test_mm256_mask_permutexvar_epi32 + // CHECK-LABEL: test_mm256_mask_permutexvar_epi32 // CHECK: @llvm.x86.avx2.permd // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_permutexvar_epi32(__W, __M, __X, __Y); } __m128i test_mm_alignr_epi32(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_alignr_epi32 + // CHECK-LABEL: test_mm_alignr_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> return _mm_alignr_epi32(__A, __B, 1); } __m128i test_mm_mask_alignr_epi32(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_alignr_epi32 + // CHECK-LABEL: test_mm_mask_alignr_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_alignr_epi32(__W, __U, __A, __B, 5); } __m128i test_mm_maskz_alignr_epi32(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_alignr_epi32 + // CHECK-LABEL: test_mm_maskz_alignr_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_alignr_epi32(__U, __A, __B, 1); } __m256i test_mm256_alignr_epi32(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_alignr_epi32 + // CHECK-LABEL: test_mm256_alignr_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8> return _mm256_alignr_epi32(__A, __B, 1); } __m256i test_mm256_mask_alignr_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_alignr_epi32 + // CHECK-LABEL: test_mm256_mask_alignr_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_alignr_epi32(__W, __U, __A, __B, 9); } __m256i test_mm256_maskz_alignr_epi32(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_alignr_epi32 + // CHECK-LABEL: test_mm256_maskz_alignr_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> <i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7, i32 8> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_alignr_epi32(__U, __A, __B, 1); } __m128i test_mm_alignr_epi64(__m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_alignr_epi64 + // CHECK-LABEL: test_mm_alignr_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 2> return _mm_alignr_epi64(__A, __B, 1); } __m128i test_mm_mask_alignr_epi64(__m128i __W, __mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_mask_alignr_epi64 + // CHECK-LABEL: test_mm_mask_alignr_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_mask_alignr_epi64(__W, __U, __A, __B, 3); } __m128i test_mm_maskz_alignr_epi64(__mmask8 __U, __m128i __A, __m128i __B) { - // CHECK-LABEL: @test_mm_maskz_alignr_epi64 + // CHECK-LABEL: test_mm_maskz_alignr_epi64 // CHECK: shufflevector <2 x i64> %{{.*}}, <2 x i64> %{{.*}}, <2 x i32> <i32 1, i32 2> // CHECK: select <2 x i1> %{{.*}}, <2 x i64> %{{.*}}, <2 x i64> %{{.*}} return _mm_maskz_alignr_epi64(__U, __A, __B, 1); } __m256i test_mm256_alignr_epi64(__m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_alignr_epi64 + // CHECK-LABEL: test_mm256_alignr_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> return _mm256_alignr_epi64(__A, __B, 1); } __m256i test_mm256_mask_alignr_epi64(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_mask_alignr_epi64 + // CHECK-LABEL: test_mm256_mask_alignr_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_mask_alignr_epi64(__W, __U, __A, __B, 5); } __m256i test_mm256_maskz_alignr_epi64(__mmask8 __U, __m256i __A, __m256i __B) { - // CHECK-LABEL: @test_mm256_maskz_alignr_epi64 + // CHECK-LABEL: test_mm256_maskz_alignr_epi64 // CHECK: shufflevector <4 x i64> %{{.*}}, <4 x i64> %{{.*}}, <4 x i32> <i32 1, i32 2, i32 3, i32 4> // CHECK: select <4 x i1> %{{.*}}, <4 x i64> %{{.*}}, <4 x i64> %{{.*}} return _mm256_maskz_alignr_epi64(__U, __A, __B, 1); } __m128 test_mm_mask_movehdup_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_movehdup_ps + // CHECK-LABEL: test_mm_mask_movehdup_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 1, i32 3, i32 3> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_movehdup_ps(__W, __U, __A); } __m128 test_mm_maskz_movehdup_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_movehdup_ps + // CHECK-LABEL: test_mm_maskz_movehdup_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 1, i32 1, i32 3, i32 3> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_movehdup_ps(__U, __A); } __m256 test_mm256_mask_movehdup_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_movehdup_ps + // CHECK-LABEL: test_mm256_mask_movehdup_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> // CHECK: select <8 x i1> %{{.*}} <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_movehdup_ps(__W, __U, __A); } __m256 test_mm256_maskz_movehdup_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_movehdup_ps + // CHECK-LABEL: test_mm256_maskz_movehdup_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 1, i32 1, i32 3, i32 3, i32 5, i32 5, i32 7, i32 7> // CHECK: select <8 x i1> %{{.*}} <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_movehdup_ps(__U, __A); } __m128 test_mm_mask_moveldup_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_moveldup_ps + // CHECK-LABEL: test_mm_mask_moveldup_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 0, i32 2, i32 2> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_moveldup_ps(__W, __U, __A); } __m128 test_mm_maskz_moveldup_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_moveldup_ps + // CHECK-LABEL: test_mm_maskz_moveldup_ps // CHECK: shufflevector <4 x float> %{{.*}}, <4 x float> %{{.*}}, <4 x i32> <i32 0, i32 0, i32 2, i32 2> // CHECK: select <4 x i1> %{{.*}} <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_moveldup_ps(__U, __A); } __m256 test_mm256_mask_moveldup_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_moveldup_ps + // CHECK-LABEL: test_mm256_mask_moveldup_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> // CHECK: select <8 x i1> %{{.*}} <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_moveldup_ps(__W, __U, __A); } __m256 test_mm256_maskz_moveldup_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_moveldup_ps + // CHECK-LABEL: test_mm256_maskz_moveldup_ps // CHECK: shufflevector <8 x float> %{{.*}}, <8 x float> %{{.*}}, <8 x i32> <i32 0, i32 0, i32 2, i32 2, i32 4, i32 4, i32 6, i32 6> // CHECK: select <8 x i1> %{{.*}} <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_moveldup_ps(__U, __A); } __m128i test_mm_mask_shuffle_epi32(__m128i __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_shuffle_epi32 + // CHECK-LABEL: test_mm_mask_shuffle_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> poison, <4 x i32> <i32 1, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_mask_shuffle_epi32(__W, __U, __A, 1); } __m128i test_mm_maskz_shuffle_epi32(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_shuffle_epi32 + // CHECK-LABEL: test_mm_maskz_shuffle_epi32 // CHECK: shufflevector <4 x i32> %{{.*}}, <4 x i32> poison, <4 x i32> <i32 2, i32 0, i32 0, i32 0> // CHECK: select <4 x i1> %{{.*}}, <4 x i32> %{{.*}}, <4 x i32> %{{.*}} return _mm_maskz_shuffle_epi32(__U, __A, 2); } __m256i test_mm256_mask_shuffle_epi32(__m256i __W, __mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_mask_shuffle_epi32 + // CHECK-LABEL: test_mm256_mask_shuffle_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> poison, <8 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_mask_shuffle_epi32(__W, __U, __A, 2); } __m256i test_mm256_maskz_shuffle_epi32(__mmask8 __U, __m256i __A) { - // CHECK-LABEL: @test_mm256_maskz_shuffle_epi32 + // CHECK-LABEL: test_mm256_maskz_shuffle_epi32 // CHECK: shufflevector <8 x i32> %{{.*}}, <8 x i32> poison, <8 x i32> <i32 2, i32 0, i32 0, i32 0, i32 6, i32 4, i32 4, i32 4> // CHECK: select <8 x i1> %{{.*}}, <8 x i32> %{{.*}}, <8 x i32> %{{.*}} return _mm256_maskz_shuffle_epi32(__U, __A, 2); } __m128d test_mm_mask_mov_pd(__m128d __W, __mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_mask_mov_pd + // CHECK-LABEL: test_mm_mask_mov_pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_mask_mov_pd(__W, __U, __A); } __m128d test_mm_maskz_mov_pd(__mmask8 __U, __m128d __A) { - // CHECK-LABEL: @test_mm_maskz_mov_pd + // CHECK-LABEL: test_mm_maskz_mov_pd // CHECK: select <2 x i1> %{{.*}}, <2 x double> %{{.*}}, <2 x double> %{{.*}} return _mm_maskz_mov_pd(__U, __A); } __m256d test_mm256_mask_mov_pd(__m256d __W, __mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_mask_mov_pd + // CHECK-LABEL: test_mm256_mask_mov_pd // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_mask_mov_pd(__W, __U, __A); } __m256d test_mm256_maskz_mov_pd(__mmask8 __U, __m256d __A) { - // CHECK-LABEL: @test_mm256_maskz_mov_pd + // CHECK-LABEL: test_mm256_maskz_mov_pd // CHECK: select <4 x i1> %{{.*}}, <4 x double> %{{.*}}, <4 x double> %{{.*}} return _mm256_maskz_mov_pd(__U, __A); } __m128 test_mm_mask_mov_ps(__m128 __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_mov_ps + // CHECK-LABEL: test_mm_mask_mov_ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_mask_mov_ps(__W, __U, __A); } __m128 test_mm_maskz_mov_ps(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_mov_ps + // CHECK-LABEL: test_mm_maskz_mov_ps // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} return _mm_maskz_mov_ps(__U, __A); } __m256 test_mm256_mask_mov_ps(__m256 __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_mov_ps + // CHECK-LABEL: test_mm256_mask_mov_ps // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_mov_ps(__W, __U, __A); } __m256 test_mm256_maskz_mov_ps(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_mov_ps + // CHECK-LABEL: test_mm256_maskz_mov_ps // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_mov_ps(__U, __A); } __m128 test_mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_mask_cvtph_ps + // CHECK-LABEL: test_mm_mask_cvtph_ps // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: fpext <4 x half> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -9565,7 +9566,7 @@ __m128 test_mm_mask_cvtph_ps(__m128 __W, __mmask8 __U, __m128i __A) { } __m128 test_mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm_maskz_cvtph_ps + // CHECK-LABEL: test_mm_maskz_cvtph_ps // CHECK: shufflevector <8 x i16> %{{.*}}, <8 x i16> poison, <4 x i32> <i32 0, i32 1, i32 2, i32 3> // CHECK: fpext <4 x half> %{{.*}} to <4 x float> // CHECK: select <4 x i1> %{{.*}}, <4 x float> %{{.*}}, <4 x float> %{{.*}} @@ -9573,167 +9574,167 @@ __m128 test_mm_maskz_cvtph_ps(__mmask8 __U, __m128i __A) { } __m256 test_mm256_mask_cvtph_ps(__m256 __W, __mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_mask_cvtph_ps + // CHECK-LABEL: test_mm256_mask_cvtph_ps // CHECK: fpext <8 x half> %{{.*}} to <8 x float> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_mask_cvtph_ps(__W, __U, __A); } __m256 test_mm256_maskz_cvtph_ps(__mmask8 __U, __m128i __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtph_ps + // CHECK-LABEL: test_mm256_maskz_cvtph_ps // CHECK: fpext <8 x half> %{{.*}} to <8 x float> // CHECK: select <8 x i1> %{{.*}}, <8 x float> %{{.*}}, <8 x float> %{{.*}} return _mm256_maskz_cvtph_ps(__U, __A); } __m128i test_mm_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvtps_ph + // CHECK-LABEL: test_mm_mask_cvtps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 return _mm_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m128i test_mm_maskz_cvtps_ph(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvtps_ph + // CHECK-LABEL: test_mm_maskz_cvtps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 return _mm_maskz_cvtps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m128i test_mm256_mask_cvtps_ph(__m128i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvtps_ph + // CHECK-LABEL: test_mm256_mask_cvtps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 return _mm256_mask_cvtps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m128i test_mm256_maskz_cvtps_ph(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvtps_ph + // CHECK-LABEL: test_mm256_maskz_cvtps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 return _mm256_maskz_cvtps_ph(__U, __A, _MM_FROUND_TO_ZERO | _MM_FROUND_NO_EXC); } __m128i test_mm_mask_cvt_roundps_ph(__m128i __W, __mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_mask_cvt_roundps_ph + // CHECK-LABEL: test_mm_mask_cvt_roundps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 return _mm_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO); } __m128i test_mm_maskz_cvt_roundps_ph(__mmask8 __U, __m128 __A) { - // CHECK-LABEL: @test_mm_maskz_cvt_roundps_ph + // CHECK-LABEL: test_mm_maskz_cvt_roundps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.128 return _mm_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO); } __m128i test_mm256_mask_cvt_roundps_ph(__m128i __W, __mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_mask_cvt_roundps_ph + // CHECK-LABEL: test_mm256_mask_cvt_roundps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 return _mm256_mask_cvt_roundps_ph(__W, __U, __A, _MM_FROUND_TO_ZERO); } __m128i test_mm256_maskz_cvt_roundps_ph(__mmask8 __U, __m256 __A) { - // CHECK-LABEL: @test_mm256_maskz_cvt_roundps_ph + // CHECK-LABEL: test_mm256_maskz_cvt_roundps_ph // CHECK: @llvm.x86.avx512.mask.vcvtps2ph.256 return _mm256_maskz_cvt_roundps_ph(__U, __A, _MM_FROUND_TO_ZERO); } __mmask8 test_mm_cmpeq_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpeq_epi32_mask + // CHECK-LABEL: test_mm_cmpeq_epi32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpeq_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmpeq_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpeq_epi32_mask + // CHECK-LABEL: test_mm_mask_cmpeq_epi32_mask // CHECK: icmp eq <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpeq_epi32_mask(__u, __a, __b); } __mmask8 test_mm_mask_cmpeq_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpeq_epi64_mask + // CHECK-LABEL: test_mm_mask_cmpeq_epi64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpeq_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmpeq_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpeq_epi64_mask + // CHECK-LABEL: test_mm_cmpeq_epi64_mask // CHECK: icmp eq <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpeq_epi64_mask(__a, __b); } __mmask8 test_mm_cmpgt_epi32_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpgt_epi32_mask + // CHECK-LABEL: test_mm_cmpgt_epi32_mask // CHECK: icmp sgt <4 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpgt_epi32_mask(__a, __b); } __mmask8 test_mm_mask_cmpgt_epi32_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpgt_epi32_mask + // CHECK-LABEL: test_mm_mask_cmpgt_epi32_mask // CHECK: icmp sgt <4 x i32> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpgt_epi32_mask(__u, __a, __b); } __mmask8 test_mm_mask_cmpgt_epi64_mask(__mmask8 __u, __m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_mask_cmpgt_epi64_mask + // CHECK-LABEL: test_mm_mask_cmpgt_epi64_mask // CHECK: icmp sgt <2 x i64> %{{.*}}, %{{.*}} // CHECK: and <2 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm_mask_cmpgt_epi64_mask(__u, __a, __b); } __mmask8 test_mm_cmpgt_epi64_mask(__m128i __a, __m128i __b) { - // CHECK-LABEL: @test_mm_cmpgt_epi64_mask + // CHECK-LABEL: test_mm_cmpgt_epi64_mask // CHECK: icmp sgt <2 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm_cmpgt_epi64_mask(__a, __b); } __mmask8 test_mm256_cmpeq_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpeq_epi32_mask + // CHECK-LABEL: test_mm256_cmpeq_epi32_mask // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpeq_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpeq_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpeq_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmpeq_epi32_mask // CHECK: icmp eq <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpeq_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_mask_cmpeq_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpeq_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmpeq_epi64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpeq_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpeq_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpeq_epi64_mask + // CHECK-LABEL: test_mm256_cmpeq_epi64_mask // CHECK: icmp eq <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpeq_epi64_mask(__a, __b); } __mmask8 test_mm256_cmpgt_epi32_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpgt_epi32_mask + // CHECK-LABEL: test_mm256_cmpgt_epi32_mask // CHECK: icmp sgt <8 x i32> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpgt_epi32_mask(__a, __b); } __mmask8 test_mm256_mask_cmpgt_epi32_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpgt_epi32_mask + // CHECK-LABEL: test_mm256_mask_cmpgt_epi32_mask // CHECK: icmp sgt <8 x i32> %{{.*}}, %{{.*}} // CHECK: and <8 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpgt_epi32_mask(__u, __a, __b); } __mmask8 test_mm256_mask_cmpgt_epi64_mask(__mmask8 __u, __m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_mask_cmpgt_epi64_mask + // CHECK-LABEL: test_mm256_mask_cmpgt_epi64_mask // CHECK: icmp sgt <4 x i64> %{{.*}}, %{{.*}} // CHECK: and <4 x i1> %{{.*}}, %{{.*}} return (__mmask8)_mm256_mask_cmpgt_epi64_mask(__u, __a, __b); } __mmask8 test_mm256_cmpgt_epi64_mask(__m256i __a, __m256i __b) { - // CHECK-LABEL: @test_mm256_cmpgt_epi64_mask + // CHECK-LABEL: test_mm256_cmpgt_epi64_mask // CHECK: icmp sgt <4 x i64> %{{.*}}, %{{.*}} return (__mmask8)_mm256_cmpgt_epi64_mask(__a, __b); } diff --git a/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c b/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c index 767123d..b53410a 100644 --- a/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c +++ b/clang/test/CodeGen/X86/avx512vlbitalg-builtins.c @@ -4,12 +4,14 @@ // RUN: %clang_cc1 -x c++ -flax-vector-conversions=none -ffreestanding %s -triple=i386-apple-darwin -target-feature +avx512bitalg -target-feature +avx512vl -emit-llvm -o - -Wall -Werror | FileCheck %s #include <immintrin.h> +#include "builtin_test_helpers.h" __m256i test_mm256_popcnt_epi16(__m256i __A) { // CHECK-LABEL: test_mm256_popcnt_epi16 // CHECK: @llvm.ctpop.v16i16 return _mm256_popcnt_epi16(__A); } +TEST_CONSTEXPR(match_v16hi(_mm256_popcnt_epi16((__m256i)(__v16hi){+5, -3, -10, +8, 0, -256, +256, -128, +3, +9, +15, +33, +63, +129, +511, +1025}), 2, 15, 14, 1, 0, 8, 1, 9, 2, 2, 4, 2, 6, 2, 9, 2)); __m256i test_mm256_mask_popcnt_epi16(__m256i __A, __mmask16 __U, __m256i __B) { // CHECK-LABEL: test_mm256_mask_popcnt_epi16 @@ -29,6 +31,7 @@ __m128i test_mm_popcnt_epi16(__m128i __A) { // CHECK: @llvm.ctpop.v8i16 return _mm_popcnt_epi16(__A); } +TEST_CONSTEXPR(match_v8hi(_mm_popcnt_epi16((__m128i)(__v8hi){+5, -3, -10, +8, 0, -256, +256, -128}), 2, 15, 14, 1, 0, 8, 1, 9)); __m128i test_mm_mask_popcnt_epi16(__m128i __A, __mmask8 __U, __m128i __B) { // CHECK-LABEL: test_mm_mask_popcnt_epi16 @@ -48,6 +51,7 @@ __m256i test_mm256_popcnt_epi8(__m256i __A) { // CHECK: @llvm.ctpop.v32i8 return _mm256_popcnt_epi8(__A); } +TEST_CONSTEXPR(match_v32qi(_mm256_popcnt_epi8((__m256i)(__v32qi){+5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73, +5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73}), 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3, 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3)); __m256i test_mm256_mask_popcnt_epi8(__m256i __A, __mmask32 __U, __m256i __B) { // CHECK-LABEL: test_mm256_mask_popcnt_epi8 @@ -67,6 +71,7 @@ __m128i test_mm_popcnt_epi8(__m128i __A) { // CHECK: @llvm.ctpop.v16i8 return _mm_popcnt_epi8(__A); } +TEST_CONSTEXPR(match_v16qi(_mm_popcnt_epi8((__m128i)(__v16qi){+5, -3, -10, +8, 0, -16, +16, -16, +3, +9, +15, +33, +63, +33, +53, +73}), 2, 7, 6, 1, 0, 4, 1, 4, 2, 2, 4, 2, 6, 2, 4, 3)); __m128i test_mm_mask_popcnt_epi8(__m128i __A, __mmask16 __U, __m128i __B) { // CHECK-LABEL: test_mm_mask_popcnt_epi8 diff --git a/clang/test/CodeGen/X86/builtin_test_helpers.h b/clang/test/CodeGen/X86/builtin_test_helpers.h index f719694..5d4ee7d 100644 --- a/clang/test/CodeGen/X86/builtin_test_helpers.h +++ b/clang/test/CodeGen/X86/builtin_test_helpers.h @@ -122,6 +122,36 @@ constexpr bool match_v16si(__m512i _v, int a, int b, int c, int d, int e, int f, return v[0] == a && v[1] == b && v[2] == c && v[3] == d && v[4] == e && v[5] == f && v[6] == g && v[7] == h && v[8] == i && v[9] == j && v[10] == k && v[11] == l && v[12] == m && v[13] == n && v[14] == o && v[15] == p;
}
+constexpr bool match_v32hi(__m512i _v, short __e00, short __e01, short __e02, short __e03, short __e04, short __e05, short __e06, short __e07,
+ short __e08, short __e09, short __e10, short __e11, short __e12, short __e13, short __e14, short __e15,
+ short __e16, short __e17, short __e18, short __e19, short __e20, short __e21, short __e22, short __e23,
+ short __e24, short __e25, short __e26, short __e27, short __e28, short __e29, short __e30, short __e31) {
+ __v32hi v = (__v32hi)_v;
+ return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07 &&
+ v[ 8] == __e08 && v[ 9] == __e09 && v[10] == __e10 && v[11] == __e11 && v[12] == __e12 && v[13] == __e13 && v[14] == __e14 && v[15] == __e15 &&
+ v[16] == __e16 && v[17] == __e17 && v[18] == __e18 && v[19] == __e19 && v[20] == __e20 && v[21] == __e21 && v[22] == __e22 && v[23] == __e23 &&
+ v[24] == __e24 && v[25] == __e25 && v[26] == __e26 && v[27] == __e27 && v[28] == __e28 && v[29] == __e29 && v[30] == __e30 && v[31] == __e31;
+}
+
+constexpr bool match_v64qi(__m512i _v, char __e00, char __e01, char __e02, char __e03, char __e04, char __e05, char __e06, char __e07,
+ char __e08, char __e09, char __e10, char __e11, char __e12, char __e13, char __e14, char __e15,
+ char __e16, char __e17, char __e18, char __e19, char __e20, char __e21, char __e22, char __e23,
+ char __e24, char __e25, char __e26, char __e27, char __e28, char __e29, char __e30, char __e31,
+ char __e32, char __e33, char __e34, char __e35, char __e36, char __e37, char __e38, char __e39,
+ char __e40, char __e41, char __e42, char __e43, char __e44, char __e45, char __e46, char __e47,
+ char __e48, char __e49, char __e50, char __e51, char __e52, char __e53, char __e54, char __e55,
+ char __e56, char __e57, char __e58, char __e59, char __e60, char __e61, char __e62, char __e63) {
+ __v64qi v = (__v64qi)_v;
+ return v[ 0] == __e00 && v[ 1] == __e01 && v[ 2] == __e02 && v[ 3] == __e03 && v[ 4] == __e04 && v[ 5] == __e05 && v[ 6] == __e06 && v[ 7] == __e07 &&
+ v[ 8] == __e08 && v[ 9] == __e09 && v[10] == __e10 && v[11] == __e11 && v[12] == __e12 && v[13] == __e13 && v[14] == __e14 && v[15] == __e15 &&
+ v[16] == __e16 && v[17] == __e17 && v[18] == __e18 && v[19] == __e19 && v[20] == __e20 && v[21] == __e21 && v[22] == __e22 && v[23] == __e23 &&
+ v[24] == __e24 && v[25] == __e25 && v[26] == __e26 && v[27] == __e27 && v[28] == __e28 && v[29] == __e29 && v[30] == __e30 && v[31] == __e31 &&
+ v[32] == __e32 && v[33] == __e33 && v[34] == __e34 && v[35] == __e35 && v[36] == __e36 && v[37] == __e37 && v[38] == __e38 && v[39] == __e39 &&
+ v[40] == __e40 && v[41] == __e41 && v[42] == __e42 && v[43] == __e43 && v[44] == __e44 && v[45] == __e45 && v[46] == __e46 && v[47] == __e47 &&
+ v[48] == __e48 && v[49] == __e49 && v[50] == __e50 && v[51] == __e51 && v[52] == __e52 && v[53] == __e53 && v[54] == __e54 && v[55] == __e55 &&
+ v[56] == __e56 && v[57] == __e57 && v[58] == __e58 && v[59] == __e59 && v[60] == __e60 && v[61] == __e61 && v[62] == __e62 && v[63] == __e63;
+}
+
#define TEST_CONSTEXPR(...) static_assert(__VA_ARGS__)
#else
diff --git a/clang/test/CodeGen/X86/mmx-builtins.c b/clang/test/CodeGen/X86/mmx-builtins.c index 30e2cfe..6f20986 100644 --- a/clang/test/CodeGen/X86/mmx-builtins.c +++ b/clang/test/CodeGen/X86/mmx-builtins.c @@ -365,12 +365,14 @@ __m64 test_mm_mulhi_pi16(__m64 a, __m64 b) { // CHECK: call <8 x i16> @llvm.x86.sse2.pmulh.w( return _mm_mulhi_pi16(a, b); } +TEST_CONSTEXPR(match_v4hi(_mm_mulhi_pi16((__m64)(__v4hi){+1, -2, +3, -4}, (__m64)(__v4hi){-10, +8, +6, -4}), -1, -1, 0, 0)); __m64 test_mm_mulhi_pu16(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_mulhi_pu16 // CHECK: call <8 x i16> @llvm.x86.sse2.pmulhu.w( return _mm_mulhi_pu16(a, b); } +TEST_CONSTEXPR(match_v4hi(_mm_mulhi_pu16((__m64)(__v4hi){+1, -2, +3, -4}, (__m64)(__v4hi){-10, +8, +6, -4}), 0, 7, 0, -8)); __m64 test_mm_mulhrs_pi16(__m64 a, __m64 b) { // CHECK-LABEL: test_mm_mulhrs_pi16 diff --git a/clang/test/CodeGen/X86/sse2-builtins.c b/clang/test/CodeGen/X86/sse2-builtins.c index affb6e7..23013dd 100644 --- a/clang/test/CodeGen/X86/sse2-builtins.c +++ b/clang/test/CodeGen/X86/sse2-builtins.c @@ -940,18 +940,21 @@ __m128i test_mm_mulhi_epi16(__m128i A, __m128i B) { // CHECK: call <8 x i16> @llvm.x86.sse2.pmulh.w(<8 x i16> %{{.*}}, <8 x i16> %{{.*}}) return _mm_mulhi_epi16(A, B); } +TEST_CONSTEXPR(match_v8hi(_mm_mulhi_epi16((__m128i)(__v8hi){+1, -2, +3, -4, +5, -6, +7, -8}, (__m128i)(__v8hi){-16, -14, +12, +10, -8, +6, -4, +2}), -1, 0, 0, -1, -1, -1, -1, -1)); __m128i test_mm_mulhi_epu16(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_mulhi_epu16 // CHECK: call <8 x i16> @llvm.x86.sse2.pmulhu.w(<8 x i16> %{{.*}}, <8 x i16> %{{.*}}) return _mm_mulhi_epu16(A, B); } +TEST_CONSTEXPR(match_v8hi(_mm_mulhi_epu16((__m128i)(__v8hi){+1, -2, +3, -4, +5, -6, +7, -8}, (__m128i)(__v8hi){-16, -14, +12, +10, -8, +6, -4, +2}), 0, -16, 0, 9, 4, 5, 6, 1)); __m128i test_mm_mullo_epi16(__m128i A, __m128i B) { // CHECK-LABEL: test_mm_mullo_epi16 // CHECK: mul <8 x i16> %{{.*}}, %{{.*}} return _mm_mullo_epi16(A, B); } +TEST_CONSTEXPR(match_v8hi(_mm_mullo_epi16((__m128i)(__v8hi){+1, -2, +3, -4, +5, -6, +7, -8}, (__m128i)(__v8hi){-16, -14, +12, +10, -8, +6, -4, +2}), -16, 28, 36, -40, -40, -36, -28, -16)); __m128d test_mm_or_pd(__m128d A, __m128d B) { // CHECK-LABEL: test_mm_or_pd diff --git a/clang/test/CodeGen/attr-counted-by-for-pointers.c b/clang/test/CodeGen/attr-counted-by-for-pointers.c index e939e49..0d72b58 100644 --- a/clang/test/CodeGen/attr-counted-by-for-pointers.c +++ b/clang/test/CodeGen/attr-counted-by-for-pointers.c @@ -32,7 +32,7 @@ struct annotated_ptr { // SANITIZE-WITH-ATTR-NEXT: entry: // SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 // SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_GEP:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 16 -// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 4 +// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 8 // SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = zext i32 [[DOTCOUNTED_BY_LOAD]] to i64, !nosanitize [[META2:![0-9]+]] // SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = icmp ult i64 [[IDXPROM]], [[TMP0]], !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: br i1 [[TMP1]], label [[CONT10:%.*]], label [[HANDLER_OUT_OF_BOUNDS:%.*]], !prof [[PROF3:![0-9]+]], !nosanitize [[META2]] @@ -85,7 +85,7 @@ void test1(struct annotated_ptr *p, int index, struct foo *value) { // SANITIZE-WITH-ATTR-NEXT: entry: // SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 // SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_GEP:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 16 -// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 4 +// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 8 // SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = zext i32 [[DOTCOUNTED_BY_LOAD]] to i64, !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = icmp ult i64 [[IDXPROM]], [[TMP0]], !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: br i1 [[TMP1]], label [[CONT10:%.*]], label [[HANDLER_OUT_OF_BOUNDS:%.*]], !prof [[PROF3]], !nosanitize [[META2]] @@ -138,7 +138,7 @@ void test2(struct annotated_ptr *p, int index, struct foo *value) { // SANITIZE-WITH-ATTR-NEXT: entry: // SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 // SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_GEP:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 16 -// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 4 +// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 8 // SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = zext i32 [[DOTCOUNTED_BY_LOAD]] to i64, !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: [[DOTNOT:%.*]] = icmp ugt i64 [[IDXPROM]], [[TMP0]], !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: br i1 [[DOTNOT]], label [[HANDLER_OUT_OF_BOUNDS:%.*]], label [[CONT10:%.*]], !prof [[PROF15:![0-9]+]], !nosanitize [[META2]] @@ -311,7 +311,7 @@ size_t test6(struct annotated_ptr *p, int index) { // SANITIZE-WITH-ATTR-NEXT: entry: // SANITIZE-WITH-ATTR-NEXT: [[IDXPROM:%.*]] = sext i32 [[INDEX]] to i64 // SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_GEP:%.*]] = getelementptr inbounds nuw i8, ptr [[P]], i64 16 -// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 4 +// SANITIZE-WITH-ATTR-NEXT: [[DOTCOUNTED_BY_LOAD:%.*]] = load i32, ptr [[DOTCOUNTED_BY_GEP]], align 8 // SANITIZE-WITH-ATTR-NEXT: [[TMP0:%.*]] = zext i32 [[DOTCOUNTED_BY_LOAD]] to i64, !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: [[TMP1:%.*]] = icmp ult i64 [[IDXPROM]], [[TMP0]], !nosanitize [[META2]] // SANITIZE-WITH-ATTR-NEXT: br i1 [[TMP1]], label [[CONT10:%.*]], label [[HANDLER_OUT_OF_BOUNDS:%.*]], !prof [[PROF3]], !nosanitize [[META2]] diff --git a/clang/test/CodeGen/builtins-x86.c b/clang/test/CodeGen/builtins-x86.c index c42c321..31f3097 100644 --- a/clang/test/CodeGen/builtins-x86.c +++ b/clang/test/CodeGen/builtins-x86.c @@ -22,6 +22,7 @@ typedef float V2f __attribute__((vector_size(8))); // 128-bit typedef char V16c __attribute__((vector_size(16))); typedef signed short V8s __attribute__((vector_size(16))); +typedef unsigned short V8u __attribute__((vector_size(16))); typedef signed int V4i __attribute__((vector_size(16))); #ifndef OPENCL typedef signed long long V2LLi __attribute__((vector_size(16))); @@ -99,6 +100,7 @@ void f0(void) { // 128-bit V16c tmp_V16c; V8s tmp_V8s; + V8u tmp_V8u; V4i tmp_V4i; V2LLi tmp_V2LLi; V4f tmp_V4f; @@ -192,7 +194,7 @@ void f0(void) { tmp_V16c = __builtin_ia32_packsswb128(tmp_V8s, tmp_V8s); tmp_V8s = __builtin_ia32_packssdw128(tmp_V4i, tmp_V4i); tmp_V16c = __builtin_ia32_packuswb128(tmp_V8s, tmp_V8s); - tmp_V8s = __builtin_ia32_pmulhuw128(tmp_V8s, tmp_V8s); + tmp_V8u = __builtin_ia32_pmulhuw128(tmp_V8u, tmp_V8u); tmp_V4f = __builtin_ia32_addsubps(tmp_V4f, tmp_V4f); tmp_V2d = __builtin_ia32_addsubpd(tmp_V2d, tmp_V2d); tmp_V4f = __builtin_ia32_haddps(tmp_V4f, tmp_V4f); diff --git a/clang/test/CodeGen/debug-info-version.c b/clang/test/CodeGen/debug-info-version.c index c7c2bb9..485b80e 100644 --- a/clang/test/CodeGen/debug-info-version.c +++ b/clang/test/CodeGen/debug-info-version.c @@ -1,4 +1,4 @@ -// REQUIRES: !system-windows +// REQUIRES: !system-windows, !system-cygwin // RUN: %clang -g -S -emit-llvm -o - %s | FileCheck %s // RUN: %clang -S -emit-llvm -o - %s | FileCheck %s --check-prefix=NO_DEBUG int main (void) { diff --git a/clang/test/CodeGen/target-builtin-noerror.c b/clang/test/CodeGen/target-builtin-noerror.c index 0bbd8c3..5cf53b2 100644 --- a/clang/test/CodeGen/target-builtin-noerror.c +++ b/clang/test/CodeGen/target-builtin-noerror.c @@ -32,15 +32,15 @@ int qq(void) { // Test that fma and fma4 are both separately and combined valid for an fma intrinsic. __m128 __attribute__((target("fma"))) fma_1(__m128 a, __m128 b, __m128 c) { - return __builtin_ia32_vfmaddps(a, b, c); + return __builtin_ia32_vfmaddsubps(a, b, c); } __m128 __attribute__((target("fma4"))) fma_2(__m128 a, __m128 b, __m128 c) { - return __builtin_ia32_vfmaddps(a, b, c); + return __builtin_ia32_vfmaddsubps(a, b, c); } __m128 __attribute__((target("fma,fma4"))) fma_3(__m128 a, __m128 b, __m128 c) { - return __builtin_ia32_vfmaddps(a, b, c); + return __builtin_ia32_vfmaddsubps(a, b, c); } void verifyfeaturestrings(void) { diff --git a/clang/test/CodeGenCXX/modules-vtable.cppm b/clang/test/CodeGenCXX/modules-vtable.cppm index 6589b9f..75f7598 100644 --- a/clang/test/CodeGenCXX/modules-vtable.cppm +++ b/clang/test/CodeGenCXX/modules-vtable.cppm @@ -1,4 +1,4 @@ -// REQUIRES: !system-windows +// REQUIRES: !system-windows, !system-cygwin // RUN: rm -rf %t // RUN: split-file %s %t diff --git a/clang/test/CodeGenCXX/pr70585.cppm b/clang/test/CodeGenCXX/pr70585.cppm index ad4e135..d44a4f4 100644 --- a/clang/test/CodeGenCXX/pr70585.cppm +++ b/clang/test/CodeGenCXX/pr70585.cppm @@ -1,4 +1,4 @@ -// REQUIRES: !system-windows +// REQUIRES: !system-windows, !system-cygwin // RUN: rm -rf %t // RUN: split-file %s %t diff --git a/clang/test/CoverageMapping/logical.cpp b/clang/test/CoverageMapping/logical.cpp index 2a22d6c..caa773c 100644 --- a/clang/test/CoverageMapping/logical.cpp +++ b/clang/test/CoverageMapping/logical.cpp @@ -1,27 +1,31 @@ // RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -fprofile-instrument=clang -fcoverage-mapping -dump-coverage-mapping -emit-llvm-only -main-file-name logical.cpp %s | FileCheck %s // RUN: %clang_cc1 -mllvm -emptyline-comment-coverage=false -fcoverage-mcdc -fprofile-instrument=clang -fcoverage-mapping -dump-coverage-mapping -emit-llvm-only -main-file-name logical.cpp %s | FileCheck %s -check-prefix=MCDC -int main() { // CHECK: File 0, [[@LINE]]:12 -> [[@LINE+23]]:2 = #0 +int main() { // CHECK: File 0, [[@LINE]]:12 -> [[@LINE+27]]:2 = #0 bool bt = true; bool bf = false; // MCDC: Decision,File 0, [[@LINE+1]]:12 -> [[@LINE+1]]:20 = M:3, C:2 bool a = bt && bf; // CHECK-NEXT: File 0, [[@LINE]]:12 -> [[@LINE]]:14 = #0 // CHECK-NEXT: Branch,File 0, [[@LINE-1]]:12 -> [[@LINE-1]]:14 = #1, (#0 - #1) - // CHECK-NEXT: File 0, [[@LINE-2]]:18 -> [[@LINE-2]]:20 = #1 - // CHECK-NEXT: Branch,File 0, [[@LINE-3]]:18 -> [[@LINE-3]]:20 = #2, (#1 - #2) + // CHECK-NEXT: Gap,File 0, [[@LINE-2]]:14 -> [[@LINE-2]]:18 = #1 + // CHECK-NEXT: File 0, [[@LINE-3]]:18 -> [[@LINE-3]]:20 = #1 + // CHECK-NEXT: Branch,File 0, [[@LINE-4]]:18 -> [[@LINE-4]]:20 = #2, (#1 - #2) // MCDC: Decision,File 0, [[@LINE+1]]:7 -> [[@LINE+2]]:9 = M:6, C:2 a = bt && // CHECK-NEXT: File 0, [[@LINE]]:7 -> [[@LINE]]:9 = #0 bf; // CHECK-NEXT: Branch,File 0, [[@LINE-1]]:7 -> [[@LINE-1]]:9 = #3, (#0 - #3) - // CHECK-NEXT: File 0, [[@LINE-1]]:7 -> [[@LINE-1]]:9 = #3 - // CHECK-NEXT: Branch,File 0, [[@LINE-2]]:7 -> [[@LINE-2]]:9 = #4, (#3 - #4) + // CHECK-NEXT: Gap,File 0, [[@LINE-2]]:9 -> [[@LINE-1]]:7 = #3 + // CHECK-NEXT: File 0, [[@LINE-2]]:7 -> [[@LINE-2]]:9 = #3 + // CHECK-NEXT: Branch,File 0, [[@LINE-3]]:7 -> [[@LINE-3]]:9 = #4, (#3 - #4) // MCDC: Decision,File 0, [[@LINE+1]]:7 -> [[@LINE+1]]:15 = M:9, C:2 a = bf || bt; // CHECK-NEXT: File 0, [[@LINE]]:7 -> [[@LINE]]:9 = #0 // CHECK-NEXT: Branch,File 0, [[@LINE-1]]:7 -> [[@LINE-1]]:9 = (#0 - #5), #5 - // CHECK-NEXT: File 0, [[@LINE-2]]:13 -> [[@LINE-2]]:15 = #5 - // CHECK-NEXT: Branch,File 0, [[@LINE-3]]:13 -> [[@LINE-3]]:15 = (#5 - #6), #6 + // CHECK-NEXT: Gap,File 0, [[@LINE-2]]:9 -> [[@LINE-2]]:13 = #5 + // CHECK-NEXT: File 0, [[@LINE-3]]:13 -> [[@LINE-3]]:15 = #5 + // CHECK-NEXT: Branch,File 0, [[@LINE-4]]:13 -> [[@LINE-4]]:15 = (#5 - #6), #6 // MCDC: Decision,File 0, [[@LINE+1]]:7 -> [[@LINE+2]]:9 = M:12, C:2 a = bf || // CHECK-NEXT: File 0, [[@LINE]]:7 -> [[@LINE]]:9 = #0 bt; // CHECK-NEXT: Branch,File 0, [[@LINE-1]]:7 -> [[@LINE-1]]:9 = (#0 - #7), #7 - // CHECK-NEXT: File 0, [[@LINE-1]]:7 -> [[@LINE-1]]:9 = #7 - // CHECK-NEXT: Branch,File 0, [[@LINE-2]]:7 -> [[@LINE-2]]:9 = (#7 - #8), #8 + // CHECK-NEXT: Gap,File 0, [[@LINE-2]]:9 -> [[@LINE-1]]:7 = #7 + // CHECK-NEXT: File 0, [[@LINE-2]]:7 -> [[@LINE-2]]:9 = #7 + // CHECK-NEXT: Branch,File 0, [[@LINE-3]]:7 -> [[@LINE-3]]:9 = (#7 - #8), #8 return 0; } diff --git a/clang/test/DebugInfo/KeyInstructions/lit.local.cfg b/clang/test/DebugInfo/KeyInstructions/lit.local.cfg deleted file mode 100644 index 482bd5c..0000000 --- a/clang/test/DebugInfo/KeyInstructions/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not config.has_key_instructions: - config.unsupported = True diff --git a/clang/test/Driver/cuda-detect-path.cu b/clang/test/Driver/cuda-detect-path.cu index 8d249bd..ce42ed7 100644 --- a/clang/test/Driver/cuda-detect-path.cu +++ b/clang/test/Driver/cuda-detect-path.cu @@ -1,5 +1,5 @@ // This tests uses the PATH environment variable. -// REQUIRES: !system-windows +// REQUIRES: !system-windows, !system-cygwin // RUN: env PATH=%S/Inputs/CUDA/usr/local/cuda/bin \ // RUN: %clang -v --target=i386-unknown-linux --sysroot=%S/no-cuda-there \ diff --git a/clang/test/Driver/hipspv-toolchain.hip b/clang/test/Driver/hipspv-toolchain.hip index b2187ac..3c175eb 100644 --- a/clang/test/Driver/hipspv-toolchain.hip +++ b/clang/test/Driver/hipspv-toolchain.hip @@ -1,4 +1,4 @@ -// UNSUPPORTED: system-windows +// UNSUPPORTED: system-windows, system-cygwin // RUN: %clang -### -target x86_64-linux-gnu --offload=spirv64 \ // RUN: --no-offload-new-driver --hip-path=%S/Inputs/hipspv -nohipwrapperinc %s \ diff --git a/clang/test/Driver/ld-path.c b/clang/test/Driver/ld-path.c index bc10b9e..e00b63d 100644 --- a/clang/test/Driver/ld-path.c +++ b/clang/test/Driver/ld-path.c @@ -1,5 +1,5 @@ /// This tests uses the PATH environment variable. -// UNSUPPORTED: system-windows +// UNSUPPORTED: system-windows, system-cygwin // RUN: cd %S diff --git a/clang/test/Driver/program-path-priority.c b/clang/test/Driver/program-path-priority.c index c940c4c..b88c0f2 100644 --- a/clang/test/Driver/program-path-priority.c +++ b/clang/test/Driver/program-path-priority.c @@ -1,5 +1,5 @@ /// Don't create symlinks on Windows -// UNSUPPORTED: system-windows +// UNSUPPORTED: system-windows, system-cygwin /// Check the priority used when searching for tools /// Names and locations are usually in this order: diff --git a/clang/test/Driver/spirv-toolchain.cl b/clang/test/Driver/spirv-toolchain.cl index 53e8455..54c794c 100644 --- a/clang/test/Driver/spirv-toolchain.cl +++ b/clang/test/Driver/spirv-toolchain.cl @@ -92,7 +92,7 @@ // RUN: mkdir -p %t/versioned // RUN: touch %t/versioned/spirv-as-%llvm-version-major \ // RUN: && chmod +x %t/versioned/spirv-as-%llvm-version-major -// RUN: %if !system-windows %{ env "PATH=%t/versioned" %clang -### --target=spirv64 -x cl -c --save-temps %s 2>&1 \ +// RUN: %if !system-windows && !system-cygwin %{ env "PATH=%t/versioned" %clang -### --target=spirv64 -x cl -c --save-temps %s 2>&1 \ // RUN: | FileCheck -DVERSION=%llvm-version-major --check-prefix=VERSIONED %s %} // VERSIONED: {{.*}}spirv-as-[[VERSION]] diff --git a/clang/test/Interpreter/simple-exception.cpp b/clang/test/Interpreter/simple-exception.cpp index 651e8d9..8f7b515 100644 --- a/clang/test/Interpreter/simple-exception.cpp +++ b/clang/test/Interpreter/simple-exception.cpp @@ -1,7 +1,7 @@ // clang-format off // UNSUPPORTED: system-aix // XFAIL for arm, or running on Windows. -// XFAIL: target=arm-{{.*}}, target=armv{{.*}}, system-windows +// XFAIL: target=arm-{{.*}}, target=armv{{.*}}, system-windows, system-cygwin // RUN: cat %s | clang-repl | FileCheck %s // Incompatible with msan. It passes with -O3 but fail -Oz. Interpreter diff --git a/clang/test/Lexer/cross-windows-on-linux.cpp b/clang/test/Lexer/cross-windows-on-linux.cpp index 3932ffc..ece16b1 100644 --- a/clang/test/Lexer/cross-windows-on-linux.cpp +++ b/clang/test/Lexer/cross-windows-on-linux.cpp @@ -10,4 +10,4 @@ // on non-Windows unless -fms-extensions is passed. It won't fail in this way on // Windows because the filesystem will interpret the backslash as a directory // separator. -// UNSUPPORTED: system-windows +// UNSUPPORTED: system-windows, system-cygwin diff --git a/clang/test/Lexer/has_feature_cfi.c b/clang/test/Lexer/has_feature_cfi.c new file mode 100644 index 0000000..a4e5803 --- /dev/null +++ b/clang/test/Lexer/has_feature_cfi.c @@ -0,0 +1,87 @@ +// REQUIRES: target={{x86_64.*-linux.*}} + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi -c %s -o - | FileCheck %s --check-prefix=CHECK-CFI +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi -fsanitize-cfi-cross-dso -c %s -o - | FileCheck %s --check-prefix=CHECK-CFI +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi -fno-sanitize=cfi-nvcall,cfi-vcall,cfi-mfcall,cfi-icall -c %s -o - | FileCheck %s --check-prefix=CHECK-CFI +// CHECK-CFI: CFISanitizerEnabled + +// RUN: %clang -E -c %s -o - | FileCheck %s --check-prefix=CHECK-NO-CFI +// CHECK-NO-CFI: CFISanitizerDisabled + +// RUN: %clang -E -fsanitize=kcfi -c %s -o - | FileCheck %s --check-prefixes=CHECK-KCFI,CHECK-NO-CFI +// CHECK-KCFI: KCFISanitizerEnabled + +// RUN: %clang -E -fsanitize=cfi-cast-strict -c %s -o - | FileCheck %s --check-prefix=CHECK-CFI-CAST-STRICT +// CHECK-CFI-CAST-STRICT: CFICastStrictSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-derived-cast -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-DERIVED-CAST +// CHECK-CFI-DERIVED-CAST: CFIDerivedCastSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-icall -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-ICALL +// CHECK-CFI-ICALL: CFIICallSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-mfcall -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-MFCALL +// CHECK-CFI-MFCALL: CFIMFCallSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-unrelated-cast -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-UNRELATED-CAST +// CHECK-CFI-UNRELATED-CAST: CFIUnrelatedCastSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-nvcall -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-NVCALL +// CHECK-CFI-NVCALL: CFINVCallSanitizerEnabled + +// RUN: %clang -E -fvisibility=hidden -flto -fno-sanitize-ignorelist -fsanitize=cfi-vcall -c %s -o - | FileCheck %s --check-prefixes=CHECK-CFI,CHECK-CFI-VCALL +// CHECK-CFI-VCALL: CFIVCallSanitizerEnabled + +#if __has_feature(cfi_sanitizer) +int CFISanitizerEnabled(); +#else +int CFISanitizerDisabled(); +#endif + +#if __has_feature(kcfi) +int KCFISanitizerEnabled(); +#else +int KCFISanitizerDisabled(); +#endif + +#if __has_feature(cfi_cast_strict_sanitizer) +int CFICastStrictSanitizerEnabled(); +#else +int CFICastStrictSanitizerDisabled(); +#endif + +#if __has_feature(cfi_derived_cast_sanitizer) +int CFIDerivedCastSanitizerEnabled(); +#else +int CFIDerivedCastSanitizerDisabled(); +#endif + +#if __has_feature(cfi_icall_sanitizer) +int CFIICallSanitizerEnabled(); +#else +int CFIICallSanitizerDisabled(); +#endif + +#if __has_feature(cfi_mfcall_sanitizer) +int CFIMFCallSanitizerEnabled(); +#else +int CFIMFCallSanitizerDisabled(); +#endif + +#if __has_feature(cfi_unrelated_cast_sanitizer) +int CFIUnrelatedCastSanitizerEnabled(); +#else +int CFIUnrelatedCastSanitizerDisabled(); +#endif + +#if __has_feature(cfi_nvcall_sanitizer) +int CFINVCallSanitizerEnabled(); +#else +int CFINVCallSanitizerDisabled(); +#endif + +#if __has_feature(cfi_vcall_sanitizer) +int CFIVCallSanitizerEnabled(); +#else +int CFIVCallSanitizerDisabled(); +#endif diff --git a/clang/test/Modules/pr97313.cppm b/clang/test/Modules/pr97313.cppm index 32c7112..99795d6 100644 --- a/clang/test/Modules/pr97313.cppm +++ b/clang/test/Modules/pr97313.cppm @@ -1,4 +1,4 @@ -// REQUIRES: !system-windows +// REQUIRES: !system-windows, !system-cygwin // // RUN: rm -rf %t // RUN: mkdir -p %t diff --git a/clang/test/OpenMP/bug57757.cpp b/clang/test/OpenMP/bug57757.cpp index eabf233..caf53a5b 100644 --- a/clang/test/OpenMP/bug57757.cpp +++ b/clang/test/OpenMP/bug57757.cpp @@ -46,7 +46,7 @@ void foo() { // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 52 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds nuw i8, ptr [[TMP1]], i64 48 // CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[TMP5]], align 8, !tbaa [[TBAA19:![0-9]+]], !noalias [[META13]] -// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP7]], align 4, !tbaa [[TBAA16]], !noalias [[META13]] +// CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[TMP7]], align 8, !tbaa [[TBAA16]], !noalias [[META13]] // CHECK-NEXT: [[TMP10:%.*]] = load float, ptr [[TMP6]], align 4, !tbaa [[TBAA20:![0-9]+]], !noalias [[META13]] // CHECK-NEXT: tail call void [[TMP8]](i32 noundef [[TMP9]], float noundef [[TMP10]]) #[[ATTR2:[0-9]+]], !noalias [[META13]] // CHECK-NEXT: br label [[DOTOMP_OUTLINED__EXIT]] diff --git a/clang/test/Preprocessor/file_test.c b/clang/test/Preprocessor/file_test.c index 945882d..1e7e1df 100644 --- a/clang/test/Preprocessor/file_test.c +++ b/clang/test/Preprocessor/file_test.c @@ -1,4 +1,4 @@ -// UNSUPPORTED: system-windows +// UNSUPPORTED: system-windows, system-cygwin // RUN: %clang -E -ffile-prefix-map=%p=/UNLIKELY_PATH/empty -c -o - %s | FileCheck %s // RUN: %clang -E -fmacro-prefix-map=%p=/UNLIKELY_PATH/empty -c -o - %s | FileCheck %s // RUN: %clang -E -fmacro-prefix-map=%p=/UNLIKELY_PATH=empty -c -o - %s | FileCheck %s -check-prefix CHECK-EVIL diff --git a/clang/test/Sema/aarch64-sve-intrinsics/acle_sve_compact.cpp b/clang/test/Sema/aarch64-sve-intrinsics/acle_sve_compact.cpp new file mode 100644 index 0000000..4de3f39 --- /dev/null +++ b/clang/test/Sema/aarch64-sve-intrinsics/acle_sve_compact.cpp @@ -0,0 +1,18 @@ +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sve \ +// RUN: -verify -verify-ignore-unexpected=error,note -emit-llvm -o - %s +// RUN: %clang_cc1 -triple aarch64-none-linux-gnu -target-feature +sme \ +// RUN: -verify -verify-ignore-unexpected=error,note -emit-llvm -o - %s +// REQUIRES: aarch64-registered-target +// expected-no-diagnostics + +#include <arm_sve.h> + +__attribute__((target("sme2p2"))) +void test_svcompact(svbool_t pg, svfloat32_t op) __arm_streaming{ + svcompact(pg, op); +} + +void test_svcompact_nofeature(svbool_t pg, svfloat32_t op) __arm_streaming{ + // expected-error@+1 {{'svcompact' needs target feature (sve)|(sme, sme2p2)}} + svcompact(pg, op); +}
\ No newline at end of file diff --git a/clang/test/SemaHIP/amdgcnspirv-implicit-alloc-function-calling-conv.hip b/clang/test/SemaHIP/amdgcnspirv-implicit-alloc-function-calling-conv.hip new file mode 100644 index 0000000..c3e7e1a --- /dev/null +++ b/clang/test/SemaHIP/amdgcnspirv-implicit-alloc-function-calling-conv.hip @@ -0,0 +1,32 @@ +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv32 -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64 -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64-amd-amdhsa -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv32 -aux-triple x86_64-unknown-linux-gnu -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64 -aux-triple x86_64-unknown-linux-gnu -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64-amd-amdhsa -aux-triple x86_64-unknown-linux-gnu -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv32 -aux-triple x86_64-pc-windows-msvc -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64 -aux-triple x86_64-pc-windows-msvc -verify +// RUN: %clang_cc1 %s -fcuda-is-device -std=c++17 -triple spirv64-amd-amdhsa -aux-triple x86_64-pc-windows-msvc -verify + +// expected-no-diagnostics + +namespace std +{ + enum class align_val_t : __SIZE_TYPE__ {}; + struct nothrow_t { explicit nothrow_t() = default; }; + extern nothrow_t const nothrow; +} + +void* __attribute__((cdecl)) operator new(__SIZE_TYPE__); +void* __attribute__((cdecl)) operator new[](__SIZE_TYPE__); +void* __attribute__((cdecl)) operator new(__SIZE_TYPE__, ::std::align_val_t); +void* __attribute__((cdecl)) operator new[](__SIZE_TYPE__, ::std::align_val_t); + +void __attribute__((cdecl)) operator delete(void*) noexcept; +void __attribute__((cdecl)) operator delete[](void*) noexcept; +void __attribute__((cdecl)) operator delete(void*, __SIZE_TYPE__) noexcept; +void __attribute__((cdecl)) operator delete[](void*, __SIZE_TYPE__) noexcept; +void __attribute__((cdecl)) operator delete(void*, ::std::align_val_t) noexcept; +void __attribute__((cdecl)) operator delete[](void*, ::std::align_val_t) noexcept; +void __attribute__((cdecl)) operator delete(void*, __SIZE_TYPE__, ::std::align_val_t) noexcept; +void __attribute__((cdecl)) operator delete[](void*, __SIZE_TYPE__, ::std::align_val_t) noexcept; diff --git a/clang/test/lit.site.cfg.py.in b/clang/test/lit.site.cfg.py.in index 176cf64..f50953a 100644 --- a/clang/test/lit.site.cfg.py.in +++ b/clang/test/lit.site.cfg.py.in @@ -46,7 +46,6 @@ config.ppc_linux_default_ieeelongdouble = @PPC_LINUX_DEFAULT_IEEELONGDOUBLE@ config.have_llvm_driver = @LLVM_TOOL_LLVM_DRIVER_BUILD@ config.spirv_tools_tests = @LLVM_INCLUDE_SPIRV_TOOLS_TESTS@ config.substitutions.append(("%llvm-version-major", "@LLVM_VERSION_MAJOR@")) -config.has_key_instructions = @LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS@ import lit.llvm lit.llvm.initialize(lit_config, config) diff --git a/clang/unittests/AST/DeclTest.cpp b/clang/unittests/AST/DeclTest.cpp index afaf413..6b44391 100644 --- a/clang/unittests/AST/DeclTest.cpp +++ b/clang/unittests/AST/DeclTest.cpp @@ -90,7 +90,7 @@ TEST(Decl, AsmLabelAttr) { DeclF->addAttr(AsmLabelAttr::Create(Ctx, "foo")); // Mangle the decl names. - std::string MangleF, MangleG; + std::string MangleF; std::unique_ptr<ItaniumMangleContext> MC( ItaniumMangleContext::create(Ctx, Diags)); { diff --git a/clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp b/clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp index 12be228..ab4b8c7 100644 --- a/clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp +++ b/clang/unittests/StaticAnalyzer/ExprEngineVisitTest.cpp @@ -55,11 +55,13 @@ public: ", Stmt = " + S->getStmtClassName()); } - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const { + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const { emitErrorReport(C, Bug, "checkBind: Loc = " + dumpToString(Loc) + ", Val = " + dumpToString(Val) + - ", Stmt = " + S->getStmtClassName()); + ", Stmt = " + S->getStmtClassName() + + ", AtDeclInit = " + (AtDeclInit ? "true" : "false")); } private: @@ -140,7 +142,7 @@ TEST(ExprEngineVisitTest, checkLocationAndBind) { "Stmt = ImplicitCastExpr"; std::string BindMsg = "checkBind: Loc = &MyClassWrite, Val = lazyCompoundVal{0x0,MyClassRead}, " - "Stmt = CXXOperatorCallExpr"; + "Stmt = CXXOperatorCallExpr, AtDeclInit = false"; std::size_t LocPos = Diags.find(LocMsg); std::size_t BindPos = Diags.find(BindMsg); EXPECT_NE(LocPos, std::string::npos); @@ -150,4 +152,20 @@ TEST(ExprEngineVisitTest, checkLocationAndBind) { EXPECT_TRUE(LocPos > BindPos); } +TEST(ExprEngineVisitTest, checkLocationAndBindInitialization) { + std::string Diags; + EXPECT_TRUE(runCheckerOnCode<addMemAccessChecker>(R"( + class MyClass{ + public: + int Value; + }; + void top(MyClass param) { + MyClass MyClassWrite = param; + } + )", + Diags)); + + EXPECT_TRUE(StringRef(Diags).contains("AtDeclInit = true")); +} + } // namespace diff --git a/clang/unittests/StaticAnalyzer/SValTest.cpp b/clang/unittests/StaticAnalyzer/SValTest.cpp index 58e9a8d..71f682a 100644 --- a/clang/unittests/StaticAnalyzer/SValTest.cpp +++ b/clang/unittests/StaticAnalyzer/SValTest.cpp @@ -61,7 +61,8 @@ using SVals = llvm::StringMap<SVal>; /// can test whatever we gathered. class SValCollector : public Checker<check::Bind, check::EndAnalysis> { public: - void checkBind(SVal Loc, SVal Val, const Stmt *S, CheckerContext &C) const { + void checkBind(SVal Loc, SVal Val, const Stmt *S, bool AtDeclInit, + CheckerContext &C) const { // Skip instantly if we finished testing. // Also, we care only for binds happening in variable initializations. if (Tested || !isa<DeclStmt>(S)) diff --git a/compiler-rt/lib/xray/xray_fdr_logging.cpp b/compiler-rt/lib/xray/xray_fdr_logging.cpp index 7def356..977a0b9 100644 --- a/compiler-rt/lib/xray/xray_fdr_logging.cpp +++ b/compiler-rt/lib/xray/xray_fdr_logging.cpp @@ -73,7 +73,7 @@ static_assert(std::is_trivially_destructible<ThreadLocalData>::value, static pthread_key_t Key; // Global BufferQueue. -static std::byte BufferQueueStorage[sizeof(BufferQueue)]; +alignas(BufferQueue) static std::byte BufferQueueStorage[sizeof(BufferQueue)]; static BufferQueue *BQ = nullptr; // Global thresholds for function durations. diff --git a/compiler-rt/test/profile/Linux/coverage_short_circuit.cpp b/compiler-rt/test/profile/Linux/coverage_short_circuit.cpp new file mode 100644 index 0000000..54f0c4c --- /dev/null +++ b/compiler-rt/test/profile/Linux/coverage_short_circuit.cpp @@ -0,0 +1,36 @@ +// RUN: %clangxx_profgen -std=c++17 -fuse-ld=lld -fcoverage-mapping -o %t %s +// RUN: env LLVM_PROFILE_FILE=%t.profraw %run %t +// RUN: llvm-profdata merge -o %t.profdata %t.profraw +// RUN: llvm-cov show %t -instr-profile=%t.profdata 2>&1 | FileCheck %s + +void foo() { // CHECK: [[@LINE]]| 1|void foo() { + bool cond1 = false; // CHECK-NEXT: [[@LINE]]| 1| bool cond1 = false; + bool cond2 = true; // CHECK-NEXT: [[@LINE]]| 1| bool cond2 = true; + if (cond1 && // CHECK-NEXT: [[@LINE]]| 1| if (cond1 && + cond2) { // CHECK-NEXT: [[@LINE]]| 0| cond2) { + } // CHECK-NEXT: [[@LINE]]| 0| } +} // CHECK-NEXT: [[@LINE]]| 1|} + +void bar() { // CHECK: [[@LINE]]| 1|void bar() { + bool cond1 = true; // CHECK-NEXT: [[@LINE]]| 1| bool cond1 = true; + bool cond2 = false; // CHECK-NEXT: [[@LINE]]| 1| bool cond2 = false; + if (cond1 && // CHECK-NEXT: [[@LINE]]| 1| if (cond1 && + cond2) { // CHECK-NEXT: [[@LINE]]| 1| cond2) { + } // CHECK-NEXT: [[@LINE]]| 0| } +} // CHECK-NEXT: [[@LINE]]| 1|} + +void baz() { // CHECK: [[@LINE]]| 1|void baz() { + bool cond1 = false; // CHECK-NEXT: [[@LINE]]| 1| bool cond1 = false; + bool cond2 = true; // CHECK-NEXT: [[@LINE]]| 1| bool cond2 = true; + if (cond1 // CHECK-NEXT: [[@LINE]]| 1| if (cond1 + && // CHECK-NEXT: [[@LINE]]| 0| && + cond2) { // CHECK-NEXT: [[@LINE]]| 0| cond2) { + } // CHECK-NEXT: [[@LINE]]| 0| } +} // CHECK-NEXT: [[@LINE]]| 1|} + +int main() { + foo(); + bar(); + baz(); + return 0; +} diff --git a/libc/config/baremetal/aarch64/entrypoints.txt b/libc/config/baremetal/aarch64/entrypoints.txt index 683c746..af9f687 100644 --- a/libc/config/baremetal/aarch64/entrypoints.txt +++ b/libc/config/baremetal/aarch64/entrypoints.txt @@ -757,6 +757,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -765,6 +771,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/baremetal/arm/entrypoints.txt b/libc/config/baremetal/arm/entrypoints.txt index f8ecc2e..ce8d7c0 100644 --- a/libc/config/baremetal/arm/entrypoints.txt +++ b/libc/config/baremetal/arm/entrypoints.txt @@ -760,6 +760,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -768,6 +774,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/baremetal/riscv/entrypoints.txt b/libc/config/baremetal/riscv/entrypoints.txt index 679bfb3..7eeec24 100644 --- a/libc/config/baremetal/riscv/entrypoints.txt +++ b/libc/config/baremetal/riscv/entrypoints.txt @@ -760,6 +760,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -768,6 +774,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/darwin/aarch64/entrypoints.txt b/libc/config/darwin/aarch64/entrypoints.txt index 72b0265..de4b4df 100644 --- a/libc/config/darwin/aarch64/entrypoints.txt +++ b/libc/config/darwin/aarch64/entrypoints.txt @@ -590,6 +590,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -598,6 +604,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/darwin/x86_64/entrypoints.txt b/libc/config/darwin/x86_64/entrypoints.txt index b5ab1ee..f668e8a 100644 --- a/libc/config/darwin/x86_64/entrypoints.txt +++ b/libc/config/darwin/x86_64/entrypoints.txt @@ -233,6 +233,12 @@ set(TARGET_LIBM_ENTRYPOINTS list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 diff --git a/libc/config/gpu/amdgpu/entrypoints.txt b/libc/config/gpu/amdgpu/entrypoints.txt index 77a13a6..f7b8b2f 100644 --- a/libc/config/gpu/amdgpu/entrypoints.txt +++ b/libc/config/gpu/amdgpu/entrypoints.txt @@ -616,6 +616,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 diff --git a/libc/config/gpu/nvptx/entrypoints.txt b/libc/config/gpu/nvptx/entrypoints.txt index 61c9c71..23afb40 100644 --- a/libc/config/gpu/nvptx/entrypoints.txt +++ b/libc/config/gpu/nvptx/entrypoints.txt @@ -617,6 +617,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 diff --git a/libc/config/linux/aarch64/entrypoints.txt b/libc/config/linux/aarch64/entrypoints.txt index fbdf8fb..62a3ae9 100644 --- a/libc/config/linux/aarch64/entrypoints.txt +++ b/libc/config/linux/aarch64/entrypoints.txt @@ -844,6 +844,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -852,6 +858,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LLVM_LIBC_FULL_BUILD) list(APPEND TARGET_LIBC_ENTRYPOINTS # assert.h entrypoints diff --git a/libc/config/linux/arm/entrypoints.txt b/libc/config/linux/arm/entrypoints.txt index e3f5fee..eedf184 100644 --- a/libc/config/linux/arm/entrypoints.txt +++ b/libc/config/linux/arm/entrypoints.txt @@ -460,6 +460,12 @@ set(TARGET_LIBM_ENTRYPOINTS list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 diff --git a/libc/config/linux/riscv/entrypoints.txt b/libc/config/linux/riscv/entrypoints.txt index ba67ddd..cd56979 100644 --- a/libc/config/linux/riscv/entrypoints.txt +++ b/libc/config/linux/riscv/entrypoints.txt @@ -863,6 +863,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -871,6 +877,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/linux/x86_64/entrypoints.txt b/libc/config/linux/x86_64/entrypoints.txt index 066dc21..2b0cf33 100644 --- a/libc/config/linux/x86_64/entrypoints.txt +++ b/libc/config/linux/x86_64/entrypoints.txt @@ -895,6 +895,12 @@ endif() list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 @@ -903,6 +909,14 @@ list(APPEND TARGET_LIBM_ENTRYPOINTS libc.src.math.truncbf16 ) +if(LIBC_TYPES_HAS_FLOAT128) + list(APPEND TARGET_LIBM_ENTRYPOINTS + # math.h C++23 mixed bfloat16 and _Float128 entrypoints + libc.src.math.bf16addf128 + libc.src.math.bf16subf128 + ) +endif() + if(LIBC_COMPILER_HAS_FIXED_POINT) list(APPEND TARGET_LIBM_ENTRYPOINTS # stdfix.h _Fract and _Accum entrypoints diff --git a/libc/config/windows/entrypoints.txt b/libc/config/windows/entrypoints.txt index 994078c..1b1db5e 100644 --- a/libc/config/windows/entrypoints.txt +++ b/libc/config/windows/entrypoints.txt @@ -306,6 +306,12 @@ set(TARGET_LIBM_ENTRYPOINTS list(APPEND TARGET_LIBM_ENTRYPOINTS # bfloat16 entrypoints + libc.src.math.bf16add + libc.src.math.bf16addf + libc.src.math.bf16addl + libc.src.math.bf16sub + libc.src.math.bf16subf + libc.src.math.bf16subl libc.src.math.ceilbf16 libc.src.math.fabsbf16 libc.src.math.floorbf16 diff --git a/libc/shared/math.h b/libc/shared/math.h index 3714f38..ea645f0 100644 --- a/libc/shared/math.h +++ b/libc/shared/math.h @@ -31,6 +31,7 @@ #include "math/atanhf.h" #include "math/atanhf16.h" #include "math/cbrt.h" +#include "math/cbrtf.h" #include "math/erff.h" #include "math/exp.h" #include "math/exp10.h" diff --git a/libc/shared/math/cbrtf.h b/libc/shared/math/cbrtf.h new file mode 100644 index 0000000..09b86be --- /dev/null +++ b/libc/shared/math/cbrtf.h @@ -0,0 +1,23 @@ +//===-- Shared cbrtf function -----------------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LIBC_SHARED_MATH_CBRTF_H +#define LIBC_SHARED_MATH_CBRTF_H + +#include "shared/libc_common.h" +#include "src/__support/math/cbrtf.h" + +namespace LIBC_NAMESPACE_DECL { +namespace shared { + +using math::cbrtf; + +} // namespace shared +} // namespace LIBC_NAMESPACE_DECL + +#endif // LIBC_SHARED_MATH_CBRTF_H diff --git a/libc/src/__support/GPU/CMakeLists.txt b/libc/src/__support/GPU/CMakeLists.txt index f8fdfeb..72a7879 100644 --- a/libc/src/__support/GPU/CMakeLists.txt +++ b/libc/src/__support/GPU/CMakeLists.txt @@ -9,6 +9,12 @@ add_header_library( utils.h ) +add_header_library( + fixedstack + HDRS + fixedstack.h +) + add_object_library( allocator SRCS @@ -23,4 +29,5 @@ add_object_library( libc.src.__support.CPP.bit libc.src.__support.CPP.new .utils + .fixedstack ) diff --git a/libc/src/__support/GPU/allocator.cpp b/libc/src/__support/GPU/allocator.cpp index 250bebd..534a309 100644 --- a/libc/src/__support/GPU/allocator.cpp +++ b/libc/src/__support/GPU/allocator.cpp @@ -20,6 +20,7 @@ #include "src/__support/CPP/atomic.h" #include "src/__support/CPP/bit.h" #include "src/__support/CPP/new.h" +#include "src/__support/GPU/fixedstack.h" #include "src/__support/GPU/utils.h" #include "src/__support/RPC/rpc_client.h" #include "src/__support/threads/sleep.h" @@ -39,6 +40,9 @@ constexpr static uint32_t MIN_ALIGNMENT = MIN_SIZE - 1; // The number of times to attempt claiming an in-progress slab allocation. constexpr static uint32_t MAX_TRIES = 1024; +// The number of previously allocated slabs we will keep in memory. +constexpr static uint32_t CACHED_SLABS = 8; + static_assert(!(ARRAY_SIZE & (ARRAY_SIZE - 1)), "Must be a power of two"); namespace impl { @@ -185,20 +189,35 @@ struct Slab { struct alignas(MIN_SIZE) Header { uint32_t chunk_size; uint32_t global_index; + uint32_t cached_chunk_size; }; // Initialize the slab with its chunk size and index in the global table for // use when freeing. Slab(uint32_t chunk_size, uint32_t global_index) { Header *header = reinterpret_cast<Header *>(memory); + header->cached_chunk_size = cpp::numeric_limits<uint32_t>::max(); header->chunk_size = chunk_size; header->global_index = global_index; } + // Reset the memory with a new index and chunk size, not thread safe. + Slab *reset(uint32_t chunk_size, uint32_t global_index) { + Header *header = reinterpret_cast<Header *>(memory); + header->cached_chunk_size = header->chunk_size; + header->chunk_size = chunk_size; + header->global_index = global_index; + return this; + } + // Set the necessary bitfield bytes to zero in parallel using many lanes. This // must be called before the bitfield can be accessed safely, memory is not // guaranteed to be zero initialized in the current implementation. void initialize(uint64_t uniform) { + // If this is a re-used slab the memory is already set to zero. + if (get_cached_chunk_size() <= get_chunk_size()) + return; + uint32_t size = (bitfield_bytes(get_chunk_size()) + sizeof(uint32_t) - 1) / sizeof(uint32_t); impl::uniform_memset(get_bitfield(), 0, size, uniform); @@ -236,6 +255,11 @@ struct Slab { return reinterpret_cast<const Header *>(memory)->chunk_size; } + // Get the chunk size that was previously used. + uint32_t get_cached_chunk_size() const { + return reinterpret_cast<const Header *>(memory)->cached_chunk_size; + } + // Get the location in the memory where we will store the global index. uint32_t get_global_index() const { return reinterpret_cast<const Header *>(memory)->global_index; @@ -337,6 +361,9 @@ struct Slab { uint8_t memory[SLAB_SIZE]; }; +// A global cache of previously allocated slabs for efficient reuse. +static FixedStack<Slab *, CACHED_SLABS> slab_cache; + /// A wait-free guard around a pointer resource to be created dynamically if /// space is available and freed once there are no more users. struct GuardPtr { @@ -408,6 +435,11 @@ private: reinterpret_cast<Slab *>(cpp::numeric_limits<uintptr_t>::max()), cpp::MemoryOrder::RELAXED, cpp::MemoryOrder::RELAXED)) { count = cpp::numeric_limits<uint32_t>::max(); + + Slab *cached = nullptr; + if (slab_cache.pop(cached)) + return cached->reset(cpp::forward<Args>(args)...); + void *raw = impl::rpc_allocate(sizeof(Slab)); if (!raw) return nullptr; @@ -475,8 +507,10 @@ public: if (gpu::get_lane_id() == uint32_t(cpp::countr_zero(mask)) && ref.release(cpp::popcount(mask))) { Slab *p = ptr.load(cpp::MemoryOrder::RELAXED); - p->~Slab(); - impl::rpc_free(p); + if (!slab_cache.push(p)) { + p->~Slab(); + impl::rpc_free(p); + } cpp::atomic_thread_fence(cpp::MemoryOrder::RELEASE); ptr.store(nullptr, cpp::MemoryOrder::RELAXED); } diff --git a/libc/src/__support/GPU/fixedstack.h b/libc/src/__support/GPU/fixedstack.h new file mode 100644 index 0000000..6ceaa2f --- /dev/null +++ b/libc/src/__support/GPU/fixedstack.h @@ -0,0 +1,111 @@ +//===-- A lock-free data structure for a fixed capacity stack ---*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC___SUPPORT_GPU_FIXEDSTACK_H +#define LLVM_LIBC_SRC___SUPPORT_GPU_FIXEDSTACK_H + +#include "src/__support/CPP/atomic.h" +#include "src/__support/threads/sleep.h" + +#include <stdint.h> + +namespace LIBC_NAMESPACE_DECL { + +// A lock-free fixed size stack backed by an underlying array of data. It +// supports push and pop operations in a completely lock-free manner. +template <typename T, uint32_t CAPACITY> struct alignas(16) FixedStack { + // The index is stored as a 20-bit value and cannot index into any more. + static_assert(CAPACITY < 1024 * 1024, "Invalid buffer size"); + + // The head of the free and used stacks. Represents as a 20-bit index combined + // with a 44-bit ABA tag that is updated in a single atomic operation. + uint64_t free; + uint64_t used; + + // The stack is a linked list of indices into the underlying data + uint32_t next[CAPACITY]; + T data[CAPACITY]; + + // Get the 20-bit index into the underlying array from the head. + LIBC_INLINE static constexpr uint32_t get_node(uint64_t head) { + return static_cast<uint32_t>(head & 0xfffff); + } + + // Increment the old ABA tag and merge it into the new index. + LIBC_INLINE static constexpr uint64_t make_head(uint64_t orig, + uint32_t node) { + return static_cast<uint64_t>(node) | (((orig >> 20ul) + 1ul) << 20ul); + } + + // Attempts to pop data from the given stack by making it point to the next + // node. We repeatedly attempt to write to the head using compare-and-swap, + // expecting that it has not been changed by any other thread. + LIBC_INLINE uint32_t pop_impl(cpp::AtomicRef<uint64_t> head) { + uint64_t orig = head.load(cpp::MemoryOrder::RELAXED); + + for (;;) { + if (get_node(orig) == CAPACITY) + return CAPACITY; + + uint32_t node = + cpp::AtomicRef(next[get_node(orig)]).load(cpp::MemoryOrder::RELAXED); + if (head.compare_exchange_strong(orig, make_head(orig, node), + cpp::MemoryOrder::ACQUIRE, + cpp::MemoryOrder::RELAXED)) + break; + } + return get_node(orig); + } + + // Attempts to push data to the given stack by making it point to the new + // node. We repeatedly attempt to write to the head using compare-and-swap, + // expecting that it has not been changed by any other thread. + LIBC_INLINE uint32_t push_impl(cpp::AtomicRef<uint64_t> head, uint32_t node) { + uint64_t orig = head.load(cpp::MemoryOrder::RELAXED); + for (;;) { + next[node] = get_node(orig); + if (head.compare_exchange_strong(orig, make_head(orig, node), + cpp::MemoryOrder::RELEASE, + cpp::MemoryOrder::RELAXED)) + break; + } + return get_node(head.load(cpp::MemoryOrder::RELAXED)); + } + +public: + // Initialize the free stack to be full and the used stack to be empty. We use + // the capacity of the stack as a sentinel value. + LIBC_INLINE constexpr FixedStack() : free(0), used(CAPACITY), data{} { + for (uint32_t i = 0; i < CAPACITY; ++i) + next[i] = i + 1; + } + + LIBC_INLINE bool push(const T &val) { + uint32_t node = pop_impl(cpp::AtomicRef(free)); + if (node == CAPACITY) + return false; + + data[node] = val; + push_impl(cpp::AtomicRef(used), node); + return true; + } + + LIBC_INLINE bool pop(T &val) { + uint32_t node = pop_impl(cpp::AtomicRef(used)); + if (node == CAPACITY) + return false; + + val = data[node]; + push_impl(cpp::AtomicRef(free), node); + return true; + } +}; + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC___SUPPORT_GPU_FIXEDSTACK_H diff --git a/libc/src/__support/math/CMakeLists.txt b/libc/src/__support/math/CMakeLists.txt index e1076ed..fe928a8 100644 --- a/libc/src/__support/math/CMakeLists.txt +++ b/libc/src/__support/math/CMakeLists.txt @@ -347,6 +347,17 @@ add_header_library( ) add_header_library( + cbrtf + HDRS + cbrtf.h + DEPENDS + libc.src.__support.FPUtil.fenv_impl + libc.src.__support.FPUtil.fp_bits + libc.src.__support.FPUtil.multiply_add + libc.src.__support.macros.optimization +) + +add_header_library( erff HDRS erff.h diff --git a/libc/src/__support/math/cbrtf.h b/libc/src/__support/math/cbrtf.h new file mode 100644 index 0000000..f82892b --- /dev/null +++ b/libc/src/__support/math/cbrtf.h @@ -0,0 +1,161 @@ +//===-- Implementation header for cbrtf -------------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LIBC_SRC___SUPPORT_MATH_CBRTF_H +#define LIBC_SRC___SUPPORT_MATH_CBRTF_H + +#include "src/__support/FPUtil/FEnvImpl.h" +#include "src/__support/FPUtil/FPBits.h" +#include "src/__support/FPUtil/multiply_add.h" +#include "src/__support/macros/config.h" +#include "src/__support/macros/optimization.h" // LIBC_UNLIKELY + +namespace LIBC_NAMESPACE_DECL { + +namespace math { + +LIBC_INLINE static constexpr float cbrtf(float x) { + // Look up table for 2^(i/3) for i = 0, 1, 2. + constexpr double CBRT2[3] = {1.0, 0x1.428a2f98d728bp0, 0x1.965fea53d6e3dp0}; + + // Degree-7 polynomials approximation of ((1 + x)^(1/3) - 1)/x for 0 <= x <= 1 + // generated by Sollya with: + // > for i from 0 to 15 do { + // P = fpminimax(((1 + x)^(1/3) - 1)/x, 6, [|D...|], [i/16, (i + 1)/16]); + // print("{", coeff(P, 0), ",", coeff(P, 1), ",", coeff(P, 2), ",", + // coeff(P, 3), ",", coeff(P, 4), ",", coeff(P, 5), ",", + // coeff(P, 6), "},"); + // }; + // Then (1 + x)^(1/3) ~ 1 + x * P(x). + constexpr double COEFFS[16][7] = { + {0x1.55555555554ebp-2, -0x1.c71c71c678c0cp-4, 0x1.f9add2776de81p-5, + -0x1.511e10aa964a7p-5, 0x1.ee44165937fa2p-6, -0x1.7c5c9e059345dp-6, + 0x1.047f75e0aff14p-6}, + {0x1.5555554d1149ap-2, -0x1.c71c676fcb5bp-4, 0x1.f9ab127dc57ebp-5, + -0x1.50ea8fd1d4c15p-5, 0x1.e9d68f28ced43p-6, -0x1.60e0e1e661311p-6, + 0x1.716eca1d6e3bcp-7}, + {0x1.5555546377d45p-2, -0x1.c71bc1c6d49d2p-4, 0x1.f9924cc0ed24dp-5, + -0x1.4fea3beb53b3bp-5, 0x1.de028a9a07b1bp-6, -0x1.3b090d2233524p-6, + 0x1.0aeca34893785p-7}, + {0x1.55554dce9f649p-2, -0x1.c7188b34b98f8p-4, 0x1.f93e1af34af49p-5, + -0x1.4d9a06be75c63p-5, 0x1.cb943f4f68992p-6, -0x1.139a685a5e3c4p-6, + 0x1.88410674c6a5dp-8}, + {0x1.5555347d211c3p-2, -0x1.c70f2a4b1a5fap-4, 0x1.f88420e8602c3p-5, + -0x1.49becfa4ed3ep-5, 0x1.b475cd9013162p-6, -0x1.dcfee1dd2f8efp-7, + 0x1.249bb51a1c498p-8}, + {0x1.5554f01b33dbap-2, -0x1.c6facb929dbf1p-4, 0x1.f73fb7861252ep-5, + -0x1.4459a4a0071fap-5, 0x1.9a8df2b504fc2p-6, -0x1.9a7ce3006d06ep-7, + 0x1.ba9230918fa2ep-9}, + {0x1.55545c695db5fp-2, -0x1.c6d6089f20275p-4, 0x1.f556e0ea80efp-5, + -0x1.3d91372d083f4p-5, 0x1.7f66cff331f4p-6, -0x1.606a562491737p-7, + 0x1.52e3e17c71069p-9}, + {0x1.55534a879232ap-2, -0x1.c69b836998b84p-4, 0x1.f2bb26dac0e4cp-5, + -0x1.359eed43716d7p-5, 0x1.64218cd824fbcp-6, -0x1.2e703e2e091e8p-7, + 0x1.0677d9af6aad4p-9}, + {0x1.5551836bb5494p-2, -0x1.c64658c15353bp-4, 0x1.ef68517451a6ep-5, + -0x1.2cc20a980dceep-5, 0x1.49843e0fad93ap-6, -0x1.03c59ccb68e54p-7, + 0x1.9ad325dc7adcbp-10}, + {0x1.554ecacb0d035p-2, -0x1.c5d2664026ffcp-4, 0x1.eb624796ba809p-5, + -0x1.233803d19a535p-5, 0x1.300decb1c3c28p-6, -0x1.befe18031ec3dp-8, + 0x1.449f5ee175c69p-10}, + {0x1.554ae1f5ae815p-2, -0x1.c53c6b14ff6b2p-4, 0x1.e6b2d5127bb5bp-5, + -0x1.19387336788a3p-5, 0x1.180955a6ab255p-6, -0x1.81696703ba369p-8, + 0x1.02cb36389bd79p-10}, + {0x1.55458a59f356ep-2, -0x1.c4820dd631ae9p-4, 0x1.e167af818bd15p-5, + -0x1.0ef35f6f72e52p-5, 0x1.019c33b65e4ebp-6, -0x1.4d25bdd52d3a5p-8, + 0x1.a008ae91f5936p-11}, + {0x1.553e878eafee1p-2, -0x1.c3a1d0b2a3db2p-4, 0x1.db90d8ed9f89bp-5, + -0x1.0490e20f1ae91p-5, 0x1.d9a5d1fc42fe3p-7, -0x1.20bf8227c2abfp-8, + 0x1.50f8174cdb6e9p-11}, + {0x1.5535a0dedf1b1p-2, -0x1.c29afb8bd01a1p-4, 0x1.d53f6371c1e27p-5, + -0x1.f463209b433e2p-6, 0x1.b35222a17e44p-7, -0x1.f5efbf505e133p-9, + 0x1.12e0e94e8586dp-11}, + {0x1.552aa25e57bfdp-2, -0x1.c16d811e4acadp-4, 0x1.ce8489b47aa51p-5, + -0x1.dfde7ff758ea8p-6, 0x1.901f43aac38c8p-7, -0x1.b581d07df5ad5p-9, + 0x1.c3726535f1fc6p-12}, + {0x1.551d5d9b204d3p-2, -0x1.c019e328f8db1p-4, 0x1.c7710f44fc3cep-5, + -0x1.cbbbe25ea8ba4p-6, 0x1.6fe270088623dp-7, -0x1.7e6fc79733761p-9, + 0x1.75077abf18d84p-12}, + }; + + using FloatBits = typename fputil::FPBits<float>; + using DoubleBits = typename fputil::FPBits<double>; + + FloatBits x_bits(x); + + uint32_t x_abs = x_bits.uintval() & 0x7fff'ffff; + uint32_t sign_bit = (x_bits.uintval() >> 31) << DoubleBits::EXP_LEN; + + if (LIBC_UNLIKELY(x == 0.0f || x_abs >= 0x7f80'0000)) { + // x is 0, Inf, or NaN. + // Make sure it works for FTZ/DAZ modes. + return x + x; + } + + double xd = static_cast<double>(x); + DoubleBits xd_bits(xd); + + // When using biased exponent of x in double precision, + // x_e = real_exponent_of_x + 1023 + // Then: + // x_e / 3 = real_exponent_of_x / 3 + 1023/3 + // = real_exponent_of_x / 3 + 341 + // So to make it the correct biased exponent of x^(1/3), we add + // 1023 - 341 = 682 + // to the quotient x_e / 3. + unsigned x_e = static_cast<unsigned>(xd_bits.get_biased_exponent()); + unsigned out_e = (x_e / 3 + 682) | sign_bit; + unsigned shift_e = x_e % 3; + + // Set x_m = 2^(x_e % 3) * (1.mantissa) + uint64_t x_m = xd_bits.get_mantissa(); + // Use the leading 4 bits for look up table + unsigned idx = static_cast<unsigned>(x_m >> (DoubleBits::FRACTION_LEN - 4)); + + x_m |= static_cast<uint64_t>(DoubleBits::EXP_BIAS) + << DoubleBits::FRACTION_LEN; + + double x_reduced = DoubleBits(x_m).get_val(); + double dx = x_reduced - 1.0; + + double dx_sq = dx * dx; + double c0 = fputil::multiply_add(dx, COEFFS[idx][0], 1.0); + double c1 = fputil::multiply_add(dx, COEFFS[idx][2], COEFFS[idx][1]); + double c2 = fputil::multiply_add(dx, COEFFS[idx][4], COEFFS[idx][3]); + double c3 = fputil::multiply_add(dx, COEFFS[idx][6], COEFFS[idx][5]); + + double dx_4 = dx_sq * dx_sq; + double p0 = fputil::multiply_add(dx_sq, c1, c0); + double p1 = fputil::multiply_add(dx_sq, c3, c2); + + double r = fputil::multiply_add(dx_4, p1, p0) * CBRT2[shift_e]; + + uint64_t r_m = DoubleBits(r).get_mantissa(); + // Check if the output is exact. To be exact, the smallest 1-bit of the + // output has to be at least 2^-7 or higher. So we check the lowest 44 bits + // to see if they are within 2^(-52 + 3) errors from all zeros, then the + // result cube root is exact. + if (LIBC_UNLIKELY(((r_m + 8) & 0xfffffffffff) <= 16)) { + if ((r_m & 0xfffffffffff) <= 8) + r_m &= 0xffff'ffff'ffff'ffe0; + else + r_m = (r_m & 0xffff'ffff'ffff'ffe0) + 0x20; + fputil::clear_except_if_required(FE_INEXACT); + } + // Adjust exponent and sign. + uint64_t r_bits = + r_m | (static_cast<uint64_t>(out_e) << DoubleBits::FRACTION_LEN); + + return static_cast<float>(DoubleBits(r_bits).get_val()); +} + +} // namespace math + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LIBC_SRC___SUPPORT_MATH_CBRTF_H diff --git a/libc/src/math/CMakeLists.txt b/libc/src/math/CMakeLists.txt index c3840d3..660c3681 100644 --- a/libc/src/math/CMakeLists.txt +++ b/libc/src/math/CMakeLists.txt @@ -563,3 +563,13 @@ add_math_entrypoint_object(ufromfpxf) add_math_entrypoint_object(ufromfpxl) add_math_entrypoint_object(ufromfpxf16) add_math_entrypoint_object(ufromfpxf128) + +add_math_entrypoint_object(bf16add) +add_math_entrypoint_object(bf16addf) +add_math_entrypoint_object(bf16addl) +add_math_entrypoint_object(bf16addf128) + +add_math_entrypoint_object(bf16sub) +add_math_entrypoint_object(bf16subf) +add_math_entrypoint_object(bf16subl) +add_math_entrypoint_object(bf16subf128) diff --git a/libc/src/math/bf16add.h b/libc/src/math/bf16add.h new file mode 100644 index 0000000..a29970e --- /dev/null +++ b/libc/src/math/bf16add.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16add -----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16ADD_H +#define LLVM_LIBC_SRC_MATH_BF16ADD_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16add(double x, double y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16ADD_H diff --git a/libc/src/math/bf16addf.h b/libc/src/math/bf16addf.h new file mode 100644 index 0000000..80a5e2a --- /dev/null +++ b/libc/src/math/bf16addf.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16addf ----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16ADDF_H +#define LLVM_LIBC_SRC_MATH_BF16ADDF_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16addf(float x, float y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16ADDF_H diff --git a/libc/src/math/bf16addf128.h b/libc/src/math/bf16addf128.h new file mode 100644 index 0000000..3c2f3a1 --- /dev/null +++ b/libc/src/math/bf16addf128.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16addf128 -------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16ADDF128_H +#define LLVM_LIBC_SRC_MATH_BF16ADDF128_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16addf128(float128 x, float128 y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16ADDF128_H diff --git a/libc/src/math/bf16addl.h b/libc/src/math/bf16addl.h new file mode 100644 index 0000000..a9e7d68 --- /dev/null +++ b/libc/src/math/bf16addl.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16addl ----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16ADDL_H +#define LLVM_LIBC_SRC_MATH_BF16ADDL_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16addl(long double x, long double y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16ADDL_H diff --git a/libc/src/math/bf16sub.h b/libc/src/math/bf16sub.h new file mode 100644 index 0000000..8108e914 --- /dev/null +++ b/libc/src/math/bf16sub.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16sub -----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16SUB_H +#define LLVM_LIBC_SRC_MATH_BF16SUB_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16sub(double x, double y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16SUB_H diff --git a/libc/src/math/bf16subf.h b/libc/src/math/bf16subf.h new file mode 100644 index 0000000..1bd79bf --- /dev/null +++ b/libc/src/math/bf16subf.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16subf ----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16SUBF_H +#define LLVM_LIBC_SRC_MATH_BF16SUBF_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16subf(float x, float y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16SUBF_H diff --git a/libc/src/math/bf16subf128.h b/libc/src/math/bf16subf128.h new file mode 100644 index 0000000..19590e8 --- /dev/null +++ b/libc/src/math/bf16subf128.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16subf128 -------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16SUBF128_H +#define LLVM_LIBC_SRC_MATH_BF16SUBF128_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16subf128(float128 x, float128 y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16SUBF128_H diff --git a/libc/src/math/bf16subl.h b/libc/src/math/bf16subl.h new file mode 100644 index 0000000..13b2093 --- /dev/null +++ b/libc/src/math/bf16subl.h @@ -0,0 +1,21 @@ +//===-- Implementation header for bf16subl ----------------------*- C++ -*-===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#ifndef LLVM_LIBC_SRC_MATH_BF16SUBL_H +#define LLVM_LIBC_SRC_MATH_BF16SUBL_H + +#include "src/__support/macros/config.h" +#include "src/__support/macros/properties/types.h" + +namespace LIBC_NAMESPACE_DECL { + +bfloat16 bf16subl(long double x, long double y); + +} // namespace LIBC_NAMESPACE_DECL + +#endif // LLVM_LIBC_SRC_MATH_BF16SUBL_H diff --git a/libc/src/math/generic/CMakeLists.txt b/libc/src/math/generic/CMakeLists.txt index 0bec7dd..5aeacc8 100644 --- a/libc/src/math/generic/CMakeLists.txt +++ b/libc/src/math/generic/CMakeLists.txt @@ -4819,11 +4819,7 @@ add_entrypoint_object( HDRS ../cbrtf.h DEPENDS - libc.hdr.fenv_macros - libc.src.__support.FPUtil.fenv_impl - libc.src.__support.FPUtil.fp_bits - libc.src.__support.FPUtil.multiply_add - libc.src.__support.macros.optimization + libc.src.__support.math.cbrtf ) add_entrypoint_object( @@ -4915,3 +4911,116 @@ add_header_library( libc.src.__support.math.expf16_utils libc.src.__support.math.exp10_float16_constants ) + +add_entrypoint_object( + bf16add + SRCS + bf16add.cpp + HDRS + ../bf16add.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16addf + SRCS + bf16addf.cpp + HDRS + ../bf16addf.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16addl + SRCS + bf16addl.cpp + HDRS + ../bf16addl.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16addf128 + SRCS + bf16addf128.cpp + HDRS + ../bf16addf128.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + + +add_entrypoint_object( + bf16sub + SRCS + bf16sub.cpp + HDRS + ../bf16sub.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16subf + SRCS + bf16subf.cpp + HDRS + ../bf16subf.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16subl + SRCS + bf16subl.cpp + HDRS + ../bf16subl.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) + +add_entrypoint_object( + bf16subf128 + SRCS + bf16subf128.cpp + HDRS + ../bf16subf128.h + DEPENDS + libc.src.__support.common + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.FPUtil.generic.add_sub + libc.src.__support.macros.config + libc.src.__support.macros.properties.types +) diff --git a/libc/src/math/generic/bf16add.cpp b/libc/src/math/generic/bf16add.cpp new file mode 100644 index 0000000..257596a --- /dev/null +++ b/libc/src/math/generic/bf16add.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16add function --------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16add.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16add, (double x, double y)) { + return fputil::generic::add<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16addf.cpp b/libc/src/math/generic/bf16addf.cpp new file mode 100644 index 0000000..65e6cbf --- /dev/null +++ b/libc/src/math/generic/bf16addf.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16addf function -------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16addf.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16addf, (float x, float y)) { + return fputil::generic::add<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16addf128.cpp b/libc/src/math/generic/bf16addf128.cpp new file mode 100644 index 0000000..03f70af --- /dev/null +++ b/libc/src/math/generic/bf16addf128.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16addf128 function ----------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16addf128.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16addf128, (float128 x, float128 y)) { + return fputil::generic::add<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16addl.cpp b/libc/src/math/generic/bf16addl.cpp new file mode 100644 index 0000000..c212195 --- /dev/null +++ b/libc/src/math/generic/bf16addl.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16addl function -------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16addl.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16addl, (long double x, long double y)) { + return fputil::generic::add<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16sub.cpp b/libc/src/math/generic/bf16sub.cpp new file mode 100644 index 0000000..65eb209 --- /dev/null +++ b/libc/src/math/generic/bf16sub.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16sub function --------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16sub.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16sub, (double x, double y)) { + return fputil::generic::sub<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16subf.cpp b/libc/src/math/generic/bf16subf.cpp new file mode 100644 index 0000000..6bba4be --- /dev/null +++ b/libc/src/math/generic/bf16subf.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16subf function -------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16subf.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16subf, (float x, float y)) { + return fputil::generic::sub<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16subf128.cpp b/libc/src/math/generic/bf16subf128.cpp new file mode 100644 index 0000000..e5fe107 --- /dev/null +++ b/libc/src/math/generic/bf16subf128.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16subf128 function ----------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16subf128.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16subf128, (float128 x, float128 y)) { + return fputil::generic::sub<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/bf16subl.cpp b/libc/src/math/generic/bf16subl.cpp new file mode 100644 index 0000000..d3a970c --- /dev/null +++ b/libc/src/math/generic/bf16subl.cpp @@ -0,0 +1,21 @@ +//===-- Implementation of bf16subl function -------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/math/bf16subl.h" +#include "src/__support/FPUtil/bfloat16.h" +#include "src/__support/FPUtil/generic/add_sub.h" +#include "src/__support/common.h" +#include "src/__support/macros/config.h" + +namespace LIBC_NAMESPACE_DECL { + +LLVM_LIBC_FUNCTION(bfloat16, bf16subl, (long double x, long double y)) { + return fputil::generic::sub<bfloat16>(x, y); +} + +} // namespace LIBC_NAMESPACE_DECL diff --git a/libc/src/math/generic/cbrtf.cpp b/libc/src/math/generic/cbrtf.cpp index 71b23c4..0bd8f71 100644 --- a/libc/src/math/generic/cbrtf.cpp +++ b/libc/src/math/generic/cbrtf.cpp @@ -7,153 +7,10 @@ //===----------------------------------------------------------------------===// #include "src/math/cbrtf.h" -#include "hdr/fenv_macros.h" -#include "src/__support/FPUtil/FEnvImpl.h" -#include "src/__support/FPUtil/FPBits.h" -#include "src/__support/FPUtil/multiply_add.h" -#include "src/__support/common.h" -#include "src/__support/macros/config.h" -#include "src/__support/macros/optimization.h" // LIBC_UNLIKELY +#include "src/__support/math/cbrtf.h" namespace LIBC_NAMESPACE_DECL { -namespace { - -// Look up table for 2^(i/3) for i = 0, 1, 2. -constexpr double CBRT2[3] = {1.0, 0x1.428a2f98d728bp0, 0x1.965fea53d6e3dp0}; - -// Degree-7 polynomials approximation of ((1 + x)^(1/3) - 1)/x for 0 <= x <= 1 -// generated by Sollya with: -// > for i from 0 to 15 do { -// P = fpminimax(((1 + x)^(1/3) - 1)/x, 6, [|D...|], [i/16, (i + 1)/16]); -// print("{", coeff(P, 0), ",", coeff(P, 1), ",", coeff(P, 2), ",", -// coeff(P, 3), ",", coeff(P, 4), ",", coeff(P, 5), ",", -// coeff(P, 6), "},"); -// }; -// Then (1 + x)^(1/3) ~ 1 + x * P(x). -constexpr double COEFFS[16][7] = { - {0x1.55555555554ebp-2, -0x1.c71c71c678c0cp-4, 0x1.f9add2776de81p-5, - -0x1.511e10aa964a7p-5, 0x1.ee44165937fa2p-6, -0x1.7c5c9e059345dp-6, - 0x1.047f75e0aff14p-6}, - {0x1.5555554d1149ap-2, -0x1.c71c676fcb5bp-4, 0x1.f9ab127dc57ebp-5, - -0x1.50ea8fd1d4c15p-5, 0x1.e9d68f28ced43p-6, -0x1.60e0e1e661311p-6, - 0x1.716eca1d6e3bcp-7}, - {0x1.5555546377d45p-2, -0x1.c71bc1c6d49d2p-4, 0x1.f9924cc0ed24dp-5, - -0x1.4fea3beb53b3bp-5, 0x1.de028a9a07b1bp-6, -0x1.3b090d2233524p-6, - 0x1.0aeca34893785p-7}, - {0x1.55554dce9f649p-2, -0x1.c7188b34b98f8p-4, 0x1.f93e1af34af49p-5, - -0x1.4d9a06be75c63p-5, 0x1.cb943f4f68992p-6, -0x1.139a685a5e3c4p-6, - 0x1.88410674c6a5dp-8}, - {0x1.5555347d211c3p-2, -0x1.c70f2a4b1a5fap-4, 0x1.f88420e8602c3p-5, - -0x1.49becfa4ed3ep-5, 0x1.b475cd9013162p-6, -0x1.dcfee1dd2f8efp-7, - 0x1.249bb51a1c498p-8}, - {0x1.5554f01b33dbap-2, -0x1.c6facb929dbf1p-4, 0x1.f73fb7861252ep-5, - -0x1.4459a4a0071fap-5, 0x1.9a8df2b504fc2p-6, -0x1.9a7ce3006d06ep-7, - 0x1.ba9230918fa2ep-9}, - {0x1.55545c695db5fp-2, -0x1.c6d6089f20275p-4, 0x1.f556e0ea80efp-5, - -0x1.3d91372d083f4p-5, 0x1.7f66cff331f4p-6, -0x1.606a562491737p-7, - 0x1.52e3e17c71069p-9}, - {0x1.55534a879232ap-2, -0x1.c69b836998b84p-4, 0x1.f2bb26dac0e4cp-5, - -0x1.359eed43716d7p-5, 0x1.64218cd824fbcp-6, -0x1.2e703e2e091e8p-7, - 0x1.0677d9af6aad4p-9}, - {0x1.5551836bb5494p-2, -0x1.c64658c15353bp-4, 0x1.ef68517451a6ep-5, - -0x1.2cc20a980dceep-5, 0x1.49843e0fad93ap-6, -0x1.03c59ccb68e54p-7, - 0x1.9ad325dc7adcbp-10}, - {0x1.554ecacb0d035p-2, -0x1.c5d2664026ffcp-4, 0x1.eb624796ba809p-5, - -0x1.233803d19a535p-5, 0x1.300decb1c3c28p-6, -0x1.befe18031ec3dp-8, - 0x1.449f5ee175c69p-10}, - {0x1.554ae1f5ae815p-2, -0x1.c53c6b14ff6b2p-4, 0x1.e6b2d5127bb5bp-5, - -0x1.19387336788a3p-5, 0x1.180955a6ab255p-6, -0x1.81696703ba369p-8, - 0x1.02cb36389bd79p-10}, - {0x1.55458a59f356ep-2, -0x1.c4820dd631ae9p-4, 0x1.e167af818bd15p-5, - -0x1.0ef35f6f72e52p-5, 0x1.019c33b65e4ebp-6, -0x1.4d25bdd52d3a5p-8, - 0x1.a008ae91f5936p-11}, - {0x1.553e878eafee1p-2, -0x1.c3a1d0b2a3db2p-4, 0x1.db90d8ed9f89bp-5, - -0x1.0490e20f1ae91p-5, 0x1.d9a5d1fc42fe3p-7, -0x1.20bf8227c2abfp-8, - 0x1.50f8174cdb6e9p-11}, - {0x1.5535a0dedf1b1p-2, -0x1.c29afb8bd01a1p-4, 0x1.d53f6371c1e27p-5, - -0x1.f463209b433e2p-6, 0x1.b35222a17e44p-7, -0x1.f5efbf505e133p-9, - 0x1.12e0e94e8586dp-11}, - {0x1.552aa25e57bfdp-2, -0x1.c16d811e4acadp-4, 0x1.ce8489b47aa51p-5, - -0x1.dfde7ff758ea8p-6, 0x1.901f43aac38c8p-7, -0x1.b581d07df5ad5p-9, - 0x1.c3726535f1fc6p-12}, - {0x1.551d5d9b204d3p-2, -0x1.c019e328f8db1p-4, 0x1.c7710f44fc3cep-5, - -0x1.cbbbe25ea8ba4p-6, 0x1.6fe270088623dp-7, -0x1.7e6fc79733761p-9, - 0x1.75077abf18d84p-12}, -}; - -} // anonymous namespace - -LLVM_LIBC_FUNCTION(float, cbrtf, (float x)) { - using FloatBits = typename fputil::FPBits<float>; - using DoubleBits = typename fputil::FPBits<double>; - - FloatBits x_bits(x); - - uint32_t x_abs = x_bits.uintval() & 0x7fff'ffff; - uint32_t sign_bit = (x_bits.uintval() >> 31) << DoubleBits::EXP_LEN; - - if (LIBC_UNLIKELY(x == 0.0f || x_abs >= 0x7f80'0000)) { - // x is 0, Inf, or NaN. - // Make sure it works for FTZ/DAZ modes. - return x + x; - } - - double xd = static_cast<double>(x); - DoubleBits xd_bits(xd); - - // When using biased exponent of x in double precision, - // x_e = real_exponent_of_x + 1023 - // Then: - // x_e / 3 = real_exponent_of_x / 3 + 1023/3 - // = real_exponent_of_x / 3 + 341 - // So to make it the correct biased exponent of x^(1/3), we add - // 1023 - 341 = 682 - // to the quotient x_e / 3. - unsigned x_e = static_cast<unsigned>(xd_bits.get_biased_exponent()); - unsigned out_e = (x_e / 3 + 682) | sign_bit; - unsigned shift_e = x_e % 3; - - // Set x_m = 2^(x_e % 3) * (1.mantissa) - uint64_t x_m = xd_bits.get_mantissa(); - // Use the leading 4 bits for look up table - unsigned idx = static_cast<unsigned>(x_m >> (DoubleBits::FRACTION_LEN - 4)); - - x_m |= static_cast<uint64_t>(DoubleBits::EXP_BIAS) - << DoubleBits::FRACTION_LEN; - - double x_reduced = DoubleBits(x_m).get_val(); - double dx = x_reduced - 1.0; - - double dx_sq = dx * dx; - double c0 = fputil::multiply_add(dx, COEFFS[idx][0], 1.0); - double c1 = fputil::multiply_add(dx, COEFFS[idx][2], COEFFS[idx][1]); - double c2 = fputil::multiply_add(dx, COEFFS[idx][4], COEFFS[idx][3]); - double c3 = fputil::multiply_add(dx, COEFFS[idx][6], COEFFS[idx][5]); - - double dx_4 = dx_sq * dx_sq; - double p0 = fputil::multiply_add(dx_sq, c1, c0); - double p1 = fputil::multiply_add(dx_sq, c3, c2); - - double r = fputil::multiply_add(dx_4, p1, p0) * CBRT2[shift_e]; - - uint64_t r_m = DoubleBits(r).get_mantissa(); - // Check if the output is exact. To be exact, the smallest 1-bit of the - // output has to be at least 2^-7 or higher. So we check the lowest 44 bits - // to see if they are within 2^(-52 + 3) errors from all zeros, then the - // result cube root is exact. - if (LIBC_UNLIKELY(((r_m + 8) & 0xfffffffffff) <= 16)) { - if ((r_m & 0xfffffffffff) <= 8) - r_m &= 0xffff'ffff'ffff'ffe0; - else - r_m = (r_m & 0xffff'ffff'ffff'ffe0) + 0x20; - fputil::clear_except_if_required(FE_INEXACT); - } - // Adjust exponent and sign. - uint64_t r_bits = - r_m | (static_cast<uint64_t>(out_e) << DoubleBits::FRACTION_LEN); - - return static_cast<float>(DoubleBits(r_bits).get_val()); -} +LLVM_LIBC_FUNCTION(float, cbrtf, (float x)) { return math::cbrtf(x); } } // namespace LIBC_NAMESPACE_DECL diff --git a/libc/test/integration/src/__support/GPU/CMakeLists.txt b/libc/test/integration/src/__support/GPU/CMakeLists.txt index e066830..1fb175b 100644 --- a/libc/test/integration/src/__support/GPU/CMakeLists.txt +++ b/libc/test/integration/src/__support/GPU/CMakeLists.txt @@ -27,3 +27,16 @@ add_integration_test( LOADER_ARGS --threads 64 ) + +add_libc_test( + fixedstack_test + SUITE + libc-support-gpu-tests + SRCS + fixedstack_test.cpp + DEPENDS + libc.src.__support.GPU.fixedstack + LOADER_ARGS + --threads 32 + --blocks 16 +) diff --git a/libc/test/integration/src/__support/GPU/fixedstack_test.cpp b/libc/test/integration/src/__support/GPU/fixedstack_test.cpp new file mode 100644 index 0000000..fde51df --- /dev/null +++ b/libc/test/integration/src/__support/GPU/fixedstack_test.cpp @@ -0,0 +1,44 @@ +//===-- Integration test for the lock-free stack --------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "src/__support/GPU/fixedstack.h" +#include "src/__support/GPU/utils.h" +#include "test/IntegrationTest/test.h" + +using namespace LIBC_NAMESPACE; + +static FixedStack<uint32_t, 2048> global_stack; + +void run() { + // We need enough space in the stack as threads in flight can temporarily + // consume memory before they finish comitting it back to the stack. + ASSERT_EQ(gpu::get_num_blocks() * gpu::get_num_threads(), 512); + + uint32_t val; + uint32_t num_threads = static_cast<uint32_t>(gpu::get_num_threads()); + for (int i = 0; i < 256; ++i) { + EXPECT_TRUE(global_stack.push(UINT32_MAX)) + EXPECT_TRUE(global_stack.pop(val)) + ASSERT_TRUE(val < num_threads || val == UINT32_MAX); + } + + EXPECT_TRUE(global_stack.push(static_cast<uint32_t>(gpu::get_thread_id()))); + EXPECT_TRUE(global_stack.push(static_cast<uint32_t>(gpu::get_thread_id()))); + EXPECT_TRUE(global_stack.pop(val)); + ASSERT_TRUE(val < num_threads || val == UINT32_MAX); + + // Fill the rest of the stack with the default value. + while (!global_stack.push(UINT32_MAX)) + ; +} + +TEST_MAIN(int argc, char **argv, char **envp) { + run(); + + return 0; +} diff --git a/libc/test/shared/CMakeLists.txt b/libc/test/shared/CMakeLists.txt index f5ea510..9685aea 100644 --- a/libc/test/shared/CMakeLists.txt +++ b/libc/test/shared/CMakeLists.txt @@ -27,6 +27,7 @@ add_fp_unittest( libc.src.__support.math.atanhf libc.src.__support.math.atanhf16 libc.src.__support.math.cbrt + libc.src.__support.math.cbrtf libc.src.__support.math.erff libc.src.__support.math.exp libc.src.__support.math.exp10 diff --git a/libc/test/shared/shared_math_test.cpp b/libc/test/shared/shared_math_test.cpp index 3d64e5e..5e57c49e 100644 --- a/libc/test/shared/shared_math_test.cpp +++ b/libc/test/shared/shared_math_test.cpp @@ -49,6 +49,7 @@ TEST(LlvmLibcSharedMathTest, AllFloat) { EXPECT_FP_EQ(0x0p+0f, LIBC_NAMESPACE::shared::atan2f(0.0f, 0.0f)); EXPECT_FP_EQ(0x0p+0f, LIBC_NAMESPACE::shared::atanf(0.0f)); EXPECT_FP_EQ(0x0p+0f, LIBC_NAMESPACE::shared::atanhf(0.0f)); + EXPECT_FP_EQ(0x0p+0f, LIBC_NAMESPACE::shared::cbrtf(0.0f)); EXPECT_FP_EQ(0x0p+0f, LIBC_NAMESPACE::shared::erff(0.0f)); EXPECT_FP_EQ(0x1p+0f, LIBC_NAMESPACE::shared::exp10f(0.0f)); EXPECT_FP_EQ(0x1p+0f, LIBC_NAMESPACE::shared::expf(0.0f)); diff --git a/libc/test/src/math/CMakeLists.txt b/libc/test/src/math/CMakeLists.txt index 43cde0d..a74f9fe 100644 --- a/libc/test/src/math/CMakeLists.txt +++ b/libc/test/src/math/CMakeLists.txt @@ -2972,6 +2972,118 @@ add_fp_unittest( libc.src.__support.macros.properties.types ) +add_fp_unittest( + bf16add_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16add_test.cpp + HDRS + AddTest.h + DEPENDS + libc.src.math.bf16add + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16addf_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16addf_test.cpp + HDRS + AddTest.h + DEPENDS + libc.src.math.bf16addf + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16addl_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16addl_test.cpp + HDRS + AddTest.h + DEPENDS + libc.src.math.bf16addl + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16addf128_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16addf128_test.cpp + HDRS + AddTest.h + DEPENDS + libc.src.math.bf16addf128 + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16sub_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16sub_test.cpp + HDRS + SubTest.h + DEPENDS + libc.src.math.bf16sub + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16subf_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16subf_test.cpp + HDRS + SubTest.h + DEPENDS + libc.src.math.bf16subf + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16subl_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16subl_test.cpp + HDRS + SubTest.h + DEPENDS + libc.src.math.bf16subl + libc.src.__support.FPUtil.bfloat16 +) + +add_fp_unittest( + bf16subf128_test + NEED_MPFR + SUITE + libc-math-unittests + SRCS + bf16subf128_test.cpp + HDRS + SubTest.h + DEPENDS + libc.src.math.bf16subf128 + libc.src.__support.FPUtil.bfloat16 +) + add_subdirectory(generic) add_subdirectory(smoke) diff --git a/libc/test/src/math/bf16add_test.cpp b/libc/test/src/math/bf16add_test.cpp new file mode 100644 index 0000000..9e9c594 --- /dev/null +++ b/libc/test/src/math/bf16add_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16add ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16add.h" + +LIST_ADD_TESTS(bfloat16, double, LIBC_NAMESPACE::bf16add) diff --git a/libc/test/src/math/bf16addf128_test.cpp b/libc/test/src/math/bf16addf128_test.cpp new file mode 100644 index 0000000..46f7ad3 --- /dev/null +++ b/libc/test/src/math/bf16addf128_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addf128 -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addf128.h" + +LIST_ADD_TESTS(bfloat16, float128, LIBC_NAMESPACE::bf16addf128) diff --git a/libc/test/src/math/bf16addf_test.cpp b/libc/test/src/math/bf16addf_test.cpp new file mode 100644 index 0000000..06d56cf --- /dev/null +++ b/libc/test/src/math/bf16addf_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addf --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addf.h" + +LIST_ADD_TESTS(bfloat16, float, LIBC_NAMESPACE::bf16addf) diff --git a/libc/test/src/math/bf16addl_test.cpp b/libc/test/src/math/bf16addl_test.cpp new file mode 100644 index 0000000..bf54827 --- /dev/null +++ b/libc/test/src/math/bf16addl_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addl --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addl.h" + +LIST_ADD_TESTS(bfloat16, long double, LIBC_NAMESPACE::bf16addl) diff --git a/libc/test/src/math/bf16sub_test.cpp b/libc/test/src/math/bf16sub_test.cpp new file mode 100644 index 0000000..4a793dc --- /dev/null +++ b/libc/test/src/math/bf16sub_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16sub ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16sub.h" + +LIST_SUB_TESTS(bfloat16, double, LIBC_NAMESPACE::bf16sub) diff --git a/libc/test/src/math/bf16subf128_test.cpp b/libc/test/src/math/bf16subf128_test.cpp new file mode 100644 index 0000000..25d6711 --- /dev/null +++ b/libc/test/src/math/bf16subf128_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subf128 -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subf128.h" + +LIST_SUB_TESTS(bfloat16, float128, LIBC_NAMESPACE::bf16subf128) diff --git a/libc/test/src/math/bf16subf_test.cpp b/libc/test/src/math/bf16subf_test.cpp new file mode 100644 index 0000000..e8c7440 --- /dev/null +++ b/libc/test/src/math/bf16subf_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subf --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subf.h" + +LIST_SUB_TESTS(bfloat16, float, LIBC_NAMESPACE::bf16subf) diff --git a/libc/test/src/math/bf16subl_test.cpp b/libc/test/src/math/bf16subl_test.cpp new file mode 100644 index 0000000..2997369 --- /dev/null +++ b/libc/test/src/math/bf16subl_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subl --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subl.h" + +LIST_SUB_TESTS(bfloat16, long double, LIBC_NAMESPACE::bf16subl) diff --git a/libc/test/src/math/smoke/CMakeLists.txt b/libc/test/src/math/smoke/CMakeLists.txt index 5f497c6..dc1850a 100644 --- a/libc/test/src/math/smoke/CMakeLists.txt +++ b/libc/test/src/math/smoke/CMakeLists.txt @@ -5465,3 +5465,131 @@ add_fp_unittest( libc.src.__support.macros.properties.os libc.src.__support.macros.properties.types ) + +add_fp_unittest( + bf16add_test + SUITE + libc-math-smoke-tests + SRCS + bf16add_test.cpp + HDRS + AddTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16add + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16addf_test + SUITE + libc-math-smoke-tests + SRCS + bf16addf_test.cpp + HDRS + AddTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16addf + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16addl_test + SUITE + libc-math-smoke-tests + SRCS + bf16addl_test.cpp + HDRS + AddTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16addl + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16addf128_test + SUITE + libc-math-smoke-tests + SRCS + bf16addf128_test.cpp + HDRS + AddTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16addf128 + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16sub_test + SUITE + libc-math-smoke-tests + SRCS + bf16sub_test.cpp + HDRS + SubTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16sub + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16subf_test + SUITE + libc-math-smoke-tests + SRCS + bf16subf_test.cpp + HDRS + SubTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16subf + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16subl_test + SUITE + libc-math-smoke-tests + SRCS + bf16subl_test.cpp + HDRS + SubTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16subl + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) + +add_fp_unittest( + bf16subf128_test + SUITE + libc-math-smoke-tests + SRCS + bf16subf128_test.cpp + HDRS + SubTest.h + DEPENDS + libc.hdr.errno_macros + libc.hdr.fenv_macros + libc.src.math.bf16subf128 + libc.src.__support.FPUtil.bfloat16 + libc.src.__support.macros.properties.os +) diff --git a/libc/test/src/math/smoke/bf16add_test.cpp b/libc/test/src/math/smoke/bf16add_test.cpp new file mode 100644 index 0000000..9e9c594 --- /dev/null +++ b/libc/test/src/math/smoke/bf16add_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16add ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16add.h" + +LIST_ADD_TESTS(bfloat16, double, LIBC_NAMESPACE::bf16add) diff --git a/libc/test/src/math/smoke/bf16addf128_test.cpp b/libc/test/src/math/smoke/bf16addf128_test.cpp new file mode 100644 index 0000000..46f7ad3 --- /dev/null +++ b/libc/test/src/math/smoke/bf16addf128_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addf128 -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addf128.h" + +LIST_ADD_TESTS(bfloat16, float128, LIBC_NAMESPACE::bf16addf128) diff --git a/libc/test/src/math/smoke/bf16addf_test.cpp b/libc/test/src/math/smoke/bf16addf_test.cpp new file mode 100644 index 0000000..06d56cf --- /dev/null +++ b/libc/test/src/math/smoke/bf16addf_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addf --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addf.h" + +LIST_ADD_TESTS(bfloat16, float, LIBC_NAMESPACE::bf16addf) diff --git a/libc/test/src/math/smoke/bf16addl_test.cpp b/libc/test/src/math/smoke/bf16addl_test.cpp new file mode 100644 index 0000000..bf54827 --- /dev/null +++ b/libc/test/src/math/smoke/bf16addl_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16addl --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "AddTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16addl.h" + +LIST_ADD_TESTS(bfloat16, long double, LIBC_NAMESPACE::bf16addl) diff --git a/libc/test/src/math/smoke/bf16sub_test.cpp b/libc/test/src/math/smoke/bf16sub_test.cpp new file mode 100644 index 0000000..4a793dc --- /dev/null +++ b/libc/test/src/math/smoke/bf16sub_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16sub ---------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16sub.h" + +LIST_SUB_TESTS(bfloat16, double, LIBC_NAMESPACE::bf16sub) diff --git a/libc/test/src/math/smoke/bf16subf128_test.cpp b/libc/test/src/math/smoke/bf16subf128_test.cpp new file mode 100644 index 0000000..25d6711 --- /dev/null +++ b/libc/test/src/math/smoke/bf16subf128_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subf128 -----------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subf128.h" + +LIST_SUB_TESTS(bfloat16, float128, LIBC_NAMESPACE::bf16subf128) diff --git a/libc/test/src/math/smoke/bf16subf_test.cpp b/libc/test/src/math/smoke/bf16subf_test.cpp new file mode 100644 index 0000000..e8c7440 --- /dev/null +++ b/libc/test/src/math/smoke/bf16subf_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subf --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subf.h" + +LIST_SUB_TESTS(bfloat16, float, LIBC_NAMESPACE::bf16subf) diff --git a/libc/test/src/math/smoke/bf16subl_test.cpp b/libc/test/src/math/smoke/bf16subl_test.cpp new file mode 100644 index 0000000..2997369 --- /dev/null +++ b/libc/test/src/math/smoke/bf16subl_test.cpp @@ -0,0 +1,14 @@ +//===-- Unittests for bf16subl --------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// + +#include "SubTest.h" + +#include "src/__support/FPUtil/bfloat16.h" +#include "src/math/bf16subl.h" + +LIST_SUB_TESTS(bfloat16, long double, LIBC_NAMESPACE::bf16subl) diff --git a/libc/utils/MPFRWrapper/MPFRUtils.cpp b/libc/utils/MPFRWrapper/MPFRUtils.cpp index ae12a83..57e818c 100644 --- a/libc/utils/MPFRWrapper/MPFRUtils.cpp +++ b/libc/utils/MPFRWrapper/MPFRUtils.cpp @@ -411,6 +411,21 @@ template void explain_binary_operation_one_output_error( #endif template void explain_binary_operation_one_output_error( Operation, const BinaryInput<bfloat16> &, bfloat16, double, RoundingMode); +template void +explain_binary_operation_one_output_error(Operation, const BinaryInput<float> &, + bfloat16, double, RoundingMode); +template void explain_binary_operation_one_output_error( + Operation, const BinaryInput<double> &, bfloat16, double, RoundingMode); +template void +explain_binary_operation_one_output_error(Operation, + const BinaryInput<long double> &, + bfloat16, double, RoundingMode); +#if defined(LIBC_TYPES_HAS_FLOAT128) && \ + defined(LIBC_TYPES_FLOAT128_IS_NOT_LONG_DOUBLE) +template void explain_binary_operation_one_output_error( + Operation, const BinaryInput<float128> &, bfloat16, double, RoundingMode); +#endif // defined(LIBC_TYPES_HAS_FLOAT128) && + // defined(LIBC_TYPES_FLOAT128_IS_NOT_LONG_DOUBLE) template <typename InputType, typename OutputType> void explain_ternary_operation_one_output_error( @@ -648,6 +663,26 @@ template bool compare_binary_operation_one_output(Operation, const BinaryInput<bfloat16> &, bfloat16, double, RoundingMode); + +template bool compare_binary_operation_one_output(Operation, + const BinaryInput<float> &, + bfloat16, double, + RoundingMode); +template bool compare_binary_operation_one_output(Operation, + const BinaryInput<double> &, + bfloat16, double, + RoundingMode); +template bool +compare_binary_operation_one_output(Operation, const BinaryInput<long double> &, + bfloat16, double, RoundingMode); +#if defined(LIBC_TYPES_HAS_FLOAT128) && \ + defined(LIBC_TYPES_FLOAT128_IS_NOT_LONG_DOUBLE) +template bool compare_binary_operation_one_output(Operation, + const BinaryInput<float128> &, + bfloat16, double, + RoundingMode); +#endif // defined(LIBC_TYPES_HAS_FLOAT128) && + // defined(LIBC_TYPES_FLOAT128_IS_NOT_LONG_DOUBLE) template <typename InputType, typename OutputType> bool compare_ternary_operation_one_output(Operation op, const TernaryInput<InputType> &input, diff --git a/libc/utils/hdrgen/hdrgen/header.py b/libc/utils/hdrgen/hdrgen/header.py index b054ed4..2118db6 100644 --- a/libc/utils/hdrgen/hdrgen/header.py +++ b/libc/utils/hdrgen/hdrgen/header.py @@ -204,7 +204,7 @@ class HeaderFile: current_guard = None for function in self.functions: - if function.guard == None: + if function.guard == None and current_guard == None: content.append(str(function) + " __NOEXCEPT;") content.append("") else: @@ -221,7 +221,8 @@ class HeaderFile: content.append(f"#endif // {current_guard}") content.append("") current_guard = function.guard - content.append(f"#ifdef {current_guard}") + if current_guard is not None: + content.append(f"#ifdef {current_guard}") content.append(str(function) + " __NOEXCEPT;") content.append("") if current_guard != None: diff --git a/libcxx/include/map b/libcxx/include/map index 6378218..9f98abe 100644 --- a/libcxx/include/map +++ b/libcxx/include/map @@ -691,12 +691,12 @@ public: # if _LIBCPP_STD_VER >= 14 template <typename _K2> _LIBCPP_HIDE_FROM_ABI bool operator()(const _K2& __x, const _CP& __y) const { - return __comp_(__x, __y.__get_value().first); + return __comp_(__x, __y.first); } template <typename _K2> _LIBCPP_HIDE_FROM_ABI bool operator()(const _CP& __x, const _K2& __y) const { - return __comp_(__x.__get_value().first, __y); + return __comp_(__x.first, __y); } # endif }; diff --git a/libcxx/test/std/containers/associative/map/map.ops/count0.pass.cpp b/libcxx/test/std/containers/associative/map/map.ops/count0.pass.cpp index c7ba765..62491e2 100644 --- a/libcxx/test/std/containers/associative/map/map.ops/count0.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.ops/count0.pass.cpp @@ -33,6 +33,10 @@ int main(int, char**) { typedef std::map<int, double, transparent_less_not_referenceable> M; assert(M().count(C2Int{5}) == 0); } + { + using M = std::map<int, double, transparent_less_nonempty>; + assert(M().count(C2Int{5}) == 0); + } return 0; } diff --git a/libcxx/test/std/containers/associative/map/map.ops/equal_range0.pass.cpp b/libcxx/test/std/containers/associative/map/map.ops/equal_range0.pass.cpp index 75724bd..57ce9339 100644 --- a/libcxx/test/std/containers/associative/map/map.ops/equal_range0.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.ops/equal_range0.pass.cpp @@ -40,6 +40,13 @@ int main(int, char**) { P result = example.equal_range(C2Int{5}); assert(result.first == result.second); } + { + using M = std::map<int, double, transparent_less_nonempty>; + using P = std::pair<typename M::iterator, typename M::iterator>; + M example; + P result = example.equal_range(C2Int{5}); + assert(result.first == result.second); + } return 0; } diff --git a/libcxx/test/std/containers/associative/map/map.ops/find0.pass.cpp b/libcxx/test/std/containers/associative/map/map.ops/find0.pass.cpp index 9825d6c..3f09d56 100644 --- a/libcxx/test/std/containers/associative/map/map.ops/find0.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.ops/find0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.find(C2Int{5}) == example.end()); } + { + using M = std::map<int, double, transparent_less_nonempty>; + M example; + assert(example.find(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/std/containers/associative/map/map.ops/lower_bound0.pass.cpp b/libcxx/test/std/containers/associative/map/map.ops/lower_bound0.pass.cpp index fe7fe38..308a2ed 100644 --- a/libcxx/test/std/containers/associative/map/map.ops/lower_bound0.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.ops/lower_bound0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.lower_bound(C2Int{5}) == example.end()); } + { + using M = std::map<int, double, transparent_less_nonempty>; + M example; + assert(example.lower_bound(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/std/containers/associative/map/map.ops/upper_bound0.pass.cpp b/libcxx/test/std/containers/associative/map/map.ops/upper_bound0.pass.cpp index 525aa67..332b71a 100644 --- a/libcxx/test/std/containers/associative/map/map.ops/upper_bound0.pass.cpp +++ b/libcxx/test/std/containers/associative/map/map.ops/upper_bound0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.upper_bound(C2Int{5}) == example.end()); } + { + using M = std::map<int, double, transparent_less_nonempty>; + M example; + assert(example.upper_bound(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp b/libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp index 233d1a1..36f0ac2 100644 --- a/libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/multimap.ops/count0.pass.cpp @@ -33,6 +33,10 @@ int main(int, char**) { typedef std::multimap<int, double, transparent_less_not_referenceable> M; assert(M().count(C2Int{5}) == 0); } + { + using M = std::multimap<int, double, transparent_less_nonempty>; + assert(M().count(C2Int{5}) == 0); + } return 0; } diff --git a/libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp b/libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp index 0bead6c..a362c03 100644 --- a/libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/multimap.ops/equal_range0.pass.cpp @@ -40,6 +40,13 @@ int main(int, char**) { P result = example.equal_range(C2Int{5}); assert(result.first == result.second); } + { + using M = std::multimap<int, double, transparent_less_nonempty>; + using P = std::pair<typename M::iterator, typename M::iterator>; + M example; + P result = example.equal_range(C2Int{5}); + assert(result.first == result.second); + } return 0; } diff --git a/libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp b/libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp index 701d4e3..ccb0900 100644 --- a/libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/multimap.ops/find0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.find(C2Int{5}) == example.end()); } + { + using M = std::multimap<int, double, transparent_less_nonempty>; + M example; + assert(example.find(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp b/libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp index 79f9948..4b48530 100644 --- a/libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/multimap.ops/lower_bound0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.lower_bound(C2Int{5}) == example.end()); } + { + using M = std::multimap<int, double, transparent_less_nonempty>; + M example; + assert(example.lower_bound(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp b/libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp index 62f5241..f2ae945 100644 --- a/libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp +++ b/libcxx/test/std/containers/associative/multimap/multimap.ops/upper_bound0.pass.cpp @@ -36,6 +36,11 @@ int main(int, char**) { M example; assert(example.upper_bound(C2Int{5}) == example.end()); } + { + using M = std::multimap<int, double, transparent_less_nonempty>; + M example; + assert(example.upper_bound(C2Int{5}) == example.end()); + } return 0; } diff --git a/libcxx/test/support/is_transparent.h b/libcxx/test/support/is_transparent.h index 700c894..4b2a458 100644 --- a/libcxx/test/support/is_transparent.h +++ b/libcxx/test/support/is_transparent.h @@ -36,6 +36,17 @@ struct transparent_less_not_referenceable using is_transparent = void () const &; // it's a type; a weird one, but a type }; +// Prevent regression when empty base class optimization is not suitable. +// See https://github.com/llvm/llvm-project/issues/152543. +struct transparent_less_nonempty { + template <class T, class U> + constexpr bool operator()(T&& t, U&& u) const { + return std::forward<T>(t) < std::forward<U>(u); + } + struct is_transparent { + } pad_; // making this comparator non-empty +}; + struct transparent_less_no_type { template <class T, class U> diff --git a/lldb/include/lldb/API/SBTarget.h b/lldb/include/lldb/API/SBTarget.h index 2776a8f..22b6c63 100644 --- a/lldb/include/lldb/API/SBTarget.h +++ b/lldb/include/lldb/API/SBTarget.h @@ -658,6 +658,14 @@ public: lldb::LanguageType symbol_language, const SBFileSpecList &module_list, const SBFileSpecList &comp_unit_list); + lldb::SBBreakpoint BreakpointCreateByName( + const char *symbol_name, + uint32_t + name_type_mask, // Logical OR one or more FunctionNameType enum bits + lldb::LanguageType symbol_language, lldb::addr_t offset, + bool offset_is_insn_count, const SBFileSpecList &module_list, + const SBFileSpecList &comp_unit_list); + #ifdef SWIG lldb::SBBreakpoint BreakpointCreateByNames( const char **symbol_name, uint32_t num_names, diff --git a/lldb/include/lldb/Breakpoint/BreakpointResolver.h b/lldb/include/lldb/Breakpoint/BreakpointResolver.h index 52cd70e..243acee 100644 --- a/lldb/include/lldb/Breakpoint/BreakpointResolver.h +++ b/lldb/include/lldb/Breakpoint/BreakpointResolver.h @@ -45,9 +45,9 @@ public: /// The breakpoint that owns this resolver. /// \param[in] resolverType /// The concrete breakpoint resolver type for this breakpoint. - BreakpointResolver(const lldb::BreakpointSP &bkpt, - unsigned char resolverType, - lldb::addr_t offset = 0); + BreakpointResolver(const lldb::BreakpointSP &bkpt, unsigned char resolverType, + lldb::addr_t offset = 0, + bool offset_is_insn_count = false); /// The Destructor is virtual, all significant breakpoint resolvers derive /// from this class. @@ -76,6 +76,7 @@ public: void SetOffset(lldb::addr_t offset); lldb::addr_t GetOffset() const { return m_offset; } + lldb::addr_t GetOffsetIsInsnCount() const { return m_offset_is_insn_count; } /// In response to this method the resolver scans all the modules in the /// breakpoint's target, and adds any new locations it finds. @@ -220,6 +221,8 @@ private: lldb::BreakpointWP m_breakpoint; // This is the breakpoint we add locations to. lldb::addr_t m_offset; // A random offset the user asked us to add to any // breakpoints we set. + bool m_offset_is_insn_count; // Use the offset as an instruction count + // instead of an address offset. // Subclass identifier (for llvm isa/dyn_cast) const unsigned char SubclassID; diff --git a/lldb/include/lldb/Breakpoint/BreakpointResolverName.h b/lldb/include/lldb/Breakpoint/BreakpointResolverName.h index c83814c..48b3eda 100644 --- a/lldb/include/lldb/Breakpoint/BreakpointResolverName.h +++ b/lldb/include/lldb/Breakpoint/BreakpointResolverName.h @@ -27,7 +27,7 @@ public: lldb::FunctionNameType name_type_mask, lldb::LanguageType language, Breakpoint::MatchType type, lldb::addr_t offset, - bool skip_prologue); + bool offset_is_insn_count, bool skip_prologue); // This one takes an array of names. It is always MatchType = Exact. BreakpointResolverName(const lldb::BreakpointSP &bkpt, const char *names[], diff --git a/lldb/include/lldb/Core/Disassembler.h b/lldb/include/lldb/Core/Disassembler.h index 21bacb1..50a5d87 100644 --- a/lldb/include/lldb/Core/Disassembler.h +++ b/lldb/include/lldb/Core/Disassembler.h @@ -291,6 +291,8 @@ public: size_t GetSize() const; + size_t GetTotalByteSize() const; + uint32_t GetMaxOpcocdeByteSize() const; lldb::InstructionSP GetInstructionAtIndex(size_t idx) const; diff --git a/lldb/include/lldb/Symbol/Symbol.h b/lldb/include/lldb/Symbol/Symbol.h index 688c8a5..0674e56 100644 --- a/lldb/include/lldb/Symbol/Symbol.h +++ b/lldb/include/lldb/Symbol/Symbol.h @@ -167,7 +167,7 @@ public: lldb::SymbolType GetType() const { return (lldb::SymbolType)m_type; } - void SetType(lldb::SymbolType type) { m_type = (lldb::SymbolType)type; } + void SetType(lldb::SymbolType type) { m_type = type; } const char *GetTypeAsString() const; diff --git a/lldb/include/lldb/Target/Target.h b/lldb/include/lldb/Target/Target.h index 7b23c8a..14a09f2 100644 --- a/lldb/include/lldb/Target/Target.h +++ b/lldb/include/lldb/Target/Target.h @@ -18,6 +18,7 @@ #include "lldb/Breakpoint/BreakpointList.h" #include "lldb/Breakpoint/BreakpointName.h" #include "lldb/Breakpoint/WatchpointList.h" +#include "lldb/Core/Address.h" #include "lldb/Core/Architecture.h" #include "lldb/Core/Disassembler.h" #include "lldb/Core/ModuleList.h" @@ -723,7 +724,7 @@ public: lldb::BreakpointSP CreateBreakpoint(lldb::addr_t load_addr, bool internal, bool request_hardware); - // Use this to create a breakpoint from a load address and a module file spec + // Use this to create a breakpoint from a file address and a module file spec lldb::BreakpointSP CreateAddressInModuleBreakpoint(lldb::addr_t file_addr, bool internal, const FileSpec &file_spec, @@ -752,8 +753,8 @@ public: const FileSpecList *containingModules, const FileSpecList *containingSourceFiles, const char *func_name, lldb::FunctionNameType func_name_type_mask, lldb::LanguageType language, - lldb::addr_t offset, LazyBool skip_prologue, bool internal, - bool request_hardware); + lldb::addr_t offset, bool offset_is_insn_count, LazyBool skip_prologue, + bool internal, bool request_hardware); lldb::BreakpointSP CreateExceptionBreakpoint(enum lldb::LanguageType language, bool catch_bp, @@ -1334,6 +1335,10 @@ public: const lldb_private::RegisterFlags &flags, uint32_t byte_size); + llvm::Expected<lldb::DisassemblerSP> + ReadInstructions(const Address &start_addr, uint32_t count, + const char *flavor_string = nullptr); + // Target Stop Hooks class StopHook : public UserID { public: diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py index 0b09893..939be99 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/dap_server.py @@ -107,17 +107,23 @@ def dump_dap_log(log_file): class Source(object): def __init__( - self, path: Optional[str] = None, source_reference: Optional[int] = None + self, + path: Optional[str] = None, + source_reference: Optional[int] = None, + raw_dict: Optional[dict[str, Any]] = None, ): self._name = None self._path = None self._source_reference = None + self._raw_dict = None if path is not None: self._name = os.path.basename(path) self._path = path elif source_reference is not None: self._source_reference = source_reference + elif raw_dict is not None: + self._raw_dict = raw_dict else: raise ValueError("Either path or source_reference must be provided") @@ -125,6 +131,9 @@ class Source(object): return f"Source(name={self.name}, path={self.path}), source_reference={self.source_reference})" def as_dict(self): + if self._raw_dict is not None: + return self._raw_dict + source_dict = {} if self._name is not None: source_dict["name"] = self._name @@ -135,6 +144,19 @@ class Source(object): return source_dict +class Breakpoint(object): + def __init__(self, obj): + self._breakpoint = obj + + def is_verified(self): + """Check if the breakpoint is verified.""" + return self._breakpoint.get("verified", False) + + def source(self): + """Get the source of the breakpoint.""" + return self._breakpoint.get("source", {}) + + class NotSupportedError(KeyError): """Raised if a feature is not supported due to its capabilities.""" @@ -170,7 +192,7 @@ class DebugCommunication(object): self.initialized = False self.frame_scopes = {} self.init_commands = init_commands - self.resolved_breakpoints = {} + self.resolved_breakpoints: dict[str, Breakpoint] = {} @classmethod def encode_content(cls, s: str) -> bytes: @@ -326,8 +348,8 @@ class DebugCommunication(object): def _update_verified_breakpoints(self, breakpoints: list[Event]): for breakpoint in breakpoints: if "id" in breakpoint: - self.resolved_breakpoints[str(breakpoint["id"])] = breakpoint.get( - "verified", False + self.resolved_breakpoints[str(breakpoint["id"])] = Breakpoint( + breakpoint ) def send_packet(self, command_dict: Request, set_sequence=True): @@ -484,7 +506,14 @@ class DebugCommunication(object): if breakpoint_event is None: break - return [id for id in breakpoint_ids if id not in self.resolved_breakpoints] + return [ + id + for id in breakpoint_ids + if ( + id not in self.resolved_breakpoints + or not self.resolved_breakpoints[id].is_verified() + ) + ] def wait_for_exited(self, timeout: Optional[float] = None): event_dict = self.wait_for_event("exited", timeout=timeout) diff --git a/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py b/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py index 1567462..c51b4b1 100644 --- a/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py +++ b/lldb/packages/Python/lldbsuite/test/tools/lldb-dap/lldbdap_testcase.py @@ -59,24 +59,22 @@ class DAPTestCaseBase(TestBase): Each object in data is 1:1 mapping with the entry in lines. It contains optional location/hitCondition/logMessage parameters. """ - response = self.dap_server.request_setBreakpoints( - Source(source_path), lines, data + return self.set_source_breakpoints_from_source( + Source(path=source_path), lines, data, wait_for_resolve ) - if response is None or not response["success"]: - return [] - breakpoints = response["body"]["breakpoints"] - breakpoint_ids = [] - for breakpoint in breakpoints: - breakpoint_ids.append("%i" % (breakpoint["id"])) - if wait_for_resolve: - self.wait_for_breakpoints_to_resolve(breakpoint_ids) - return breakpoint_ids def set_source_breakpoints_assembly( self, source_reference, lines, data=None, wait_for_resolve=True ): + return self.set_source_breakpoints_from_source( + Source(source_reference=source_reference), lines, data, wait_for_resolve + ) + + def set_source_breakpoints_from_source( + self, source: Source, lines, data=None, wait_for_resolve=True + ): response = self.dap_server.request_setBreakpoints( - Source(source_reference=source_reference), + source, lines, data, ) diff --git a/lldb/source/API/SBTarget.cpp b/lldb/source/API/SBTarget.cpp index f26f795..6aa41c5 100644 --- a/lldb/source/API/SBTarget.cpp +++ b/lldb/source/API/SBTarget.cpp @@ -766,16 +766,19 @@ SBBreakpoint SBTarget::BreakpointCreateByName(const char *symbol_name, const bool hardware = false; const LazyBool skip_prologue = eLazyBoolCalculate; const lldb::addr_t offset = 0; + const bool offset_is_insn_count = false; if (module_name && module_name[0]) { FileSpecList module_spec_list; module_spec_list.Append(FileSpec(module_name)); sb_bp = target_sp->CreateBreakpoint( &module_spec_list, nullptr, symbol_name, eFunctionNameTypeAuto, - eLanguageTypeUnknown, offset, skip_prologue, internal, hardware); + eLanguageTypeUnknown, offset, offset_is_insn_count, skip_prologue, + internal, hardware); } else { sb_bp = target_sp->CreateBreakpoint( nullptr, nullptr, symbol_name, eFunctionNameTypeAuto, - eLanguageTypeUnknown, offset, skip_prologue, internal, hardware); + eLanguageTypeUnknown, offset, offset_is_insn_count, skip_prologue, + internal, hardware); } } @@ -811,6 +814,17 @@ lldb::SBBreakpoint SBTarget::BreakpointCreateByName( const SBFileSpecList &comp_unit_list) { LLDB_INSTRUMENT_VA(this, symbol_name, name_type_mask, symbol_language, module_list, comp_unit_list); + return BreakpointCreateByName(symbol_name, name_type_mask, symbol_language, 0, + false, module_list, comp_unit_list); +} + +lldb::SBBreakpoint SBTarget::BreakpointCreateByName( + const char *symbol_name, uint32_t name_type_mask, + LanguageType symbol_language, lldb::addr_t offset, + bool offset_is_insn_count, const SBFileSpecList &module_list, + const SBFileSpecList &comp_unit_list) { + LLDB_INSTRUMENT_VA(this, symbol_name, name_type_mask, symbol_language, offset, + offset_is_insn_count, module_list, comp_unit_list); SBBreakpoint sb_bp; if (TargetSP target_sp = GetSP(); @@ -821,7 +835,8 @@ lldb::SBBreakpoint SBTarget::BreakpointCreateByName( std::lock_guard<std::recursive_mutex> guard(target_sp->GetAPIMutex()); FunctionNameType mask = static_cast<FunctionNameType>(name_type_mask); sb_bp = target_sp->CreateBreakpoint(module_list.get(), comp_unit_list.get(), - symbol_name, mask, symbol_language, 0, + symbol_name, mask, symbol_language, + offset, offset_is_insn_count, skip_prologue, internal, hardware); } @@ -1955,29 +1970,10 @@ lldb::SBInstructionList SBTarget::ReadInstructions(lldb::SBAddress base_addr, if (TargetSP target_sp = GetSP()) { if (Address *addr_ptr = base_addr.get()) { - DataBufferHeap data( - target_sp->GetArchitecture().GetMaximumOpcodeByteSize() * count, 0); - bool force_live_memory = true; - lldb_private::Status error; - lldb::addr_t load_addr = LLDB_INVALID_ADDRESS; - const size_t bytes_read = - target_sp->ReadMemory(*addr_ptr, data.GetBytes(), data.GetByteSize(), - error, force_live_memory, &load_addr); - - const bool data_from_file = load_addr == LLDB_INVALID_ADDRESS; - if (!flavor_string || flavor_string[0] == '\0') { - // FIXME - we don't have the mechanism in place to do per-architecture - // settings. But since we know that for now we only support flavors on - // x86 & x86_64, - const llvm::Triple::ArchType arch = - target_sp->GetArchitecture().GetTriple().getArch(); - if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64) - flavor_string = target_sp->GetDisassemblyFlavor(); + if (llvm::Expected<DisassemblerSP> disassembler = + target_sp->ReadInstructions(*addr_ptr, count, flavor_string)) { + sb_instructions.SetDisassembler(*disassembler); } - sb_instructions.SetDisassembler(Disassembler::DisassembleBytes( - target_sp->GetArchitecture(), nullptr, flavor_string, - target_sp->GetDisassemblyCPU(), target_sp->GetDisassemblyFeatures(), - *addr_ptr, data.GetBytes(), bytes_read, count, data_from_file)); } } diff --git a/lldb/source/Breakpoint/BreakpointResolver.cpp b/lldb/source/Breakpoint/BreakpointResolver.cpp index 91fdff4..4ac4050 100644 --- a/lldb/source/Breakpoint/BreakpointResolver.cpp +++ b/lldb/source/Breakpoint/BreakpointResolver.cpp @@ -42,9 +42,9 @@ const char *BreakpointResolver::g_ty_to_name[] = {"FileAndLine", "Address", const char *BreakpointResolver::g_option_names[static_cast<uint32_t>( BreakpointResolver::OptionNames::LastOptionName)] = { - "AddressOffset", "Exact", "FileName", "Inlines", "Language", - "LineNumber", "Column", "ModuleName", "NameMask", "Offset", - "PythonClass", "Regex", "ScriptArgs", "SectionName", "SearchDepth", + "AddressOffset", "Exact", "FileName", "Inlines", "Language", + "LineNumber", "Column", "ModuleName", "NameMask", "Offset", + "PythonClass", "Regex", "ScriptArgs", "SectionName", "SearchDepth", "SkipPrologue", "SymbolNames"}; const char *BreakpointResolver::ResolverTyToName(enum ResolverTy type) { @@ -65,8 +65,10 @@ BreakpointResolver::NameToResolverTy(llvm::StringRef name) { BreakpointResolver::BreakpointResolver(const BreakpointSP &bkpt, const unsigned char resolverTy, - lldb::addr_t offset) - : m_breakpoint(bkpt), m_offset(offset), SubclassID(resolverTy) {} + lldb::addr_t offset, + bool offset_is_insn_count) + : m_breakpoint(bkpt), m_offset(offset), + m_offset_is_insn_count(offset_is_insn_count), SubclassID(resolverTy) {} BreakpointResolver::~BreakpointResolver() = default; @@ -364,7 +366,32 @@ void BreakpointResolver::AddLocation(SearchFilter &filter, BreakpointLocationSP BreakpointResolver::AddLocation(Address loc_addr, bool *new_location) { - loc_addr.Slide(m_offset); + if (m_offset_is_insn_count) { + Target &target = GetBreakpoint()->GetTarget(); + llvm::Expected<DisassemblerSP> expected_instructions = + target.ReadInstructions(loc_addr, m_offset); + if (!expected_instructions) { + LLDB_LOG_ERROR(GetLog(LLDBLog::Breakpoints), + expected_instructions.takeError(), + "error: Unable to read instructions at address 0x{0:x}", + loc_addr.GetLoadAddress(&target)); + return BreakpointLocationSP(); + } + + const DisassemblerSP instructions = *expected_instructions; + if (!instructions || + instructions->GetInstructionList().GetSize() != m_offset) { + LLDB_LOG(GetLog(LLDBLog::Breakpoints), + "error: Unable to read {0} instructions at address 0x{1:x}", + m_offset, loc_addr.GetLoadAddress(&target)); + return BreakpointLocationSP(); + } + + loc_addr.Slide(instructions->GetInstructionList().GetTotalByteSize()); + } else { + loc_addr.Slide(m_offset); + } + return GetBreakpoint()->AddLocation(loc_addr, new_location); } diff --git a/lldb/source/Breakpoint/BreakpointResolverAddress.cpp b/lldb/source/Breakpoint/BreakpointResolverAddress.cpp index 828647c..70360d9 100644 --- a/lldb/source/Breakpoint/BreakpointResolverAddress.cpp +++ b/lldb/source/Breakpoint/BreakpointResolverAddress.cpp @@ -133,6 +133,11 @@ Searcher::CallbackReturn BreakpointResolverAddress::SearchCallback( Address tmp_address; if (module_sp->ResolveFileAddress(m_addr.GetOffset(), tmp_address)) m_addr = tmp_address; + else + return Searcher::eCallbackReturnStop; + } else { + // If we didn't find the module, then we can't resolve the address. + return Searcher::eCallbackReturnStop; } } diff --git a/lldb/source/Breakpoint/BreakpointResolverName.cpp b/lldb/source/Breakpoint/BreakpointResolverName.cpp index 21024a4..6372595 100644 --- a/lldb/source/Breakpoint/BreakpointResolverName.cpp +++ b/lldb/source/Breakpoint/BreakpointResolverName.cpp @@ -24,11 +24,13 @@ using namespace lldb; using namespace lldb_private; -BreakpointResolverName::BreakpointResolverName(const BreakpointSP &bkpt, - const char *name_cstr, FunctionNameType name_type_mask, - LanguageType language, Breakpoint::MatchType type, lldb::addr_t offset, +BreakpointResolverName::BreakpointResolverName( + const BreakpointSP &bkpt, const char *name_cstr, + FunctionNameType name_type_mask, LanguageType language, + Breakpoint::MatchType type, lldb::addr_t offset, bool offset_is_insn_count, bool skip_prologue) - : BreakpointResolver(bkpt, BreakpointResolver::NameResolver, offset), + : BreakpointResolver(bkpt, BreakpointResolver::NameResolver, offset, + offset_is_insn_count), m_match_type(type), m_language(language), m_skip_prologue(skip_prologue) { if (m_match_type == Breakpoint::Regexp) { m_regex = RegularExpression(name_cstr); @@ -81,7 +83,7 @@ BreakpointResolverName::BreakpointResolverName(const BreakpointSP &bkpt, BreakpointResolverName::BreakpointResolverName( const BreakpointResolverName &rhs) : BreakpointResolver(rhs.GetBreakpoint(), BreakpointResolver::NameResolver, - rhs.GetOffset()), + rhs.GetOffset(), rhs.GetOffsetIsInsnCount()), m_lookups(rhs.m_lookups), m_class_name(rhs.m_class_name), m_regex(rhs.m_regex), m_match_type(rhs.m_match_type), m_language(rhs.m_language), m_skip_prologue(rhs.m_skip_prologue) {} @@ -177,7 +179,8 @@ BreakpointResolverSP BreakpointResolverName::CreateFromStructuredData( std::shared_ptr<BreakpointResolverName> resolver_sp = std::make_shared<BreakpointResolverName>( nullptr, names[0].c_str(), name_masks[0], language, - Breakpoint::MatchType::Exact, offset, skip_prologue); + Breakpoint::MatchType::Exact, offset, + /*offset_is_insn_count = */ false, skip_prologue); for (size_t i = 1; i < num_elem; i++) { resolver_sp->AddNameLookup(ConstString(names[i]), name_masks[i]); } diff --git a/lldb/source/Core/Disassembler.cpp b/lldb/source/Core/Disassembler.cpp index 925de2a..e0a7d69 100644 --- a/lldb/source/Core/Disassembler.cpp +++ b/lldb/source/Core/Disassembler.cpp @@ -1016,6 +1016,16 @@ uint32_t InstructionList::GetMaxOpcocdeByteSize() const { return max_inst_size; } +size_t InstructionList::GetTotalByteSize() const { + size_t total_byte_size = 0; + collection::const_iterator pos, end; + for (pos = m_instructions.begin(), end = m_instructions.end(); pos != end; + ++pos) { + total_byte_size += (*pos)->GetOpcode().GetByteSize(); + } + return total_byte_size; +} + InstructionSP InstructionList::GetInstructionAtIndex(size_t idx) const { InstructionSP inst_sp; if (idx < m_instructions.size()) diff --git a/lldb/source/Expression/IRExecutionUnit.cpp b/lldb/source/Expression/IRExecutionUnit.cpp index e7a26d3..d557084 100644 --- a/lldb/source/Expression/IRExecutionUnit.cpp +++ b/lldb/source/Expression/IRExecutionUnit.cpp @@ -799,7 +799,7 @@ ResolveFunctionCallLabel(const FunctionCallLabel &label, auto sc_or_err = symbol_file->ResolveFunctionCallLabel(label); if (!sc_or_err) return llvm::joinErrors( - llvm::createStringError("failed to resolve function by UID"), + llvm::createStringError("failed to resolve function by UID:"), sc_or_err.takeError()); SymbolContextList sc_list; diff --git a/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp b/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp index fe9f5d0..1d210ea 100644 --- a/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp +++ b/lldb/source/Plugins/DynamicLoader/Darwin-Kernel/DynamicLoaderDarwinKernel.cpp @@ -1561,7 +1561,8 @@ void DynamicLoaderDarwinKernel::SetNotificationBreakpointIfNeeded() { .CreateBreakpoint(&module_spec_list, nullptr, "OSKextLoadedKextSummariesUpdated", eFunctionNameTypeFull, eLanguageTypeUnknown, 0, - skip_prologue, internal_bp, hardware) + /*offset_is_insn_count = */ false, skip_prologue, + internal_bp, hardware) .get(); bp->SetCallback(DynamicLoaderDarwinKernel::BreakpointHitCallback, this, diff --git a/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp b/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp index 08bef49..efb9ccc 100644 --- a/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp +++ b/lldb/source/Plugins/DynamicLoader/MacOSX-DYLD/DynamicLoaderMacOS.cpp @@ -530,7 +530,7 @@ bool DynamicLoaderMacOS::SetNotificationBreakpoint() { m_process->GetTarget() .CreateBreakpoint(&dyld_filelist, source_files, "lldb_image_notifier", eFunctionNameTypeFull, - eLanguageTypeUnknown, 0, skip_prologue, + eLanguageTypeUnknown, 0, false, skip_prologue, internal, hardware) .get(); breakpoint->SetCallback(DynamicLoaderMacOS::NotifyBreakpointHit, this, @@ -546,8 +546,9 @@ bool DynamicLoaderMacOS::SetNotificationBreakpoint() { m_process->GetTarget() .CreateBreakpoint(&dyld_filelist, source_files, "gdb_image_notifier", eFunctionNameTypeFull, - eLanguageTypeUnknown, 0, skip_prologue, - internal, hardware) + eLanguageTypeUnknown, 0, + /*offset_is_insn_count = */ false, + skip_prologue, internal, hardware) .get(); breakpoint->SetCallback(DynamicLoaderMacOS::NotifyBreakpointHit, this, true); diff --git a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp index 24a7371..b1f2a66 100644 --- a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp +++ b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV1.cpp @@ -102,7 +102,7 @@ AppleObjCRuntimeV1::CreateExceptionResolver(const BreakpointSP &bkpt, resolver_sp = std::make_shared<BreakpointResolverName>( bkpt, std::get<1>(GetExceptionThrowLocation()).AsCString(), eFunctionNameTypeBase, eLanguageTypeUnknown, Breakpoint::Exact, 0, - eLazyBoolNo); + /*offset_is_insn_count = */ false, eLazyBoolNo); // FIXME: don't do catch yet. return resolver_sp; } diff --git a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp index cca721e..9beb133 100644 --- a/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp +++ b/lldb/source/Plugins/LanguageRuntime/ObjC/AppleObjCRuntime/AppleObjCRuntimeV2.cpp @@ -1163,7 +1163,7 @@ AppleObjCRuntimeV2::CreateExceptionResolver(const BreakpointSP &bkpt, resolver_sp = std::make_shared<BreakpointResolverName>( bkpt, std::get<1>(GetExceptionThrowLocation()).AsCString(), eFunctionNameTypeBase, eLanguageTypeUnknown, Breakpoint::Exact, 0, - eLazyBoolNo); + /*offset_is_insn_count = */ false, eLazyBoolNo); // FIXME: We don't do catch breakpoints for ObjC yet. // Should there be some way for the runtime to specify what it can do in this // regard? diff --git a/lldb/source/Plugins/LanguageRuntime/ObjC/GNUstepObjCRuntime/GNUstepObjCRuntime.cpp b/lldb/source/Plugins/LanguageRuntime/ObjC/GNUstepObjCRuntime/GNUstepObjCRuntime.cpp index a4b3e26..8dc5f51 100644 --- a/lldb/source/Plugins/LanguageRuntime/ObjC/GNUstepObjCRuntime/GNUstepObjCRuntime.cpp +++ b/lldb/source/Plugins/LanguageRuntime/ObjC/GNUstepObjCRuntime/GNUstepObjCRuntime.cpp @@ -169,7 +169,8 @@ GNUstepObjCRuntime::CreateExceptionResolver(const BreakpointSP &bkpt, if (throw_bp) resolver_sp = std::make_shared<BreakpointResolverName>( bkpt, "objc_exception_throw", eFunctionNameTypeBase, - eLanguageTypeUnknown, Breakpoint::Exact, 0, eLazyBoolNo); + eLanguageTypeUnknown, Breakpoint::Exact, 0, + /*offset_is_insn_count = */ false, eLazyBoolNo); return resolver_sp; } diff --git a/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp b/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp index 27ac5432..a2a287a 100644 --- a/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp +++ b/lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.cpp @@ -405,15 +405,33 @@ Expected<llvm::StringRef> PythonString::AsUTF8() const { if (!IsValid()) return nullDeref(); - Py_ssize_t size; - const char *data; + // PyUnicode_AsUTF8AndSize caches the UTF-8 representation of the string in + // the Unicode object, which makes it more efficient and ties the lifetime of + // the data to the Python string. However, it was only added to the Stable API + // in Python 3.10. Older versions that want to use the Stable API must use + // PyUnicode_AsUTF8String in combination with ConstString. +#if defined(Py_LIMITED_API) && (Py_LIMITED_API < 0x030a0000) + PyObject *py_bytes = PyUnicode_AsUTF8String(m_py_obj); + if (!py_bytes) + return exception(); + auto release_py_str = + llvm::make_scope_exit([py_bytes] { Py_DECREF(py_bytes); }); + Py_ssize_t size = PyBytes_Size(py_bytes); + const char *str = PyBytes_AsString(py_bytes); + + if (!str) + return exception(); - data = PyUnicode_AsUTF8AndSize(m_py_obj, &size); + return ConstString(str, size).GetStringRef(); +#else + Py_ssize_t size; + const char *str = PyUnicode_AsUTF8AndSize(m_py_obj, &size); - if (!data) + if (!str) return exception(); - return llvm::StringRef(data, size); + return llvm::StringRef(str, size); +#endif } size_t PythonString::GetSize() const { diff --git a/lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp b/lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp index 24d604f..5b97fcb 100644 --- a/lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp +++ b/lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.cpp @@ -92,25 +92,6 @@ namespace { struct InitializePythonRAII { public: InitializePythonRAII() { - PyConfig config; - PyConfig_InitPythonConfig(&config); - -#if LLDB_EMBED_PYTHON_HOME - static std::string g_python_home = []() -> std::string { - if (llvm::sys::path::is_absolute(LLDB_PYTHON_HOME)) - return LLDB_PYTHON_HOME; - - FileSpec spec = HostInfo::GetShlibDir(); - if (!spec) - return {}; - spec.AppendPathComponent(LLDB_PYTHON_HOME); - return spec.GetPath(); - }(); - if (!g_python_home.empty()) { - PyConfig_SetBytesString(&config, &config.home, g_python_home.c_str()); - } -#endif - // The table of built-in modules can only be extended before Python is // initialized. if (!Py_IsInitialized()) { @@ -134,9 +115,30 @@ public: PyImport_AppendInittab("_lldb", LLDBSwigPyInit); } +#if LLDB_EMBED_PYTHON_HOME + PyConfig config; + PyConfig_InitPythonConfig(&config); + + static std::string g_python_home = []() -> std::string { + if (llvm::sys::path::is_absolute(LLDB_PYTHON_HOME)) + return LLDB_PYTHON_HOME; + + FileSpec spec = HostInfo::GetShlibDir(); + if (!spec) + return {}; + spec.AppendPathComponent(LLDB_PYTHON_HOME); + return spec.GetPath(); + }(); + if (!g_python_home.empty()) { + PyConfig_SetBytesString(&config, &config.home, g_python_home.c_str()); + } + config.install_signal_handlers = 0; Py_InitializeFromConfig(&config); PyConfig_Clear(&config); +#else + Py_InitializeEx(/*install_sigs=*/0); +#endif // The only case we should go further and acquire the GIL: it is unlocked. PyGILState_STATE gil_state = PyGILState_Ensure(); diff --git a/lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp b/lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp index 867f6a6..70093c9 100644 --- a/lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp +++ b/lldb/source/Plugins/StructuredData/DarwinLog/StructuredDataDarwinLog.cpp @@ -1601,6 +1601,7 @@ void StructuredDataDarwinLog::AddInitCompletionHook(Process &process) { const char *func_name = "_libtrace_init"; const lldb::addr_t offset = 0; + const bool offset_is_insn_count = false; const LazyBool skip_prologue = eLazyBoolCalculate; // This is an internal breakpoint - the user shouldn't see it. const bool internal = true; @@ -1608,7 +1609,8 @@ void StructuredDataDarwinLog::AddInitCompletionHook(Process &process) { auto breakpoint_sp = target.CreateBreakpoint( &module_spec_list, source_spec_list, func_name, eFunctionNameTypeFull, - eLanguageTypeC, offset, skip_prologue, internal, hardware); + eLanguageTypeC, offset, offset_is_insn_count, skip_prologue, internal, + hardware); if (!breakpoint_sp) { // Huh? Bail here. LLDB_LOGF(log, diff --git a/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp b/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp index 84b3da3..9958af2 100644 --- a/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp +++ b/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.cpp @@ -2483,6 +2483,30 @@ bool SymbolFileDWARF::ResolveFunction(const DWARFDIE &orig_die, return false; } +DWARFDIE +SymbolFileDWARF::FindFunctionDefinition(const FunctionCallLabel &label) { + DWARFDIE definition; + Module::LookupInfo info(ConstString(label.lookup_name), + lldb::eFunctionNameTypeFull, + lldb::eLanguageTypeUnknown); + + m_index->GetFunctions(info, *this, {}, [&](DWARFDIE entry) { + if (entry.GetAttributeValueAsUnsigned(llvm::dwarf::DW_AT_declaration, 0)) + return IterationAction::Continue; + + // We don't check whether the specification DIE for this function + // corresponds to the declaration DIE because the declaration might be in + // a type-unit but the definition in the compile-unit (and it's + // specifcation would point to the declaration in the compile-unit). We + // rely on the mangled name within the module to be enough to find us the + // unique definition. + definition = entry; + return IterationAction::Stop; + }); + + return definition; +} + llvm::Expected<SymbolContext> SymbolFileDWARF::ResolveFunctionCallLabel(const FunctionCallLabel &label) { std::lock_guard<std::recursive_mutex> guard(GetModuleMutex()); @@ -2495,37 +2519,19 @@ SymbolFileDWARF::ResolveFunctionCallLabel(const FunctionCallLabel &label) { // Label was created using a declaration DIE. Need to fetch the definition // to resolve the function call. if (die.GetAttributeValueAsUnsigned(llvm::dwarf::DW_AT_declaration, 0)) { - Module::LookupInfo info(ConstString(label.lookup_name), - lldb::eFunctionNameTypeFull, - lldb::eLanguageTypeUnknown); - - m_index->GetFunctions(info, *this, {}, [&](DWARFDIE entry) { - if (entry.GetAttributeValueAsUnsigned(llvm::dwarf::DW_AT_declaration, 0)) - return IterationAction::Continue; - - // We don't check whether the specification DIE for this function - // corresponds to the declaration DIE because the declaration might be in - // a type-unit but the definition in the compile-unit (and it's - // specifcation would point to the declaration in the compile-unit). We - // rely on the mangled name within the module to be enough to find us the - // unique definition. - die = entry; - return IterationAction::Stop; - }); + auto definition = FindFunctionDefinition(label); + if (!definition) + return llvm::createStringError("failed to find definition DIE"); - if (die.GetAttributeValueAsUnsigned(llvm::dwarf::DW_AT_declaration, 0)) - return llvm::createStringError( - llvm::formatv("failed to find definition DIE for {0}", label)); + die = std::move(definition); } SymbolContextList sc_list; if (!ResolveFunction(die, /*include_inlines=*/false, sc_list)) - return llvm::createStringError( - llvm::formatv("failed to resolve function for {0}", label)); + return llvm::createStringError("failed to resolve function"); if (sc_list.IsEmpty()) - return llvm::createStringError( - llvm::formatv("failed to find function for {0}", label)); + return llvm::createStringError("failed to find function"); assert(sc_list.GetSize() == 1); diff --git a/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h b/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h index 5042d91..d7db8a3 100644 --- a/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h +++ b/lldb/source/Plugins/SymbolFile/DWARF/SymbolFileDWARF.h @@ -373,6 +373,13 @@ public: /// Returns the DWARFIndex for this symbol, if it exists. DWARFIndex *getIndex() { return m_index.get(); } +private: + /// Find the definition DIE for the specified \c label in this + /// SymbolFile. + /// + /// \returns A valid definition DIE on success. + DWARFDIE FindFunctionDefinition(const FunctionCallLabel &label); + protected: SymbolFileDWARF(const SymbolFileDWARF &) = delete; const SymbolFileDWARF &operator=(const SymbolFileDWARF &) = delete; diff --git a/lldb/source/Target/Target.cpp b/lldb/source/Target/Target.cpp index 4f39f60..fa98c24 100644 --- a/lldb/source/Target/Target.cpp +++ b/lldb/source/Target/Target.cpp @@ -558,10 +558,11 @@ BreakpointSP Target::CreateBreakpoint(lldb::addr_t addr, bool internal, BreakpointSP Target::CreateBreakpoint(const Address &addr, bool internal, bool hardware) { - SearchFilterSP filter_sp( - new SearchFilterForUnconstrainedSearches(shared_from_this())); - BreakpointResolverSP resolver_sp( - new BreakpointResolverAddress(nullptr, addr)); + SearchFilterSP filter_sp = + std::make_shared<SearchFilterForUnconstrainedSearches>( + shared_from_this()); + BreakpointResolverSP resolver_sp = + std::make_shared<BreakpointResolverAddress>(nullptr, addr); return CreateBreakpoint(filter_sp, resolver_sp, internal, hardware, false); } @@ -569,10 +570,12 @@ lldb::BreakpointSP Target::CreateAddressInModuleBreakpoint(lldb::addr_t file_addr, bool internal, const FileSpec &file_spec, bool request_hardware) { - SearchFilterSP filter_sp( - new SearchFilterForUnconstrainedSearches(shared_from_this())); - BreakpointResolverSP resolver_sp(new BreakpointResolverAddress( - nullptr, file_addr, file_spec)); + SearchFilterSP filter_sp = + std::make_shared<SearchFilterForUnconstrainedSearches>( + shared_from_this()); + BreakpointResolverSP resolver_sp = + std::make_shared<BreakpointResolverAddress>(nullptr, file_addr, + file_spec); return CreateBreakpoint(filter_sp, resolver_sp, internal, request_hardware, false); } @@ -581,7 +584,8 @@ BreakpointSP Target::CreateBreakpoint( const FileSpecList *containingModules, const FileSpecList *containingSourceFiles, const char *func_name, FunctionNameType func_name_type_mask, LanguageType language, - lldb::addr_t offset, LazyBool skip_prologue, bool internal, bool hardware) { + lldb::addr_t offset, bool offset_is_insn_count, LazyBool skip_prologue, + bool internal, bool hardware) { BreakpointSP bp_sp; if (func_name) { SearchFilterSP filter_sp(GetSearchFilterForModuleAndCUList( @@ -594,7 +598,7 @@ BreakpointSP Target::CreateBreakpoint( BreakpointResolverSP resolver_sp(new BreakpointResolverName( nullptr, func_name, func_name_type_mask, language, Breakpoint::Exact, - offset, skip_prologue)); + offset, offset_is_insn_count, skip_prologue)); bp_sp = CreateBreakpoint(filter_sp, resolver_sp, internal, hardware, true); } return bp_sp; @@ -2996,6 +3000,38 @@ lldb::addr_t Target::GetBreakableLoadAddress(lldb::addr_t addr) { return arch_plugin ? arch_plugin->GetBreakableLoadAddress(addr, *this) : addr; } +llvm::Expected<lldb::DisassemblerSP> +Target::ReadInstructions(const Address &start_addr, uint32_t count, + const char *flavor_string) { + DataBufferHeap data(GetArchitecture().GetMaximumOpcodeByteSize() * count, 0); + bool force_live_memory = true; + lldb_private::Status error; + lldb::addr_t load_addr = LLDB_INVALID_ADDRESS; + const size_t bytes_read = + ReadMemory(start_addr, data.GetBytes(), data.GetByteSize(), error, + force_live_memory, &load_addr); + + if (error.Fail()) + return llvm::createStringError( + error.AsCString("Target::ReadInstructions failed to read memory at %s"), + start_addr.GetLoadAddress(this)); + + const bool data_from_file = load_addr == LLDB_INVALID_ADDRESS; + if (!flavor_string || flavor_string[0] == '\0') { + // FIXME - we don't have the mechanism in place to do per-architecture + // settings. But since we know that for now we only support flavors on + // x86 & x86_64, + const llvm::Triple::ArchType arch = GetArchitecture().GetTriple().getArch(); + if (arch == llvm::Triple::x86 || arch == llvm::Triple::x86_64) + flavor_string = GetDisassemblyFlavor(); + } + + return Disassembler::DisassembleBytes( + GetArchitecture(), nullptr, flavor_string, GetDisassemblyCPU(), + GetDisassemblyFeatures(), start_addr, data.GetBytes(), bytes_read, count, + data_from_file); +} + SourceManager &Target::GetSourceManager() { if (!m_source_manager_up) m_source_manager_up = std::make_unique<SourceManager>(shared_from_this()); diff --git a/lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py b/lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py index 674bfe4..7552a77 100644 --- a/lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py +++ b/lldb/test/API/tools/lldb-dap/breakpoint-assembly/TestDAP_breakpointAssembly.py @@ -83,3 +83,79 @@ class TestDAP_setBreakpointsAssembly(lldbdap_testcase.DAPTestCaseBase): break_point["message"], "Invalid sourceReference.", ) + + @skipIfWindows + def test_persistent_assembly_breakpoint(self): + """Tests that assembly breakpoints are working persistently across sessions""" + self.build() + program = self.getBuildArtifact("a.out") + self.create_debug_adapter() + + # Run the first session and set a persistent assembly breakpoint + try: + self.dap_server.request_initialize() + self.dap_server.request_launch(program) + + assmebly_func_breakpoints = self.set_function_breakpoints(["assembly_func"]) + self.continue_to_breakpoints(assmebly_func_breakpoints) + + assembly_func_frame = self.get_stackFrames()[0] + source_reference = assembly_func_frame["source"]["sourceReference"] + + # Set an assembly breakpoint in the middle of the assembly function + persistent_breakpoint_line = 4 + persistent_breakpoint_ids = self.set_source_breakpoints_assembly( + source_reference, [persistent_breakpoint_line] + ) + + self.assertEqual( + len(persistent_breakpoint_ids), + 1, + "Expected one assembly breakpoint to be set", + ) + + persistent_breakpoint_source = self.dap_server.resolved_breakpoints[ + persistent_breakpoint_ids[0] + ].source() + self.assertIn( + "adapterData", + persistent_breakpoint_source, + "Expected assembly breakpoint to have persistent information", + ) + self.assertIn( + "persistenceData", + persistent_breakpoint_source["adapterData"], + "Expected assembly breakpoint to have persistent information", + ) + + self.continue_to_breakpoints(persistent_breakpoint_ids) + finally: + self.dap_server.request_disconnect(terminateDebuggee=True) + self.dap_server.terminate() + + # Restart the session and verify the breakpoint is still there + self.create_debug_adapter() + try: + self.dap_server.request_initialize() + self.dap_server.request_launch(program) + new_session_breakpoints_ids = self.set_source_breakpoints_from_source( + Source(raw_dict=persistent_breakpoint_source), + [persistent_breakpoint_line], + ) + + self.assertEqual( + len(new_session_breakpoints_ids), + 1, + "Expected one breakpoint to be set in the new session", + ) + + self.continue_to_breakpoints(new_session_breakpoints_ids) + current_line = self.get_stackFrames()[0]["line"] + self.assertEqual( + current_line, + persistent_breakpoint_line, + "Expected to hit the persistent assembly breakpoint at the same line", + ) + finally: + self.dap_server.request_disconnect(terminateDebuggee=True) + self.dap_server.terminate() diff --git a/lldb/tools/lldb-dap/Breakpoint.cpp b/lldb/tools/lldb-dap/Breakpoint.cpp index b4e593e..c803957 100644 --- a/lldb/tools/lldb-dap/Breakpoint.cpp +++ b/lldb/tools/lldb-dap/Breakpoint.cpp @@ -8,10 +8,14 @@ #include "Breakpoint.h" #include "DAP.h" +#include "LLDBUtils.h" +#include "Protocol/DAPTypes.h" #include "ProtocolUtils.h" #include "lldb/API/SBAddress.h" #include "lldb/API/SBBreakpointLocation.h" +#include "lldb/API/SBFileSpec.h" #include "lldb/API/SBLineEntry.h" +#include "lldb/API/SBModule.h" #include "lldb/API/SBMutex.h" #include "llvm/ADT/StringExtras.h" #include <cstddef> @@ -21,6 +25,22 @@ using namespace lldb_dap; +static std::optional<protocol::PersistenceData> +GetPersistenceDataForSymbol(lldb::SBSymbol &symbol) { + protocol::PersistenceData persistence_data; + lldb::SBModule module = symbol.GetStartAddress().GetModule(); + if (!module.IsValid()) + return std::nullopt; + + lldb::SBFileSpec file_spec = module.GetFileSpec(); + if (!file_spec.IsValid()) + return std::nullopt; + + persistence_data.module_path = GetSBFileSpecPath(file_spec); + persistence_data.symbol_name = symbol.GetName(); + return persistence_data; +} + void Breakpoint::SetCondition() { m_bp.SetCondition(m_condition.c_str()); } void Breakpoint::SetHitCondition() { @@ -73,7 +93,7 @@ protocol::Breakpoint Breakpoint::ToProtocolBreakpoint() { const auto column = line_entry.GetColumn(); if (column != LLDB_INVALID_COLUMN_NUMBER) breakpoint.column = column; - } else { + } else if (source) { // Assembly breakpoint. auto symbol = bp_addr.GetSymbol(); if (symbol.IsValid()) { @@ -82,6 +102,15 @@ protocol::Breakpoint Breakpoint::ToProtocolBreakpoint() { .ReadInstructions(symbol.GetStartAddress(), bp_addr, nullptr) .GetSize() + 1; + + // Add persistent data so that the breakpoint can be resolved + // in future sessions. + std::optional<protocol::PersistenceData> persistence_data = + GetPersistenceDataForSymbol(symbol); + if (persistence_data) { + source->adapterData = + protocol::SourceLLDBData{std::move(persistence_data)}; + } } } diff --git a/lldb/tools/lldb-dap/CMakeLists.txt b/lldb/tools/lldb-dap/CMakeLists.txt index 4cddfb1..5e0ad53 100644 --- a/lldb/tools/lldb-dap/CMakeLists.txt +++ b/lldb/tools/lldb-dap/CMakeLists.txt @@ -66,7 +66,8 @@ add_lldb_library(lldbDAP Handler/ThreadsRequestHandler.cpp Handler/VariablesRequestHandler.cpp Handler/WriteMemoryRequestHandler.cpp - + + Protocol/DAPTypes.cpp Protocol/ProtocolBase.cpp Protocol/ProtocolEvents.cpp Protocol/ProtocolTypes.cpp diff --git a/lldb/tools/lldb-dap/DAP.cpp b/lldb/tools/lldb-dap/DAP.cpp index cbd3b14..849712f 100644 --- a/lldb/tools/lldb-dap/DAP.cpp +++ b/lldb/tools/lldb-dap/DAP.cpp @@ -1406,11 +1406,15 @@ void DAP::EventThread() { // avoids sending paths that should be source mapped. Note that // CreateBreakpoint doesn't apply source mapping and certain // implementation ignore the source part of this event anyway. - llvm::json::Value source_bp = bp.ToProtocolBreakpoint(); - source_bp.getAsObject()->erase("source"); + protocol::Breakpoint protocol_bp = bp.ToProtocolBreakpoint(); + + // "source" is not needed here, unless we add adapter data to be + // saved by the client. + if (protocol_bp.source && !protocol_bp.source->adapterData) + protocol_bp.source = std::nullopt; llvm::json::Object body; - body.try_emplace("breakpoint", source_bp); + body.try_emplace("breakpoint", protocol_bp); body.try_emplace("reason", "changed"); llvm::json::Object bp_event = CreateEventObject("breakpoint"); @@ -1491,8 +1495,9 @@ std::vector<protocol::Breakpoint> DAP::SetSourceBreakpoints( protocol::Breakpoint response_breakpoint = iv->second.ToProtocolBreakpoint(); - response_breakpoint.source = source; + if (!response_breakpoint.source) + response_breakpoint.source = source; if (!response_breakpoint.line && src_bp.GetLine() != LLDB_INVALID_LINE_NUMBER) response_breakpoint.line = src_bp.GetLine(); diff --git a/lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp b/lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp index 5d336af..142351f 100644 --- a/lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp +++ b/lldb/tools/lldb-dap/Handler/SetBreakpointsRequestHandler.cpp @@ -9,7 +9,6 @@ #include "DAP.h" #include "Protocol/ProtocolRequests.h" #include "RequestHandler.h" -#include <vector> namespace lldb_dap { diff --git a/lldb/tools/lldb-dap/Protocol/DAPTypes.cpp b/lldb/tools/lldb-dap/Protocol/DAPTypes.cpp new file mode 100644 index 0000000..ecb4bae --- /dev/null +++ b/lldb/tools/lldb-dap/Protocol/DAPTypes.cpp @@ -0,0 +1,36 @@ +#include "Protocol/DAPTypes.h" + +using namespace llvm; + +namespace lldb_dap::protocol { + +bool fromJSON(const llvm::json::Value &Params, PersistenceData &PD, + llvm::json::Path P) { + json::ObjectMapper O(Params, P); + return O && O.mapOptional("module_path", PD.module_path) && + O.mapOptional("symbol_name", PD.symbol_name); +} + +llvm::json::Value toJSON(const PersistenceData &PD) { + json::Object result{ + {"module_path", PD.module_path}, + {"symbol_name", PD.symbol_name}, + }; + + return result; +} + +bool fromJSON(const llvm::json::Value &Params, SourceLLDBData &SLD, + llvm::json::Path P) { + json::ObjectMapper O(Params, P); + return O && O.mapOptional("persistenceData", SLD.persistenceData); +} + +llvm::json::Value toJSON(const SourceLLDBData &SLD) { + json::Object result; + if (SLD.persistenceData) + result.insert({"persistenceData", SLD.persistenceData}); + return result; +} + +} // namespace lldb_dap::protocol
\ No newline at end of file diff --git a/lldb/tools/lldb-dap/Protocol/DAPTypes.h b/lldb/tools/lldb-dap/Protocol/DAPTypes.h new file mode 100644 index 0000000..716d8b4 --- /dev/null +++ b/lldb/tools/lldb-dap/Protocol/DAPTypes.h @@ -0,0 +1,53 @@ +//===-- ProtocolTypes.h ---------------------------------------------------===// +// +// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. +// See https://llvm.org/LICENSE.txt for license information. +// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception +// +//===----------------------------------------------------------------------===// +// +// This file contains private DAP types used in the protocol. +// +// Each struct has a toJSON and fromJSON function, that converts between +// the struct and a JSON representation. (See JSON.h) +// +//===----------------------------------------------------------------------===// + +#ifndef LLDB_TOOLS_LLDB_DAP_PROTOCOL_DAP_TYPES_H +#define LLDB_TOOLS_LLDB_DAP_PROTOCOL_DAP_TYPES_H + +#include "lldb/lldb-types.h" +#include "llvm/Support/JSON.h" +#include <optional> +#include <string> + +namespace lldb_dap::protocol { + +/// Data used to help lldb-dap resolve breakpoints persistently across different +/// sessions. This information is especially useful for assembly breakpoints, +/// because `sourceReference` can change across sessions. For regular source +/// breakpoints the path and line are the same For each session. +struct PersistenceData { + /// The source module path. + std::string module_path; + + /// The symbol name of the Source. + std::string symbol_name; +}; +bool fromJSON(const llvm::json::Value &, PersistenceData &, llvm::json::Path); +llvm::json::Value toJSON(const PersistenceData &); + +/// Custom source data used by lldb-dap. +/// This data should help lldb-dap identify sources correctly across different +/// sessions. +struct SourceLLDBData { + /// Data that helps lldb resolve this source persistently across different + /// sessions. + std::optional<PersistenceData> persistenceData; +}; +bool fromJSON(const llvm::json::Value &, SourceLLDBData &, llvm::json::Path); +llvm::json::Value toJSON(const SourceLLDBData &); + +} // namespace lldb_dap::protocol + +#endif diff --git a/lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp b/lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp index fe8bb52..369858c 100644 --- a/lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp +++ b/lldb/tools/lldb-dap/Protocol/ProtocolTypes.cpp @@ -46,7 +46,8 @@ bool fromJSON(const json::Value &Params, Source &S, json::Path P) { json::ObjectMapper O(Params, P); return O && O.map("name", S.name) && O.map("path", S.path) && O.map("presentationHint", S.presentationHint) && - O.map("sourceReference", S.sourceReference); + O.map("sourceReference", S.sourceReference) && + O.map("adapterData", S.adapterData); } llvm::json::Value toJSON(Source::PresentationHint hint) { @@ -71,6 +72,8 @@ llvm::json::Value toJSON(const Source &S) { result.insert({"sourceReference", *S.sourceReference}); if (S.presentationHint) result.insert({"presentationHint", *S.presentationHint}); + if (S.adapterData) + result.insert({"adapterData", *S.adapterData}); return result; } diff --git a/lldb/tools/lldb-dap/Protocol/ProtocolTypes.h b/lldb/tools/lldb-dap/Protocol/ProtocolTypes.h index 89122c8..c4be791 100644 --- a/lldb/tools/lldb-dap/Protocol/ProtocolTypes.h +++ b/lldb/tools/lldb-dap/Protocol/ProtocolTypes.h @@ -20,6 +20,7 @@ #ifndef LLDB_TOOLS_LLDB_DAP_PROTOCOL_PROTOCOL_TYPES_H #define LLDB_TOOLS_LLDB_DAP_PROTOCOL_PROTOCOL_TYPES_H +#include "Protocol/DAPTypes.h" #include "lldb/lldb-defines.h" #include "llvm/ADT/DenseSet.h" #include "llvm/Support/JSON.h" @@ -336,7 +337,12 @@ struct Source { /// skipped on stepping. std::optional<PresentationHint> presentationHint; - // unsupported keys: origin, sources, adapterData, checksums + /// Additional data that a debug adapter might want to loop through the + /// client. The client should leave the data intact and persist it across + /// sessions. The client should not interpret the data. + std::optional<SourceLLDBData> adapterData; + + // unsupported keys: origin, sources, checksums }; bool fromJSON(const llvm::json::Value &, Source::PresentationHint &, llvm::json::Path); diff --git a/lldb/tools/lldb-dap/SourceBreakpoint.cpp b/lldb/tools/lldb-dap/SourceBreakpoint.cpp index 5fce9fe..843a5eb 100644 --- a/lldb/tools/lldb-dap/SourceBreakpoint.cpp +++ b/lldb/tools/lldb-dap/SourceBreakpoint.cpp @@ -10,7 +10,9 @@ #include "BreakpointBase.h" #include "DAP.h" #include "JSONUtils.h" +#include "ProtocolUtils.h" #include "lldb/API/SBBreakpoint.h" +#include "lldb/API/SBFileSpec.h" #include "lldb/API/SBFileSpecList.h" #include "lldb/API/SBFrame.h" #include "lldb/API/SBInstruction.h" @@ -46,41 +48,20 @@ llvm::Error SourceBreakpoint::SetBreakpoint(const protocol::Source &source) { if (source.sourceReference) { // Breakpoint set by assembly source. - std::optional<lldb::addr_t> raw_addr = - m_dap.GetSourceReferenceAddress(*source.sourceReference); - if (!raw_addr) - return llvm::createStringError(llvm::inconvertibleErrorCode(), - "Invalid sourceReference."); - - lldb::SBAddress source_address(*raw_addr, m_dap.target); - if (!source_address.IsValid()) - return llvm::createStringError(llvm::inconvertibleErrorCode(), - "Invalid sourceReference."); - - lldb::SBSymbol symbol = source_address.GetSymbol(); - if (!symbol.IsValid()) { - // FIXME: Support assembly breakpoints without a valid symbol. - return llvm::createStringError(llvm::inconvertibleErrorCode(), - "Breakpoints in assembly without a valid " - "symbol are not supported yet."); + if (source.adapterData && source.adapterData->persistenceData) { + // Prefer use the adapter persitence data, because this could be a + // breakpoint from a previous session where the `sourceReference` is not + // valid anymore. + if (llvm::Error error = CreateAssemblyBreakpointWithPersistenceData( + *source.adapterData->persistenceData)) + return error; + } else { + if (llvm::Error error = CreateAssemblyBreakpointWithSourceReference( + *source.sourceReference)) + return error; } - - lldb::SBInstructionList inst_list = - m_dap.target.ReadInstructions(symbol.GetStartAddress(), m_line); - if (inst_list.GetSize() < m_line) - return llvm::createStringError(llvm::inconvertibleErrorCode(), - "Invalid instruction list size."); - - lldb::SBAddress address = - inst_list.GetInstructionAtIndex(m_line - 1).GetAddress(); - - m_bp = m_dap.target.BreakpointCreateBySBAddress(address); } else { - // Breakpoint set by a regular source file. - const auto source_path = source.path.value_or(""); - lldb::SBFileSpecList module_list; - m_bp = m_dap.target.BreakpointCreateByLocation(source_path.c_str(), m_line, - m_column, 0, module_list); + CreatePathBreakpoint(source); } if (!m_log_message.empty()) @@ -97,6 +78,60 @@ void SourceBreakpoint::UpdateBreakpoint(const SourceBreakpoint &request_bp) { BreakpointBase::UpdateBreakpoint(request_bp); } +void SourceBreakpoint::CreatePathBreakpoint(const protocol::Source &source) { + const auto source_path = source.path.value_or(""); + lldb::SBFileSpecList module_list; + m_bp = m_dap.target.BreakpointCreateByLocation(source_path.c_str(), m_line, + m_column, 0, module_list); +} + +llvm::Error SourceBreakpoint::CreateAssemblyBreakpointWithSourceReference( + int64_t source_reference) { + std::optional<lldb::addr_t> raw_addr = + m_dap.GetSourceReferenceAddress(source_reference); + if (!raw_addr) + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "Invalid sourceReference."); + + lldb::SBAddress source_address(*raw_addr, m_dap.target); + if (!source_address.IsValid()) + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "Invalid sourceReference."); + + lldb::SBSymbol symbol = source_address.GetSymbol(); + if (!symbol.IsValid()) { + // FIXME: Support assembly breakpoints without a valid symbol. + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "Breakpoints in assembly without a valid " + "symbol are not supported yet."); + } + + lldb::SBInstructionList inst_list = + m_dap.target.ReadInstructions(symbol.GetStartAddress(), m_line); + if (inst_list.GetSize() < m_line) + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "Invalid instruction list size."); + + lldb::SBAddress address = + inst_list.GetInstructionAtIndex(m_line - 1).GetAddress(); + + m_bp = m_dap.target.BreakpointCreateBySBAddress(address); + return llvm::Error::success(); +} + +llvm::Error SourceBreakpoint::CreateAssemblyBreakpointWithPersistenceData( + const protocol::PersistenceData &persistence_data) { + lldb::SBFileSpec file_spec(persistence_data.module_path.c_str()); + lldb::SBFileSpecList comp_unit_list; + lldb::SBFileSpecList file_spec_list; + file_spec_list.Append(file_spec); + m_bp = m_dap.target.BreakpointCreateByName( + persistence_data.symbol_name.c_str(), lldb::eFunctionNameTypeFull, + lldb::eLanguageTypeUnknown, m_line - 1, true, file_spec_list, + comp_unit_list); + return llvm::Error::success(); +} + lldb::SBError SourceBreakpoint::AppendLogMessagePart(llvm::StringRef part, bool is_expr) { if (is_expr) { diff --git a/lldb/tools/lldb-dap/SourceBreakpoint.h b/lldb/tools/lldb-dap/SourceBreakpoint.h index 857ac42..34054a8 100644 --- a/lldb/tools/lldb-dap/SourceBreakpoint.h +++ b/lldb/tools/lldb-dap/SourceBreakpoint.h @@ -11,6 +11,7 @@ #include "Breakpoint.h" #include "DAPForward.h" +#include "Protocol/DAPTypes.h" #include "Protocol/ProtocolTypes.h" #include "lldb/API/SBError.h" #include "llvm/ADT/StringRef.h" @@ -50,6 +51,12 @@ public: uint32_t GetColumn() const { return m_column; } protected: + void CreatePathBreakpoint(const protocol::Source &source); + llvm::Error + CreateAssemblyBreakpointWithSourceReference(int64_t source_reference); + llvm::Error CreateAssemblyBreakpointWithPersistenceData( + const protocol::PersistenceData &persistence_data); + // logMessage part can be either a raw text or an expression. struct LogMessagePart { LogMessagePart(llvm::StringRef text, bool is_expr) diff --git a/llvm/CMakeLists.txt b/llvm/CMakeLists.txt index e9a6faa..b672cb9 100644 --- a/llvm/CMakeLists.txt +++ b/llvm/CMakeLists.txt @@ -588,9 +588,6 @@ set(LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING "DISABLED" CACHE STRING "Enhance Debugify's line number coverage tracking; enabling this is ABI-breaking. Can be DISABLED, COVERAGE, or COVERAGE_AND_ORIGIN.") set_property(CACHE LLVM_ENABLE_DEBUGLOC_COVERAGE_TRACKING PROPERTY STRINGS DISABLED COVERAGE COVERAGE_AND_ORIGIN) -option(LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS - "Add additional fields to DILocations to support Key Instructions" ON) - set(WINDOWS_PREFER_FORWARD_SLASH_DEFAULT OFF) if (MINGW) # Cygwin doesn't identify itself as Windows, and thus gets path::Style::posix diff --git a/llvm/cmake/modules/HandleLLVMOptions.cmake b/llvm/cmake/modules/HandleLLVMOptions.cmake index c126b0d..91aaeb5 100644 --- a/llvm/cmake/modules/HandleLLVMOptions.cmake +++ b/llvm/cmake/modules/HandleLLVMOptions.cmake @@ -212,10 +212,6 @@ endif() # LLVM_ENABLE_DEBUGLOC_TRACKING_COVERAGE (non-cached) is expected to be # 1 or 0 here, assuming referenced in #cmakedefine01. -if(LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS) - add_compile_definitions(EXPERIMENTAL_KEY_INSTRUCTIONS) -endif() - if( LLVM_REVERSE_ITERATION ) set( LLVM_ENABLE_REVERSE_ITERATION 1 ) endif() diff --git a/llvm/docs/LangRef.rst b/llvm/docs/LangRef.rst index 2fbca05..99a0b17 100644 --- a/llvm/docs/LangRef.rst +++ b/llvm/docs/LangRef.rst @@ -5175,6 +5175,8 @@ The following is the syntax for constant expressions: Perform the :ref:`trunc operation <i_trunc>` on constants. ``ptrtoint (CST to TYPE)`` Perform the :ref:`ptrtoint operation <i_ptrtoint>` on constants. +``ptrtoaddr (CST to TYPE)`` + Perform the :ref:`ptrtoaddr operation <i_ptrtoaddr>` on constants. ``inttoptr (CST to TYPE)`` Perform the :ref:`inttoptr operation <i_inttoptr>` on constants. This one is *really* dangerous! @@ -12523,6 +12525,58 @@ Example: %Y = ptrtoint ptr %P to i64 ; yields zero extension on 32-bit architecture %Z = ptrtoint <4 x ptr> %P to <4 x i64>; yields vector zero extension for a vector of addresses on 32-bit architecture +.. _i_ptrtoaddr: + +'``ptrtoaddr .. to``' Instruction +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ + +Syntax: +""""""" + +:: + + <result> = ptrtoaddr <ty> <value> to <ty2> ; yields ty2 + +Overview: +""""""""" + +The '``ptrtoaddr``' instruction converts the pointer or a vector of +pointers ``value`` to the underlying integer address (or vector of addresses) of +type ``ty2``. This is different from :ref:`ptrtoint <i_ptrtoint>` in that it +only operates on the index bits of the pointer and ignores all other bits, and +does not capture the provenance of the pointer. + +Arguments: +"""""""""" + +The '``ptrtoaddr``' instruction takes a ``value`` to cast, which must be +a value of type :ref:`pointer <t_pointer>` or a vector of pointers, and a +type to cast it to ``ty2``, which must be must be the :ref:`integer <t_integer>` +type (or vector of integers) matching the pointer index width of the address +space of ``ty``. + +Semantics: +"""""""""" + +The '``ptrtoaddr``' instruction converts ``value`` to integer type ``ty2`` by +interpreting the lowest index-width pointer representation bits as an integer. +If the address size and the pointer representation size are the same and +``value`` and ``ty2`` are the same size, then nothing is done (*no-op cast*) +other than a type change. + +The ``ptrtoaddr`` instruction always :ref:`captures the address but not the provenance <pointercapture>` +of the pointer argument. + +Example: +"""""""" +This example assumes pointers in address space 1 are 64 bits in size with an +address width of 32 bits (``p1:64:64:64:32`` :ref:`datalayout string<langref_datalayout>`) +.. code-block:: llvm + + %X = ptrtoaddr ptr addrspace(1) %P to i32 ; extracts low 32 bits of pointer + %Y = ptrtoaddr <4 x ptr addrspace(1)> %P to <4 x i32>; yields vector of low 32 bits for each pointer + + .. _i_inttoptr: '``inttoptr .. to``' Instruction diff --git a/llvm/docs/ReleaseNotes.md b/llvm/docs/ReleaseNotes.md index b38ed62..88b7e6d 100644 --- a/llvm/docs/ReleaseNotes.md +++ b/llvm/docs/ReleaseNotes.md @@ -56,6 +56,10 @@ Makes programs 10x faster by doing Special New Thing. Changes to the LLVM IR ---------------------- +* The `ptrtoaddr` instruction was introduced. This instruction returns the + address component of a pointer type variable but unlike `ptrtoint` does not + capture provenance ([#125687](https://github.com/llvm/llvm-project/pull/125687)). + Changes to LLVM infrastructure ------------------------------ diff --git a/llvm/docs/SourceLevelDebugging.rst b/llvm/docs/SourceLevelDebugging.rst index dfc8c53e..c2084c2 100644 --- a/llvm/docs/SourceLevelDebugging.rst +++ b/llvm/docs/SourceLevelDebugging.rst @@ -1300,28 +1300,28 @@ calls. This descriptor results in the following DWARF tag: Debugging information format ============================ -Debugging Information Extension for Objective C Properties +Debugging Information Extension for Objective-C Properties ---------------------------------------------------------- Introduction ^^^^^^^^^^^^ -Objective C provides a simpler way to declare and define accessor methods using +Objective-C provides a simpler way to declare and define accessor methods using declared properties. The language provides features to declare a property and to let compiler synthesize accessor methods. -The debugger lets developer inspect Objective C interfaces and their instance +The debugger lets developer inspect Objective-C interfaces and their instance variables and class variables. However, the debugger does not know anything -about the properties defined in Objective C interfaces. The debugger consumes +about the properties defined in Objective-C interfaces. The debugger consumes information generated by compiler in DWARF format. The format does not support -encoding of Objective C properties. This proposal describes DWARF extensions to -encode Objective C properties, which the debugger can use to let developers -inspect Objective C properties. +encoding of Objective-C properties. This proposal describes DWARF extensions to +encode Objective-C properties, which the debugger can use to let developers +inspect Objective-C properties. Proposal ^^^^^^^^ -Objective C properties exist separately from class members. A property can be +Objective-C properties exist separately from class members. A property can be defined only by "setter" and "getter" selectors, and be calculated anew on each access. Or a property can just be a direct access to some declared ivar. Finally it can have an ivar "automatically synthesized" for it by the compiler, @@ -1624,24 +1624,24 @@ The BUCKETS are an array of offsets to DATA for each hash: So for ``bucket[3]`` in the example above, we have an offset into the table 0x000034f0 which points to a chain of entries for the bucket. Each bucket must -contain a next pointer, full 32 bit hash value, the string itself, and the data +contain a next pointer, full 32-bit hash value, the string itself, and the data for the current string value. .. code-block:: none .------------. 0x000034f0: | 0x00003500 | next pointer - | 0x12345678 | 32 bit hash + | 0x12345678 | 32-bit hash | "erase" | string value | data[n] | HashData for this bucket |------------| 0x00003500: | 0x00003550 | next pointer - | 0x29273623 | 32 bit hash + | 0x29273623 | 32-bit hash | "dump" | string value | data[n] | HashData for this bucket |------------| 0x00003550: | 0x00000000 | next pointer - | 0x82638293 | 32 bit hash + | 0x82638293 | 32-bit hash | "main" | string value | data[n] | HashData for this bucket `------------' @@ -1650,17 +1650,17 @@ The problem with this layout for debuggers is that we need to optimize for the negative lookup case where the symbol we're searching for is not present. So if we were to lookup "``printf``" in the table above, we would make a 32-bit hash for "``printf``", it might match ``bucket[3]``. We would need to go to -the offset 0x000034f0 and start looking to see if our 32 bit hash matches. To +the offset 0x000034f0 and start looking to see if our 32-bit hash matches. To do so, we need to read the next pointer, then read the hash, compare it, and skip to the next bucket. Each time we are skipping many bytes in memory and -touching new pages just to do the compare on the full 32 bit hash. All of +touching new pages just to do the compare on the full 32-bit hash. All of these accesses then tell us that we didn't have a match. Name Hash Tables """""""""""""""" To solve the issues mentioned above we have structured the hash tables a bit -differently: a header, buckets, an array of all unique 32 bit hash values, +differently: a header, buckets, an array of all unique 32-bit hash values, followed by an array of hash value data offsets, one for each hash value, then the data for all hash values: @@ -1679,11 +1679,11 @@ the data for all hash values: `-------------' The ``BUCKETS`` in the name tables are an index into the ``HASHES`` array. By -making all of the full 32 bit hash values contiguous in memory, we allow +making all of the full 32-bit hash values contiguous in memory, we allow ourselves to efficiently check for a match while touching as little memory as -possible. Most often checking the 32 bit hash values is as far as the lookup +possible. Most often checking the 32-bit hash values is as far as the lookup goes. If it does match, it usually is a match with no collisions. So for a -table with "``n_buckets``" buckets, and "``n_hashes``" unique 32 bit hash +table with "``n_buckets``" buckets, and "``n_hashes``" unique 32-bit hash values, we can clarify the contents of the ``BUCKETS``, ``HASHES`` and ``OFFSETS`` as: @@ -1698,11 +1698,11 @@ values, we can clarify the contents of the ``BUCKETS``, ``HASHES`` and | HEADER.header_data_len | uint32_t | HEADER_DATA | HeaderData |-------------------------| - | BUCKETS | uint32_t[n_buckets] // 32 bit hash indexes + | BUCKETS | uint32_t[n_buckets] // 32-bit hash indexes |-------------------------| - | HASHES | uint32_t[n_hashes] // 32 bit hash values + | HASHES | uint32_t[n_hashes] // 32-bit hash values |-------------------------| - | OFFSETS | uint32_t[n_hashes] // 32 bit offsets to hash value data + | OFFSETS | uint32_t[n_hashes] // 32-bit offsets to hash value data |-------------------------| | ALL HASH DATA | `-------------------------' @@ -1761,7 +1761,7 @@ with: | | |------------| 0x000034f0: | 0x00001203 | .debug_str ("erase") - | 0x00000004 | A 32 bit array count - number of HashData with name "erase" + | 0x00000004 | A 32-bit array count - number of HashData with name "erase" | 0x........ | HashData[0] | 0x........ | HashData[1] | 0x........ | HashData[2] @@ -1769,18 +1769,18 @@ with: | 0x00000000 | String offset into .debug_str (terminate data for hash) |------------| 0x00003500: | 0x00001203 | String offset into .debug_str ("collision") - | 0x00000002 | A 32 bit array count - number of HashData with name "collision" + | 0x00000002 | A 32-bit array count - number of HashData with name "collision" | 0x........ | HashData[0] | 0x........ | HashData[1] | 0x00001203 | String offset into .debug_str ("dump") - | 0x00000003 | A 32 bit array count - number of HashData with name "dump" + | 0x00000003 | A 32-bit array count - number of HashData with name "dump" | 0x........ | HashData[0] | 0x........ | HashData[1] | 0x........ | HashData[2] | 0x00000000 | String offset into .debug_str (terminate data for hash) |------------| 0x00003550: | 0x00001203 | String offset into .debug_str ("main") - | 0x00000009 | A 32 bit array count - number of HashData with name "main" + | 0x00000009 | A 32-bit array count - number of HashData with name "main" | 0x........ | HashData[0] | 0x........ | HashData[1] | 0x........ | HashData[2] @@ -1795,13 +1795,13 @@ with: So we still have all of the same data, we just organize it more efficiently for debugger lookup. If we repeat the same "``printf``" lookup from above, we -would hash "``printf``" and find it matches ``BUCKETS[3]`` by taking the 32 bit +would hash "``printf``" and find it matches ``BUCKETS[3]`` by taking the 32-bit hash value and modulo it by ``n_buckets``. ``BUCKETS[3]`` contains "6" which is the index into the ``HASHES`` table. We would then compare any consecutive -32 bit hashes values in the ``HASHES`` array as long as the hashes would be in +32-bit hashes values in the ``HASHES`` array as long as the hashes would be in ``BUCKETS[3]``. We do this by verifying that each subsequent hash value modulo ``n_buckets`` is still 3. In the case of a failed lookup we would access the -memory for ``BUCKETS[3]``, and then compare a few consecutive 32 bit hashes +memory for ``BUCKETS[3]``, and then compare a few consecutive 32-bit hashes before we know that we have no match. We don't end up marching through multiple words of memory and we really keep the number of processor data cache lines being accessed as small as possible. @@ -1842,10 +1842,10 @@ header is: HeaderData header_data; // Implementation specific header data }; -The header starts with a 32 bit "``magic``" value which must be ``'HASH'`` +The header starts with a 32-bit "``magic``" value which must be ``'HASH'`` encoded as an ASCII integer. This allows the detection of the start of the hash table and also allows the table's byte order to be determined so the table -can be correctly extracted. The "``magic``" value is followed by a 16 bit +can be correctly extracted. The "``magic``" value is followed by a 16-bit ``version`` number which allows the table to be revised and modified in the future. The current version number is 1. ``hash_function`` is a ``uint16_t`` enumeration that specifies which hash function was used to produce this table. @@ -1858,8 +1858,8 @@ The current values for the hash function enumerations include: eHashFunctionDJB = 0u, // Daniel J Bernstein hash function }; -``bucket_count`` is a 32 bit unsigned integer that represents how many buckets -are in the ``BUCKETS`` array. ``hashes_count`` is the number of unique 32 bit +``bucket_count`` is a 32-bit unsigned integer that represents how many buckets +are in the ``BUCKETS`` array. ``hashes_count`` is the number of unique 32-bit hash values that are in the ``HASHES`` array, and is the same number of offsets are contained in the ``OFFSETS`` array. ``header_data_len`` specifies the size in bytes of the ``HeaderData`` that is filled in by specialized versions of @@ -1875,12 +1875,12 @@ The header is followed by the buckets, hashes, offsets, and hash value data. struct FixedTable { uint32_t buckets[Header.bucket_count]; // An array of hash indexes into the "hashes[]" array below - uint32_t hashes [Header.hashes_count]; // Every unique 32 bit hash for the entire table is in this table + uint32_t hashes [Header.hashes_count]; // Every unique 32-bit hash for the entire table is in this table uint32_t offsets[Header.hashes_count]; // An offset that corresponds to each item in the "hashes[]" array above }; -``buckets`` is an array of 32 bit indexes into the ``hashes`` array. The -``hashes`` array contains all of the 32 bit hash values for all names in the +``buckets`` is an array of 32-bit indexes into the ``hashes`` array. The +``hashes`` array contains all of the 32-bit hash values for all names in the hash table. Each hash in the ``hashes`` table has an offset in the ``offsets`` array that points to the data for the hash value. @@ -1967,13 +1967,13 @@ array to be: HeaderData.atoms[0].form = DW_FORM_data4; This defines the contents to be the DIE offset (eAtomTypeDIEOffset) that is -encoded as a 32 bit value (DW_FORM_data4). This allows a single name to have +encoded as a 32-bit value (DW_FORM_data4). This allows a single name to have multiple matching DIEs in a single file, which could come up with an inlined function for instance. Future tables could include more information about the DIE such as flags indicating if the DIE is a function, method, block, or inlined. -The KeyType for the DWARF table is a 32 bit string table offset into the +The KeyType for the DWARF table is a 32-bit string table offset into the ".debug_str" table. The ".debug_str" is the string table for the DWARF which may already contain copies of all of the strings. This helps make sure, with help from the compiler, that we reuse the strings between all of the DWARF @@ -1982,7 +1982,7 @@ compiler generate all strings as DW_FORM_strp in the debug info, is that DWARF parsing can be made much faster. After a lookup is made, we get an offset into the hash data. The hash data -needs to be able to deal with 32 bit hash collisions, so the chunk of data +needs to be able to deal with 32-bit hash collisions, so the chunk of data at the offset in the hash data consists of a triple: .. code-block:: c @@ -1992,7 +1992,7 @@ at the offset in the hash data consists of a triple: HashData[hash_data_count] If "str_offset" is zero, then the bucket contents are done. 99.9% of the -hash data chunks contain a single item (no 32 bit hash collision): +hash data chunks contain a single item (no 32-bit hash collision): .. code-block:: none @@ -2025,7 +2025,7 @@ If there are collisions, you will have multiple valid string offsets: `------------' Current testing with real world C++ binaries has shown that there is around 1 -32 bit hash collision per 100,000 name entries. +32-bit hash collision per 100,000 name entries. Contents ^^^^^^^^ diff --git a/llvm/include/llvm-c/Core.h b/llvm/include/llvm-c/Core.h index d645646..9879d0d 100644 --- a/llvm/include/llvm-c/Core.h +++ b/llvm/include/llvm-c/Core.h @@ -111,6 +111,7 @@ typedef enum { LLVMFPTrunc = 37, LLVMFPExt = 38, LLVMPtrToInt = 39, + LLVMPtrToAddr = 69, LLVMIntToPtr = 40, LLVMBitCast = 41, LLVMAddrSpaceCast = 60, diff --git a/llvm/include/llvm/ADT/StringMap.h b/llvm/include/llvm/ADT/StringMap.h index f839edf..0bf062f 100644 --- a/llvm/include/llvm/ADT/StringMap.h +++ b/llvm/include/llvm/ADT/StringMap.h @@ -89,6 +89,10 @@ protected: /// setup the map as empty. LLVM_ABI void init(unsigned Size); + iterator_range<StringMapEntryBase **> buckets() { + return make_range(TheTable, TheTable + NumBuckets); + } + public: static constexpr uintptr_t TombstoneIntVal = static_cast<uintptr_t>(-1) @@ -198,8 +202,7 @@ public: // to default values. This is a copy of clear(), but avoids unnecessary // work not required in the destructor. if (!empty()) { - for (unsigned I = 0, E = NumBuckets; I != E; ++I) { - StringMapEntryBase *Bucket = TheTable[I]; + for (StringMapEntryBase *Bucket : buckets()) { if (Bucket && Bucket != getTombstoneVal()) { static_cast<MapEntryTy *>(Bucket)->Destroy(getAllocator()); } @@ -398,8 +401,7 @@ public: // Zap all values, resetting the keys back to non-present (not tombstone), // which is safe because we're removing all elements. - for (unsigned I = 0, E = NumBuckets; I != E; ++I) { - StringMapEntryBase *&Bucket = TheTable[I]; + for (StringMapEntryBase *&Bucket : buckets()) { if (Bucket && Bucket != getTombstoneVal()) { static_cast<MapEntryTy *>(Bucket)->Destroy(getAllocator()); } diff --git a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h index d201915..7683ec1 100644 --- a/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h +++ b/llvm/include/llvm/Analysis/TargetTransformInfoImpl.h @@ -731,6 +731,13 @@ public: return 0; break; } + case Instruction::PtrToAddr: { + unsigned DstSize = Dst->getScalarSizeInBits(); + assert(DstSize == DL.getAddressSizeInBits(Src)); + if (DL.isLegalInteger(DstSize)) + return 0; + break; + } case Instruction::PtrToInt: { unsigned DstSize = Dst->getScalarSizeInBits(); if (DL.isLegalInteger(DstSize) && @@ -1436,6 +1443,7 @@ public: Op2Info, Operands, I); } case Instruction::IntToPtr: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::SIToFP: case Instruction::UIToFP: diff --git a/llvm/include/llvm/AsmParser/LLToken.h b/llvm/include/llvm/AsmParser/LLToken.h index a2311d2..e6a0eae 100644 --- a/llvm/include/llvm/AsmParser/LLToken.h +++ b/llvm/include/llvm/AsmParser/LLToken.h @@ -319,6 +319,7 @@ enum Kind { kw_fptoui, kw_fptosi, kw_inttoptr, + kw_ptrtoaddr, kw_ptrtoint, kw_bitcast, kw_addrspacecast, diff --git a/llvm/include/llvm/Bitcode/LLVMBitCodes.h b/llvm/include/llvm/Bitcode/LLVMBitCodes.h index dc78eb4..1c7d346 100644 --- a/llvm/include/llvm/Bitcode/LLVMBitCodes.h +++ b/llvm/include/llvm/Bitcode/LLVMBitCodes.h @@ -456,7 +456,8 @@ enum CastOpcodes { CAST_PTRTOINT = 9, CAST_INTTOPTR = 10, CAST_BITCAST = 11, - CAST_ADDRSPACECAST = 12 + CAST_ADDRSPACECAST = 12, + CAST_PTRTOADDR = 13, }; /// UnaryOpcodes - These are values used in the bitcode files to encode which diff --git a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h index 6fd05c8..3d7ccd5 100644 --- a/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h +++ b/llvm/include/llvm/CodeGen/GlobalISel/IRTranslator.h @@ -486,6 +486,10 @@ private: bool translatePtrToInt(const User &U, MachineIRBuilder &MIRBuilder) { return translateCast(TargetOpcode::G_PTRTOINT, U, MIRBuilder); } + bool translatePtrToAddr(const User &U, MachineIRBuilder &MIRBuilder) { + // FIXME: this is not correct for pointers with addr width != pointer width + return translatePtrToInt(U, MIRBuilder); + } bool translateTrunc(const User &U, MachineIRBuilder &MIRBuilder) { return translateCast(TargetOpcode::G_TRUNC, U, MIRBuilder); } diff --git a/llvm/include/llvm/IR/Constants.h b/llvm/include/llvm/IR/Constants.h index 9c9fc88..e06e6ad 100644 --- a/llvm/include/llvm/IR/Constants.h +++ b/llvm/include/llvm/IR/Constants.h @@ -1158,6 +1158,8 @@ public: LLVM_ABI static Constant *getXor(Constant *C1, Constant *C2); LLVM_ABI static Constant *getTrunc(Constant *C, Type *Ty, bool OnlyIfReduced = false); + LLVM_ABI static Constant *getPtrToAddr(Constant *C, Type *Ty, + bool OnlyIfReduced = false); LLVM_ABI static Constant *getPtrToInt(Constant *C, Type *Ty, bool OnlyIfReduced = false); LLVM_ABI static Constant *getIntToPtr(Constant *C, Type *Ty, diff --git a/llvm/include/llvm/IR/DebugInfoMetadata.h b/llvm/include/llvm/IR/DebugInfoMetadata.h index f1f0c189..a4e9d16 100644 --- a/llvm/include/llvm/IR/DebugInfoMetadata.h +++ b/llvm/include/llvm/IR/DebugInfoMetadata.h @@ -2506,10 +2506,8 @@ public: class DILocation : public MDNode { friend class LLVMContextImpl; friend class MDNode; -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS uint64_t AtomGroup : 61; uint64_t AtomRank : 3; -#endif DILocation(LLVMContext &C, StorageType Storage, unsigned Line, unsigned Column, uint64_t AtomGroup, uint8_t AtomRank, @@ -2539,20 +2537,8 @@ class DILocation : public MDNode { } public: - uint64_t getAtomGroup() const { -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS - return AtomGroup; -#else - return 0; -#endif - } - uint8_t getAtomRank() const { -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS - return AtomRank; -#else - return 0; -#endif - } + uint64_t getAtomGroup() const { return AtomGroup; } + uint8_t getAtomRank() const { return AtomRank; } const DILocation *getWithoutAtom() const { if (!getAtomGroup() && !getAtomRank()) diff --git a/llvm/include/llvm/IR/IRBuilder.h b/llvm/include/llvm/IR/IRBuilder.h index 78f966d..783f8f6 100644 --- a/llvm/include/llvm/IR/IRBuilder.h +++ b/llvm/include/llvm/IR/IRBuilder.h @@ -2187,7 +2187,10 @@ public: return CreateCast(Instruction::FPExt, V, DestTy, Name, FPMathTag, FMFSource); } - + Value *CreatePtrToAddr(Value *V, const Twine &Name = "") { + return CreateCast(Instruction::PtrToInt, V, + BB->getDataLayout().getAddressType(V->getType()), Name); + } Value *CreatePtrToInt(Value *V, Type *DestTy, const Twine &Name = "") { return CreateCast(Instruction::PtrToInt, V, DestTy, Name); diff --git a/llvm/include/llvm/IR/InstVisitor.h b/llvm/include/llvm/IR/InstVisitor.h index 6d5398b..8e4dc64 100644 --- a/llvm/include/llvm/IR/InstVisitor.h +++ b/llvm/include/llvm/IR/InstVisitor.h @@ -183,6 +183,7 @@ public: RetTy visitUIToFPInst(UIToFPInst &I) { DELEGATE(CastInst);} RetTy visitSIToFPInst(SIToFPInst &I) { DELEGATE(CastInst);} RetTy visitPtrToIntInst(PtrToIntInst &I) { DELEGATE(CastInst);} + RetTy visitPtrToAddrInst(PtrToAddrInst &I) { DELEGATE(CastInst);} RetTy visitIntToPtrInst(IntToPtrInst &I) { DELEGATE(CastInst);} RetTy visitBitCastInst(BitCastInst &I) { DELEGATE(CastInst);} RetTy visitAddrSpaceCastInst(AddrSpaceCastInst &I) { DELEGATE(CastInst);} diff --git a/llvm/include/llvm/IR/Instruction.def b/llvm/include/llvm/IR/Instruction.def index a5ad92f..face6a9 100644 --- a/llvm/include/llvm/IR/Instruction.def +++ b/llvm/include/llvm/IR/Instruction.def @@ -190,35 +190,36 @@ HANDLE_CAST_INST(43, UIToFP , UIToFPInst ) // UInt -> floating point HANDLE_CAST_INST(44, SIToFP , SIToFPInst ) // SInt -> floating point HANDLE_CAST_INST(45, FPTrunc , FPTruncInst ) // Truncate floating point HANDLE_CAST_INST(46, FPExt , FPExtInst ) // Extend floating point -HANDLE_CAST_INST(47, PtrToInt, PtrToIntInst) // Pointer -> Integer -HANDLE_CAST_INST(48, IntToPtr, IntToPtrInst) // Integer -> Pointer -HANDLE_CAST_INST(49, BitCast , BitCastInst ) // Type cast -HANDLE_CAST_INST(50, AddrSpaceCast, AddrSpaceCastInst) // addrspace cast - LAST_CAST_INST(50) +HANDLE_CAST_INST(47, PtrToInt, PtrToIntInst) // Pointer -> Integer (bitcast) +HANDLE_CAST_INST(48, PtrToAddr, PtrToAddrInst) // Pointer -> Address +HANDLE_CAST_INST(49, IntToPtr, IntToPtrInst) // Integer -> Pointer +HANDLE_CAST_INST(50, BitCast , BitCastInst ) // Type cast +HANDLE_CAST_INST(51, AddrSpaceCast, AddrSpaceCastInst) // addrspace cast + LAST_CAST_INST(51) - FIRST_FUNCLETPAD_INST(51) -HANDLE_FUNCLETPAD_INST(51, CleanupPad, CleanupPadInst) -HANDLE_FUNCLETPAD_INST(52, CatchPad , CatchPadInst) - LAST_FUNCLETPAD_INST(52) + FIRST_FUNCLETPAD_INST(52) +HANDLE_FUNCLETPAD_INST(52, CleanupPad, CleanupPadInst) +HANDLE_FUNCLETPAD_INST(53, CatchPad , CatchPadInst) + LAST_FUNCLETPAD_INST(53) // Other operators... - FIRST_OTHER_INST(53) -HANDLE_OTHER_INST(53, ICmp , ICmpInst ) // Integer comparison instruction -HANDLE_OTHER_INST(54, FCmp , FCmpInst ) // Floating point comparison instr. -HANDLE_OTHER_INST(55, PHI , PHINode ) // PHI node instruction -HANDLE_OTHER_INST(56, Call , CallInst ) // Call a function -HANDLE_OTHER_INST(57, Select , SelectInst ) // select instruction -HANDLE_USER_INST (58, UserOp1, Instruction) // May be used internally in a pass -HANDLE_USER_INST (59, UserOp2, Instruction) // Internal to passes only -HANDLE_OTHER_INST(60, VAArg , VAArgInst ) // vaarg instruction -HANDLE_OTHER_INST(61, ExtractElement, ExtractElementInst)// extract from vector -HANDLE_OTHER_INST(62, InsertElement, InsertElementInst) // insert into vector -HANDLE_OTHER_INST(63, ShuffleVector, ShuffleVectorInst) // shuffle two vectors. -HANDLE_OTHER_INST(64, ExtractValue, ExtractValueInst)// extract from aggregate -HANDLE_OTHER_INST(65, InsertValue, InsertValueInst) // insert into aggregate -HANDLE_OTHER_INST(66, LandingPad, LandingPadInst) // Landing pad instruction. -HANDLE_OTHER_INST(67, Freeze, FreezeInst) // Freeze instruction. - LAST_OTHER_INST(67) + FIRST_OTHER_INST(54) +HANDLE_OTHER_INST(54, ICmp , ICmpInst ) // Integer comparison instruction +HANDLE_OTHER_INST(55, FCmp , FCmpInst ) // Floating point comparison instr. +HANDLE_OTHER_INST(56, PHI , PHINode ) // PHI node instruction +HANDLE_OTHER_INST(57, Call , CallInst ) // Call a function +HANDLE_OTHER_INST(58, Select , SelectInst ) // select instruction +HANDLE_USER_INST (59, UserOp1, Instruction) // May be used internally in a pass +HANDLE_USER_INST (60, UserOp2, Instruction) // Internal to passes only +HANDLE_OTHER_INST(61, VAArg , VAArgInst ) // vaarg instruction +HANDLE_OTHER_INST(62, ExtractElement, ExtractElementInst)// extract from vector +HANDLE_OTHER_INST(63, InsertElement, InsertElementInst) // insert into vector +HANDLE_OTHER_INST(64, ShuffleVector, ShuffleVectorInst) // shuffle two vectors. +HANDLE_OTHER_INST(65, ExtractValue, ExtractValueInst)// extract from aggregate +HANDLE_OTHER_INST(66, InsertValue, InsertValueInst) // insert into aggregate +HANDLE_OTHER_INST(67, LandingPad, LandingPadInst) // Landing pad instruction. +HANDLE_OTHER_INST(68, Freeze, FreezeInst) // Freeze instruction. + LAST_OTHER_INST(68) #undef FIRST_TERM_INST #undef HANDLE_TERM_INST diff --git a/llvm/include/llvm/IR/Instructions.h b/llvm/include/llvm/IR/Instructions.h index 6f69b68..95a0a7f 100644 --- a/llvm/include/llvm/IR/Instructions.h +++ b/llvm/include/llvm/IR/Instructions.h @@ -4949,6 +4949,46 @@ public: } }; +/// This class represents a cast from a pointer to an address (non-capturing +/// ptrtoint). +class PtrToAddrInst : public CastInst { +protected: + // Note: Instruction needs to be a friend here to call cloneImpl. + friend class Instruction; + + /// Clone an identical PtrToAddrInst. + PtrToAddrInst *cloneImpl() const; + +public: + /// Constructor with insert-before-instruction semantics + PtrToAddrInst(Value *S, ///< The value to be converted + Type *Ty, ///< The type to convert to + const Twine &NameStr = "", ///< A name for the new instruction + InsertPosition InsertBefore = + nullptr ///< Where to insert the new instruction + ); + + /// Gets the pointer operand. + Value *getPointerOperand() { return getOperand(0); } + /// Gets the pointer operand. + const Value *getPointerOperand() const { return getOperand(0); } + /// Gets the operand index of the pointer operand. + static unsigned getPointerOperandIndex() { return 0U; } + + /// Returns the address space of the pointer operand. + unsigned getPointerAddressSpace() const { + return getPointerOperand()->getType()->getPointerAddressSpace(); + } + + // Methods for support type inquiry through isa, cast, and dyn_cast: + static bool classof(const Instruction *I) { + return I->getOpcode() == PtrToAddr; + } + static bool classof(const Value *V) { + return isa<Instruction>(V) && classof(cast<Instruction>(V)); + } +}; + //===----------------------------------------------------------------------===// // BitCastInst Class //===----------------------------------------------------------------------===// diff --git a/llvm/include/llvm/IR/Intrinsics.h b/llvm/include/llvm/IR/Intrinsics.h index 48735b0..9577d01 100644 --- a/llvm/include/llvm/IR/Intrinsics.h +++ b/llvm/include/llvm/IR/Intrinsics.h @@ -104,12 +104,6 @@ namespace Intrinsic { LLVM_ABI Function *getOrInsertDeclaration(Module *M, ID id, ArrayRef<Type *> Tys = {}); - LLVM_DEPRECATED("Use getOrInsertDeclaration instead", - "getOrInsertDeclaration") - inline Function *getDeclaration(Module *M, ID id, ArrayRef<Type *> Tys = {}) { - return getOrInsertDeclaration(M, id, Tys); - } - /// Look up the Function declaration of the intrinsic \p id in the Module /// \p M and return it if it exists. Otherwise, return nullptr. This version /// supports non-overloaded intrinsics. diff --git a/llvm/include/llvm/IR/IntrinsicsRISCV.td b/llvm/include/llvm/IR/IntrinsicsRISCV.td index 99f975f..2d44c8e 100644 --- a/llvm/include/llvm/IR/IntrinsicsRISCV.td +++ b/llvm/include/llvm/IR/IntrinsicsRISCV.td @@ -1736,6 +1736,17 @@ let TargetPrefix = "riscv" in { [llvm_anyptr_ty, LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, llvm_anyint_ty]), [NoCapture<ArgIndex<nf>>, IntrWriteMem]>; + + // Input: (<stored values>..., pointer, stride, mask, vl) + def int_riscv_sseg # nf # _store_mask + : DefaultAttrsIntrinsic<[], + !listconcat([llvm_anyvector_ty], + !listsplat(LLVMMatchType<0>, + !add(nf, -1)), + [llvm_anyptr_ty, llvm_anyint_ty, + LLVMScalarOrSameVectorWidth<0, llvm_i1_ty>, + llvm_anyint_ty]), + [NoCapture<ArgIndex<nf>>, IntrWriteMem]>; } } // TargetPrefix = "riscv" diff --git a/llvm/include/llvm/IR/Operator.h b/llvm/include/llvm/IR/Operator.h index 8344eae..10816c0 100644 --- a/llvm/include/llvm/IR/Operator.h +++ b/llvm/include/llvm/IR/Operator.h @@ -595,6 +595,37 @@ struct OperandTraits<PtrToIntOperator> DEFINE_TRANSPARENT_OPERAND_ACCESSORS(PtrToIntOperator, Value) +class PtrToAddrOperator + : public ConcreteOperator<Operator, Instruction::PtrToAddr> { + friend class PtrToAddr; + friend class ConstantExpr; + +public: + /// Transparently provide more efficient getOperand methods. + DECLARE_TRANSPARENT_OPERAND_ACCESSORS(Value); + + Value *getPointerOperand() { return getOperand(0); } + const Value *getPointerOperand() const { return getOperand(0); } + + static unsigned getPointerOperandIndex() { + return 0U; // get index for modifying correct operand + } + + /// Method to return the pointer operand as a PointerType. + Type *getPointerOperandType() const { return getPointerOperand()->getType(); } + + /// Method to return the address space of the pointer operand. + unsigned getPointerAddressSpace() const { + return cast<PointerType>(getPointerOperandType())->getAddressSpace(); + } +}; + +template <> +struct OperandTraits<PtrToAddrOperator> + : public FixedNumOperandTraits<PtrToAddrOperator, 1> {}; + +DEFINE_TRANSPARENT_OPERAND_ACCESSORS(PtrToAddrOperator, Value) + class BitCastOperator : public ConcreteOperator<Operator, Instruction::BitCast> { friend class BitCastInst; diff --git a/llvm/include/llvm/ProfileData/InstrProfWriter.h b/llvm/include/llvm/ProfileData/InstrProfWriter.h index f339fe2..1b24425 100644 --- a/llvm/include/llvm/ProfileData/InstrProfWriter.h +++ b/llvm/include/llvm/ProfileData/InstrProfWriter.h @@ -226,8 +226,6 @@ private: void addRecord(StringRef Name, uint64_t Hash, InstrProfRecord &&I, uint64_t Weight, function_ref<void(Error)> Warn); bool shouldEncodeData(const ProfilingData &PD); - /// Add \p Trace using reservoir sampling. - void addTemporalProfileTrace(TemporalProfTraceTy Trace); /// Add a memprof record for a function identified by its \p Id. void addMemProfRecord(const GlobalValue::GUID Id, diff --git a/llvm/include/llvm/SandboxIR/Instruction.h b/llvm/include/llvm/SandboxIR/Instruction.h index 4e3ff19..e1c1ca0 100644 --- a/llvm/include/llvm/SandboxIR/Instruction.h +++ b/llvm/include/llvm/SandboxIR/Instruction.h @@ -2278,6 +2278,8 @@ class CastInst : public UnaryInstruction { return Opcode::FPToSI; case llvm::Instruction::FPExt: return Opcode::FPExt; + case llvm::Instruction::PtrToAddr: + return Opcode::PtrToAddr; case llvm::Instruction::PtrToInt: return Opcode::PtrToInt; case llvm::Instruction::IntToPtr: @@ -2364,6 +2366,8 @@ class FPToUIInst final : public CastInstImpl<Instruction::Opcode::FPToUI> {}; class FPToSIInst final : public CastInstImpl<Instruction::Opcode::FPToSI> {}; class IntToPtrInst final : public CastInstImpl<Instruction::Opcode::IntToPtr> { }; +class PtrToAddrInst final + : public CastInstImpl<Instruction::Opcode::PtrToAddr> {}; class PtrToIntInst final : public CastInstImpl<Instruction::Opcode::PtrToInt> { }; class BitCastInst final : public CastInstImpl<Instruction::Opcode::BitCast> {}; diff --git a/llvm/include/llvm/SandboxIR/Values.def b/llvm/include/llvm/SandboxIR/Values.def index a55abbd..72683e4 100644 --- a/llvm/include/llvm/SandboxIR/Values.def +++ b/llvm/include/llvm/SandboxIR/Values.def @@ -118,6 +118,7 @@ DEF_INSTR(Cast, OPCODES(\ OP(FPToUI) \ OP(FPToSI) \ OP(FPExt) \ + OP(PtrToAddr) \ OP(PtrToInt) \ OP(IntToPtr) \ OP(SIToFP) \ diff --git a/llvm/include/llvm/Support/Atomic.h b/llvm/include/llvm/Support/Atomic.h index a8445fd..c2d9ae2 100644 --- a/llvm/include/llvm/Support/Atomic.h +++ b/llvm/include/llvm/Support/Atomic.h @@ -17,6 +17,7 @@ #ifndef LLVM_SUPPORT_ATOMIC_H #define LLVM_SUPPORT_ATOMIC_H +#include "llvm/Support/Compiler.h" #include "llvm/Support/DataTypes.h" // Windows will at times define MemoryFence. @@ -26,16 +27,15 @@ namespace llvm { namespace sys { - void MemoryFence(); + LLVM_ABI void MemoryFence(); #ifdef _MSC_VER - typedef long cas_flag; + typedef long cas_flag; #else - typedef uint32_t cas_flag; + typedef uint32_t cas_flag; #endif - cas_flag CompareAndSwap(volatile cas_flag* ptr, - cas_flag new_value, - cas_flag old_value); + LLVM_ABI cas_flag CompareAndSwap(volatile cas_flag *ptr, cas_flag new_value, + cas_flag old_value); } } diff --git a/llvm/lib/Analysis/ConstantFolding.cpp b/llvm/lib/Analysis/ConstantFolding.cpp index dd98b62..c14cb9e 100644 --- a/llvm/lib/Analysis/ConstantFolding.cpp +++ b/llvm/lib/Analysis/ConstantFolding.cpp @@ -1485,6 +1485,9 @@ Constant *llvm::ConstantFoldCastOperand(unsigned Opcode, Constant *C, switch (Opcode) { default: llvm_unreachable("Missing case"); + case Instruction::PtrToAddr: + // TODO: Add some of the ptrtoint folds here as well. + break; case Instruction::PtrToInt: if (auto *CE = dyn_cast<ConstantExpr>(C)) { Constant *FoldedValue = nullptr; diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp index 1e70228..b0e4b00 100644 --- a/llvm/lib/Analysis/ValueTracking.cpp +++ b/llvm/lib/Analysis/ValueTracking.cpp @@ -9147,7 +9147,8 @@ static bool matchTwoInputRecurrence(const PHINode *PN, InstTy *&Inst, return false; for (unsigned I = 0; I != 2; ++I) { - if (auto *Operation = dyn_cast<InstTy>(PN->getIncomingValue(I))) { + if (auto *Operation = dyn_cast<InstTy>(PN->getIncomingValue(I)); + Operation && Operation->getNumOperands() >= 2) { Value *LHS = Operation->getOperand(0); Value *RHS = Operation->getOperand(1); if (LHS != PN && RHS != PN) diff --git a/llvm/lib/AsmParser/LLLexer.cpp b/llvm/lib/AsmParser/LLLexer.cpp index 520c6a0..3d5bd61 100644 --- a/llvm/lib/AsmParser/LLLexer.cpp +++ b/llvm/lib/AsmParser/LLLexer.cpp @@ -928,6 +928,7 @@ lltok::Kind LLLexer::LexIdentifier() { INSTKEYWORD(fptoui, FPToUI); INSTKEYWORD(fptosi, FPToSI); INSTKEYWORD(inttoptr, IntToPtr); + INSTKEYWORD(ptrtoaddr, PtrToAddr); INSTKEYWORD(ptrtoint, PtrToInt); INSTKEYWORD(bitcast, BitCast); INSTKEYWORD(addrspacecast, AddrSpaceCast); diff --git a/llvm/lib/AsmParser/LLParser.cpp b/llvm/lib/AsmParser/LLParser.cpp index 13bef1f..1bc2906 100644 --- a/llvm/lib/AsmParser/LLParser.cpp +++ b/llvm/lib/AsmParser/LLParser.cpp @@ -4273,6 +4273,7 @@ bool LLParser::parseValID(ValID &ID, PerFunctionState *PFS, Type *ExpectedTy) { case lltok::kw_bitcast: case lltok::kw_addrspacecast: case lltok::kw_inttoptr: + case lltok::kw_ptrtoaddr: case lltok::kw_ptrtoint: { unsigned Opc = Lex.getUIntVal(); Type *DestTy = nullptr; @@ -7310,6 +7311,7 @@ int LLParser::parseInstruction(Instruction *&Inst, BasicBlock *BB, case lltok::kw_fptoui: case lltok::kw_fptosi: case lltok::kw_inttoptr: + case lltok::kw_ptrtoaddr: case lltok::kw_ptrtoint: return parseCast(Inst, PFS, KeywordVal); case lltok::kw_fptrunc: diff --git a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp index 290d873..22a0d0f 100644 --- a/llvm/lib/Bitcode/Reader/BitcodeReader.cpp +++ b/llvm/lib/Bitcode/Reader/BitcodeReader.cpp @@ -1283,6 +1283,7 @@ static int getDecodedCastOpcode(unsigned Val) { case bitc::CAST_SITOFP : return Instruction::SIToFP; case bitc::CAST_FPTRUNC : return Instruction::FPTrunc; case bitc::CAST_FPEXT : return Instruction::FPExt; + case bitc::CAST_PTRTOADDR: return Instruction::PtrToAddr; case bitc::CAST_PTRTOINT: return Instruction::PtrToInt; case bitc::CAST_INTTOPTR: return Instruction::IntToPtr; case bitc::CAST_BITCAST : return Instruction::BitCast; diff --git a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp index 05680fa..a3f8254 100644 --- a/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp +++ b/llvm/lib/Bitcode/Writer/BitcodeWriter.cpp @@ -647,6 +647,7 @@ static unsigned getEncodedCastOpcode(unsigned Opcode) { case Instruction::SIToFP : return bitc::CAST_SITOFP; case Instruction::FPTrunc : return bitc::CAST_FPTRUNC; case Instruction::FPExt : return bitc::CAST_FPEXT; + case Instruction::PtrToAddr: return bitc::CAST_PTRTOADDR; case Instruction::PtrToInt: return bitc::CAST_PTRTOINT; case Instruction::IntToPtr: return bitc::CAST_INTTOPTR; case Instruction::BitCast : return bitc::CAST_BITCAST; diff --git a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp index c72b6e8..23a3543 100644 --- a/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp +++ b/llvm/lib/CodeGen/AsmPrinter/AsmPrinter.cpp @@ -3657,6 +3657,7 @@ const MCExpr *AsmPrinter::lowerConstant(const Constant *CV, break; // Error } + case Instruction::PtrToAddr: case Instruction::PtrToInt: { const DataLayout &DL = getDataLayout(); diff --git a/llvm/lib/CodeGen/RegisterPressure.cpp b/llvm/lib/CodeGen/RegisterPressure.cpp index ca51b67..5f37890 100644 --- a/llvm/lib/CodeGen/RegisterPressure.cpp +++ b/llvm/lib/CodeGen/RegisterPressure.cpp @@ -1001,7 +1001,7 @@ static void computeMaxPressureDelta(ArrayRef<unsigned> OldMaxPressureVec, ++CritIdx; if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == i) { - int PDiff = (int)PNew - (int)CriticalPSets[CritIdx].getUnitInc(); + int PDiff = (int)PNew - CriticalPSets[CritIdx].getUnitInc(); if (PDiff > 0) { Delta.CriticalMax = PressureChange(i); Delta.CriticalMax.setUnitInc(PDiff); @@ -1191,7 +1191,7 @@ getUpwardPressureDelta(const MachineInstr *MI, /*const*/ PressureDiff &PDiff, ++CritIdx; if (CritIdx != CritEnd && CriticalPSets[CritIdx].getPSet() == PSetID) { - int CritInc = (int)MNew - (int)CriticalPSets[CritIdx].getUnitInc(); + int CritInc = (int)MNew - CriticalPSets[CritIdx].getUnitInc(); if (CritInc > 0 && CritInc <= std::numeric_limits<int16_t>::max()) { Delta.CriticalMax = PressureChange(PSetID); Delta.CriticalMax.setUnitInc(CritInc); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 0d1e954..48ab797 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -3977,6 +3977,11 @@ void SelectionDAGBuilder::visitSIToFP(const User &I) { setValue(&I, DAG.getNode(ISD::SINT_TO_FP, getCurSDLoc(), DestVT, N)); } +void SelectionDAGBuilder::visitPtrToAddr(const User &I) { + // FIXME: this is not correct for pointers with addr width != pointer width + visitPtrToInt(I); +} + void SelectionDAGBuilder::visitPtrToInt(const User &I) { // What to do depends on the size of the integer and the size of the pointer. // We can either truncate, zero extend, or no-op, accordingly. diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h index c251755..e0835e6 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h @@ -574,6 +574,7 @@ private: void visitFPToSI(const User &I); void visitUIToFP(const User &I); void visitSIToFP(const User &I); + void visitPtrToAddr(const User &I); void visitPtrToInt(const User &I); void visitIntToPtr(const User &I); void visitBitCast(const User &I); diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index bf4c9f9..d80a229 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1893,6 +1893,7 @@ int TargetLoweringBase::InstructionOpcodeToISD(unsigned Opcode) const { case SIToFP: return ISD::SINT_TO_FP; case FPTrunc: return ISD::FP_ROUND; case FPExt: return ISD::FP_EXTEND; + case PtrToAddr: return ISD::BITCAST; case PtrToInt: return ISD::BITCAST; case IntToPtr: return ISD::BITCAST; case BitCast: return ISD::BITCAST; diff --git a/llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp b/llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp index 9d84aa8..72308a3d 100644 --- a/llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp +++ b/llvm/lib/Frontend/HLSL/RootSignatureValidations.cpp @@ -29,7 +29,7 @@ bool verifyRegisterValue(uint32_t RegisterValue) { // This Range is reserverved, therefore invalid, according to the spec // https://github.com/llvm/wg-hlsl/blob/main/proposals/0002-root-signature-in-clang.md#all-the-values-should-be-legal bool verifyRegisterSpace(uint32_t RegisterSpace) { - return !(RegisterSpace >= 0xFFFFFFF0 && RegisterSpace <= 0xFFFFFFFF); + return !(RegisterSpace >= 0xFFFFFFF0); } bool verifyRootDescriptorFlag(uint32_t Version, uint32_t FlagsVal) { diff --git a/llvm/lib/IR/ConstantFold.cpp b/llvm/lib/IR/ConstantFold.cpp index d4ad21e..6b202ba 100644 --- a/llvm/lib/IR/ConstantFold.cpp +++ b/llvm/lib/IR/ConstantFold.cpp @@ -254,6 +254,7 @@ Constant *llvm::ConstantFoldCastInstruction(unsigned opc, Constant *V, return FoldBitCast(V, DestTy); case Instruction::AddrSpaceCast: case Instruction::IntToPtr: + case Instruction::PtrToAddr: case Instruction::PtrToInt: return nullptr; } diff --git a/llvm/lib/IR/ConstantRange.cpp b/llvm/lib/IR/ConstantRange.cpp index e09c139..2fcdbcc6 100644 --- a/llvm/lib/IR/ConstantRange.cpp +++ b/llvm/lib/IR/ConstantRange.cpp @@ -829,6 +829,7 @@ ConstantRange ConstantRange::castOp(Instruction::CastOps CastOp, case Instruction::FPTrunc: case Instruction::FPExt: case Instruction::IntToPtr: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::AddrSpaceCast: // Conservatively return getFull set. diff --git a/llvm/lib/IR/Constants.cpp b/llvm/lib/IR/Constants.cpp index a3c725b..c7e3113a 100644 --- a/llvm/lib/IR/Constants.cpp +++ b/llvm/lib/IR/Constants.cpp @@ -1567,6 +1567,7 @@ Constant *ConstantExpr::getWithOperands(ArrayRef<Constant *> Ops, Type *Ty, case Instruction::SIToFP: case Instruction::FPToUI: case Instruction::FPToSI: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::IntToPtr: case Instruction::BitCast: @@ -2223,6 +2224,8 @@ Constant *ConstantExpr::getCast(unsigned oc, Constant *C, Type *Ty, llvm_unreachable("Invalid cast opcode"); case Instruction::Trunc: return getTrunc(C, Ty, OnlyIfReduced); + case Instruction::PtrToAddr: + return getPtrToAddr(C, Ty, OnlyIfReduced); case Instruction::PtrToInt: return getPtrToInt(C, Ty, OnlyIfReduced); case Instruction::IntToPtr: @@ -2280,6 +2283,20 @@ Constant *ConstantExpr::getTrunc(Constant *C, Type *Ty, bool OnlyIfReduced) { return getFoldedCast(Instruction::Trunc, C, Ty, OnlyIfReduced); } +Constant *ConstantExpr::getPtrToAddr(Constant *C, Type *DstTy, + bool OnlyIfReduced) { + assert(C->getType()->isPtrOrPtrVectorTy() && + "PtrToAddr source must be pointer or pointer vector"); + assert(DstTy->isIntOrIntVectorTy() && + "PtrToAddr destination must be integer or integer vector"); + assert(isa<VectorType>(C->getType()) == isa<VectorType>(DstTy)); + if (isa<VectorType>(C->getType())) + assert(cast<VectorType>(C->getType())->getElementCount() == + cast<VectorType>(DstTy)->getElementCount() && + "Invalid cast between a different number of vector elements"); + return getFoldedCast(Instruction::PtrToAddr, C, DstTy, OnlyIfReduced); +} + Constant *ConstantExpr::getPtrToInt(Constant *C, Type *DstTy, bool OnlyIfReduced) { assert(C->getType()->isPtrOrPtrVectorTy() && @@ -2435,6 +2452,7 @@ bool ConstantExpr::isDesirableCastOp(unsigned Opcode) { case Instruction::FPToSI: return false; case Instruction::Trunc: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::IntToPtr: case Instruction::BitCast: @@ -2457,6 +2475,7 @@ bool ConstantExpr::isSupportedCastOp(unsigned Opcode) { case Instruction::FPToSI: return false; case Instruction::Trunc: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::IntToPtr: case Instruction::BitCast: @@ -3401,6 +3420,7 @@ Instruction *ConstantExpr::getAsInstruction() const { switch (getOpcode()) { case Instruction::Trunc: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::IntToPtr: case Instruction::BitCast: diff --git a/llvm/lib/IR/DebugInfoMetadata.cpp b/llvm/lib/IR/DebugInfoMetadata.cpp index f1d4549..96065ed 100644 --- a/llvm/lib/IR/DebugInfoMetadata.cpp +++ b/llvm/lib/IR/DebugInfoMetadata.cpp @@ -57,15 +57,9 @@ DebugVariable::DebugVariable(const DbgVariableRecord *DVR) DILocation::DILocation(LLVMContext &C, StorageType Storage, unsigned Line, unsigned Column, uint64_t AtomGroup, uint8_t AtomRank, ArrayRef<Metadata *> MDs, bool ImplicitCode) - : MDNode(C, DILocationKind, Storage, MDs) -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS - , - AtomGroup(AtomGroup), AtomRank(AtomRank) -#endif -{ -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS + : MDNode(C, DILocationKind, Storage, MDs), AtomGroup(AtomGroup), + AtomRank(AtomRank) { assert(AtomRank <= 7 && "AtomRank number should fit in 3 bits"); -#endif if (AtomGroup) C.updateDILocationAtomGroupWaterline(AtomGroup + 1); diff --git a/llvm/lib/IR/Globals.cpp b/llvm/lib/IR/Globals.cpp index 7b799c7..11d33e2 100644 --- a/llvm/lib/IR/Globals.cpp +++ b/llvm/lib/IR/Globals.cpp @@ -404,6 +404,7 @@ findBaseObject(const Constant *C, DenseSet<const GlobalAlias *> &Aliases, return findBaseObject(CE->getOperand(0), Aliases, Op); } case Instruction::IntToPtr: + case Instruction::PtrToAddr: case Instruction::PtrToInt: case Instruction::BitCast: case Instruction::GetElementPtr: diff --git a/llvm/lib/IR/Instruction.cpp b/llvm/lib/IR/Instruction.cpp index b7cd12a..4540268 100644 --- a/llvm/lib/IR/Instruction.cpp +++ b/llvm/lib/IR/Instruction.cpp @@ -817,6 +817,7 @@ const char *Instruction::getOpcodeName(unsigned OpCode) { case UIToFP: return "uitofp"; case SIToFP: return "sitofp"; case IntToPtr: return "inttoptr"; + case PtrToAddr: return "ptrtoaddr"; case PtrToInt: return "ptrtoint"; case BitCast: return "bitcast"; case AddrSpaceCast: return "addrspacecast"; diff --git a/llvm/lib/IR/Instructions.cpp b/llvm/lib/IR/Instructions.cpp index b896382..a1751c0 100644 --- a/llvm/lib/IR/Instructions.cpp +++ b/llvm/lib/IR/Instructions.cpp @@ -2798,6 +2798,7 @@ bool CastInst::isNoopCast(Instruction::CastOps Opcode, return false; case Instruction::BitCast: return true; // BitCast never modifies bits. + case Instruction::PtrToAddr: case Instruction::PtrToInt: return DL.getIntPtrType(SrcTy)->getScalarSizeInBits() == DestTy->getScalarSizeInBits(); @@ -2855,26 +2856,29 @@ unsigned CastInst::isEliminableCastPair( // same reason. const unsigned numCastOps = Instruction::CastOpsEnd - Instruction::CastOpsBegin; + // clang-format off static const uint8_t CastResults[numCastOps][numCastOps] = { - // T F F U S F F P I B A -+ - // R Z S P P I I T P 2 N T S | - // U E E 2 2 2 2 R E I T C C +- secondOp - // N X X U S F F N X N 2 V V | - // C T T I I P P C T T P T T -+ - { 1, 0, 0,99,99, 0, 0,99,99,99, 0, 3, 0}, // Trunc -+ - { 8, 1, 9,99,99, 2,17,99,99,99, 2, 3, 0}, // ZExt | - { 8, 0, 1,99,99, 0, 2,99,99,99, 0, 3, 0}, // SExt | - { 0, 0, 0,99,99, 0, 0,99,99,99, 0, 3, 0}, // FPToUI | - { 0, 0, 0,99,99, 0, 0,99,99,99, 0, 3, 0}, // FPToSI | - { 99,99,99, 0, 0,99,99, 0, 0,99,99, 4, 0}, // UIToFP +- firstOp - { 99,99,99, 0, 0,99,99, 0, 0,99,99, 4, 0}, // SIToFP | - { 99,99,99, 0, 0,99,99, 0, 0,99,99, 4, 0}, // FPTrunc | - { 99,99,99, 2, 2,99,99, 8, 2,99,99, 4, 0}, // FPExt | - { 1, 0, 0,99,99, 0, 0,99,99,99, 7, 3, 0}, // PtrToInt | - { 99,99,99,99,99,99,99,99,99,11,99,15, 0}, // IntToPtr | - { 5, 5, 5, 0, 0, 5, 5, 0, 0,16, 5, 1,14}, // BitCast | - { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,13,12}, // AddrSpaceCast -+ + // T F F U S F F P P I B A -+ + // R Z S P P I I T P 2 2 N T S | + // U E E 2 2 2 2 R E I A T C C +- secondOp + // N X X U S F F N X N D 2 V V | + // C T T I I P P C T T R P T T -+ + { 1, 0, 0,99,99, 0, 0,99,99,99,99, 0, 3, 0}, // Trunc -+ + { 8, 1, 9,99,99, 2,17,99,99,99,99, 2, 3, 0}, // ZExt | + { 8, 0, 1,99,99, 0, 2,99,99,99,99, 0, 3, 0}, // SExt | + { 0, 0, 0,99,99, 0, 0,99,99,99,99, 0, 3, 0}, // FPToUI | + { 0, 0, 0,99,99, 0, 0,99,99,99,99, 0, 3, 0}, // FPToSI | + { 99,99,99, 0, 0,99,99, 0, 0,99,99,99, 4, 0}, // UIToFP +- firstOp + { 99,99,99, 0, 0,99,99, 0, 0,99,99,99, 4, 0}, // SIToFP | + { 99,99,99, 0, 0,99,99, 0, 0,99,99,99, 4, 0}, // FPTrunc | + { 99,99,99, 2, 2,99,99, 8, 2,99,99,99, 4, 0}, // FPExt | + { 1, 0, 0,99,99, 0, 0,99,99,99,99, 7, 3, 0}, // PtrToInt | + { 1, 0, 0,99,99, 0, 0,99,99,99,99, 0, 3, 0}, // PtrToAddr | + { 99,99,99,99,99,99,99,99,99,11,99,99,15, 0}, // IntToPtr | + { 5, 5, 5, 0, 0, 5, 5, 0, 0,16,16, 5, 1,14}, // BitCast | + { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,13,12}, // AddrSpaceCast -+ }; + // clang-format on // TODO: This logic could be encoded into the table above and handled in the // switch below. @@ -3046,6 +3050,7 @@ CastInst *CastInst::Create(Instruction::CastOps op, Value *S, Type *Ty, case SIToFP: return new SIToFPInst (S, Ty, Name, InsertBefore); case FPToUI: return new FPToUIInst (S, Ty, Name, InsertBefore); case FPToSI: return new FPToSIInst (S, Ty, Name, InsertBefore); + case PtrToAddr: return new PtrToAddrInst (S, Ty, Name, InsertBefore); case PtrToInt: return new PtrToIntInst (S, Ty, Name, InsertBefore); case IntToPtr: return new IntToPtrInst (S, Ty, Name, InsertBefore); case BitCast: @@ -3347,6 +3352,7 @@ CastInst::castIsValid(Instruction::CastOps op, Type *SrcTy, Type *DstTy) { case Instruction::FPToSI: return SrcTy->isFPOrFPVectorTy() && DstTy->isIntOrIntVectorTy() && SrcEC == DstEC; + case Instruction::PtrToAddr: case Instruction::PtrToInt: if (SrcEC != DstEC) return false; @@ -3460,6 +3466,12 @@ PtrToIntInst::PtrToIntInst(Value *S, Type *Ty, const Twine &Name, assert(castIsValid(getOpcode(), S, Ty) && "Illegal PtrToInt"); } +PtrToAddrInst::PtrToAddrInst(Value *S, Type *Ty, const Twine &Name, + InsertPosition InsertBefore) + : CastInst(Ty, PtrToAddr, S, Name, InsertBefore) { + assert(castIsValid(getOpcode(), S, Ty) && "Illegal PtrToAddr"); +} + IntToPtrInst::IntToPtrInst(Value *S, Type *Ty, const Twine &Name, InsertPosition InsertBefore) : CastInst(Ty, IntToPtr, S, Name, InsertBefore) { @@ -4427,6 +4439,10 @@ PtrToIntInst *PtrToIntInst::cloneImpl() const { return new PtrToIntInst(getOperand(0), getType()); } +PtrToAddrInst *PtrToAddrInst::cloneImpl() const { + return new PtrToAddrInst(getOperand(0), getType()); +} + IntToPtrInst *IntToPtrInst::cloneImpl() const { return new IntToPtrInst(getOperand(0), getType()); } diff --git a/llvm/lib/IR/LLVMContextImpl.h b/llvm/lib/IR/LLVMContextImpl.h index aa2a60e..e03f993 100644 --- a/llvm/lib/IR/LLVMContextImpl.h +++ b/llvm/lib/IR/LLVMContextImpl.h @@ -312,10 +312,8 @@ template <> struct MDNodeKeyImpl<MDTuple> : MDNodeOpsKey { template <> struct MDNodeKeyImpl<DILocation> { Metadata *Scope; Metadata *InlinedAt; -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS uint64_t AtomGroup : 61; uint64_t AtomRank : 3; -#endif unsigned Line; uint16_t Column; bool ImplicitCode; @@ -323,36 +321,24 @@ template <> struct MDNodeKeyImpl<DILocation> { MDNodeKeyImpl(unsigned Line, uint16_t Column, Metadata *Scope, Metadata *InlinedAt, bool ImplicitCode, uint64_t AtomGroup, uint8_t AtomRank) - : Scope(Scope), InlinedAt(InlinedAt), -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS - AtomGroup(AtomGroup), AtomRank(AtomRank), -#endif - Line(Line), Column(Column), ImplicitCode(ImplicitCode) { - } + : Scope(Scope), InlinedAt(InlinedAt), AtomGroup(AtomGroup), + AtomRank(AtomRank), Line(Line), Column(Column), + ImplicitCode(ImplicitCode) {} MDNodeKeyImpl(const DILocation *L) : Scope(L->getRawScope()), InlinedAt(L->getRawInlinedAt()), -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS AtomGroup(L->getAtomGroup()), AtomRank(L->getAtomRank()), -#endif Line(L->getLine()), Column(L->getColumn()), - ImplicitCode(L->isImplicitCode()) { - } + ImplicitCode(L->isImplicitCode()) {} bool isKeyOf(const DILocation *RHS) const { return Line == RHS->getLine() && Column == RHS->getColumn() && Scope == RHS->getRawScope() && InlinedAt == RHS->getRawInlinedAt() && - ImplicitCode == RHS->isImplicitCode() -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS - && AtomGroup == RHS->getAtomGroup() && - AtomRank == RHS->getAtomRank(); -#else - ; -#endif + ImplicitCode == RHS->isImplicitCode() && + AtomGroup == RHS->getAtomGroup() && AtomRank == RHS->getAtomRank(); } unsigned getHashValue() const { -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS // Hashing AtomGroup and AtomRank substantially impacts performance whether // Key Instructions is enabled or not. We can't detect whether it's enabled // here cheaply; avoiding hashing zero values is a good approximation. This @@ -363,7 +349,6 @@ template <> struct MDNodeKeyImpl<DILocation> { if (AtomGroup || AtomRank) return hash_combine(Line, Column, Scope, InlinedAt, ImplicitCode, AtomGroup, (uint8_t)AtomRank); -#endif return hash_combine(Line, Column, Scope, InlinedAt, ImplicitCode); } }; diff --git a/llvm/lib/IR/Value.cpp b/llvm/lib/IR/Value.cpp index 129ca4a..5928c89 100644 --- a/llvm/lib/IR/Value.cpp +++ b/llvm/lib/IR/Value.cpp @@ -747,34 +747,28 @@ const Value *Value::stripAndAccumulateConstantOffsets( // means when we construct GEPOffset, we need to use the size // of GEP's pointer type rather than the size of the original // pointer type. - unsigned CurBitWidth = DL.getIndexTypeSizeInBits(V->getType()); - if (CurBitWidth == BitWidth) { - if (!GEP->accumulateConstantOffset(DL, Offset, ExternalAnalysis)) - return V; - } else { - APInt GEPOffset(CurBitWidth, 0); - if (!GEP->accumulateConstantOffset(DL, GEPOffset, ExternalAnalysis)) - return V; + APInt GEPOffset(DL.getIndexTypeSizeInBits(V->getType()), 0); + if (!GEP->accumulateConstantOffset(DL, GEPOffset, ExternalAnalysis)) + return V; - // Stop traversal if the pointer offset wouldn't fit in the bit-width - // provided by the Offset argument. This can happen due to AddrSpaceCast - // stripping. - if (GEPOffset.getSignificantBits() > BitWidth) - return V; + // Stop traversal if the pointer offset wouldn't fit in the bit-width + // provided by the Offset argument. This can happen due to AddrSpaceCast + // stripping. + if (GEPOffset.getSignificantBits() > BitWidth) + return V; - // External Analysis can return a result higher/lower than the value - // represents. We need to detect overflow/underflow. - APInt GEPOffsetST = GEPOffset.sextOrTrunc(BitWidth); - if (!ExternalAnalysis) { - Offset += GEPOffsetST; - } else { - bool Overflow = false; - APInt OldOffset = Offset; - Offset = Offset.sadd_ov(GEPOffsetST, Overflow); - if (Overflow) { - Offset = OldOffset; - return V; - } + // External Analysis can return a result higher/lower than the value + // represents. We need to detect overflow/underflow. + APInt GEPOffsetST = GEPOffset.sextOrTrunc(BitWidth); + if (!ExternalAnalysis) { + Offset += GEPOffsetST; + } else { + bool Overflow = false; + APInt OldOffset = Offset; + Offset = Offset.sadd_ov(GEPOffsetST, Overflow); + if (Overflow) { + Offset = OldOffset; + return V; } } V = GEP->getPointerOperand(); diff --git a/llvm/lib/IR/Verifier.cpp b/llvm/lib/IR/Verifier.cpp index f5dcb5e..1d3c379 100644 --- a/llvm/lib/IR/Verifier.cpp +++ b/llvm/lib/IR/Verifier.cpp @@ -566,6 +566,8 @@ private: void visitUIToFPInst(UIToFPInst &I); void visitSIToFPInst(SIToFPInst &I); void visitIntToPtrInst(IntToPtrInst &I); + void checkPtrToAddr(Type *SrcTy, Type *DestTy, const Value &V); + void visitPtrToAddrInst(PtrToAddrInst &I); void visitPtrToIntInst(PtrToIntInst &I); void visitBitCastInst(BitCastInst &I); void visitAddrSpaceCastInst(AddrSpaceCastInst &I); @@ -834,6 +836,7 @@ void Verifier::visitGlobalVariable(const GlobalVariable &GV) { &GV); Check(GV.getInitializer()->getType()->isSized(), "Global variable initializer must be sized", &GV); + visitConstantExprsRecursively(GV.getInitializer()); // If the global has common linkage, it must have a zero initializer and // cannot be constant. if (GV.hasCommonLinkage()) { @@ -2610,6 +2613,8 @@ void Verifier::visitConstantExpr(const ConstantExpr *CE) { Check(CastInst::castIsValid(Instruction::BitCast, CE->getOperand(0), CE->getType()), "Invalid bitcast", CE); + else if (CE->getOpcode() == Instruction::PtrToAddr) + checkPtrToAddr(CE->getOperand(0)->getType(), CE->getType(), *CE); } void Verifier::visitConstantPtrAuth(const ConstantPtrAuth *CPA) { @@ -3532,6 +3537,28 @@ void Verifier::visitFPToSIInst(FPToSIInst &I) { visitInstruction(I); } +void Verifier::checkPtrToAddr(Type *SrcTy, Type *DestTy, const Value &V) { + Check(SrcTy->isPtrOrPtrVectorTy(), "PtrToAddr source must be pointer", V); + Check(DestTy->isIntOrIntVectorTy(), "PtrToAddr result must be integral", V); + Check(SrcTy->isVectorTy() == DestTy->isVectorTy(), "PtrToAddr type mismatch", + V); + + if (SrcTy->isVectorTy()) { + auto *VSrc = cast<VectorType>(SrcTy); + auto *VDest = cast<VectorType>(DestTy); + Check(VSrc->getElementCount() == VDest->getElementCount(), + "PtrToAddr vector length mismatch", V); + } + + Type *AddrTy = DL.getAddressType(SrcTy); + Check(AddrTy == DestTy, "PtrToAddr result must be address width", V); +} + +void Verifier::visitPtrToAddrInst(PtrToAddrInst &I) { + checkPtrToAddr(I.getOperand(0)->getType(), I.getType(), I); + visitInstruction(I); +} + void Verifier::visitPtrToIntInst(PtrToIntInst &I) { // Get the source and destination types Type *SrcTy = I.getOperand(0)->getType(); @@ -3547,7 +3574,7 @@ void Verifier::visitPtrToIntInst(PtrToIntInst &I) { auto *VSrc = cast<VectorType>(SrcTy); auto *VDest = cast<VectorType>(DestTy); Check(VSrc->getElementCount() == VDest->getElementCount(), - "PtrToInt Vector width mismatch", &I); + "PtrToInt Vector length mismatch", &I); } visitInstruction(I); @@ -3567,7 +3594,7 @@ void Verifier::visitIntToPtrInst(IntToPtrInst &I) { auto *VSrc = cast<VectorType>(SrcTy); auto *VDest = cast<VectorType>(DestTy); Check(VSrc->getElementCount() == VDest->getElementCount(), - "IntToPtr Vector width mismatch", &I); + "IntToPtr Vector length mismatch", &I); } visitInstruction(I); } diff --git a/llvm/lib/ProfileData/InstrProfWriter.cpp b/llvm/lib/ProfileData/InstrProfWriter.cpp index 7ca26aa..df807fc 100644 --- a/llvm/lib/ProfileData/InstrProfWriter.cpp +++ b/llvm/lib/ProfileData/InstrProfWriter.cpp @@ -331,61 +331,34 @@ void InstrProfWriter::addDataAccessProfData( DataAccessProfileData = std::move(DataAccessProfDataIn); } -void InstrProfWriter::addTemporalProfileTrace(TemporalProfTraceTy Trace) { - assert(Trace.FunctionNameRefs.size() <= MaxTemporalProfTraceLength); - assert(!Trace.FunctionNameRefs.empty()); - if (TemporalProfTraceStreamSize < TemporalProfTraceReservoirSize) { - // Simply append the trace if we have not yet hit our reservoir size limit. - TemporalProfTraces.push_back(std::move(Trace)); - } else { - // Otherwise, replace a random trace in the stream. - std::uniform_int_distribution<uint64_t> Distribution( - 0, TemporalProfTraceStreamSize); - uint64_t RandomIndex = Distribution(RNG); - if (RandomIndex < TemporalProfTraces.size()) - TemporalProfTraces[RandomIndex] = std::move(Trace); - } - ++TemporalProfTraceStreamSize; -} - void InstrProfWriter::addTemporalProfileTraces( SmallVectorImpl<TemporalProfTraceTy> &SrcTraces, uint64_t SrcStreamSize) { + if (TemporalProfTraces.size() > TemporalProfTraceReservoirSize) + TemporalProfTraces.truncate(TemporalProfTraceReservoirSize); for (auto &Trace : SrcTraces) if (Trace.FunctionNameRefs.size() > MaxTemporalProfTraceLength) Trace.FunctionNameRefs.resize(MaxTemporalProfTraceLength); llvm::erase_if(SrcTraces, [](auto &T) { return T.FunctionNameRefs.empty(); }); - // Assume that the source has the same reservoir size as the destination to - // avoid needing to record it in the indexed profile format. - bool IsDestSampled = - (TemporalProfTraceStreamSize > TemporalProfTraceReservoirSize); - bool IsSrcSampled = (SrcStreamSize > TemporalProfTraceReservoirSize); - if (!IsDestSampled && IsSrcSampled) { - // If one of the traces are sampled, ensure that it belongs to Dest. - std::swap(TemporalProfTraces, SrcTraces); - std::swap(TemporalProfTraceStreamSize, SrcStreamSize); - std::swap(IsDestSampled, IsSrcSampled); - } - if (!IsSrcSampled) { - // If the source stream is not sampled, we add each source trace normally. - for (auto &Trace : SrcTraces) - addTemporalProfileTrace(std::move(Trace)); + // If there are no source traces, it is probably because + // --temporal-profile-max-trace-length=0 was set to deliberately remove all + // traces. In that case, we do not want to increase the stream size + if (SrcTraces.empty()) return; - } - // Otherwise, we find the traces that would have been removed if we added - // the whole source stream. - SmallSetVector<uint64_t, 8> IndicesToReplace; - for (uint64_t I = 0; I < SrcStreamSize; I++) { - std::uniform_int_distribution<uint64_t> Distribution( - 0, TemporalProfTraceStreamSize); + // Add traces until our reservoir is full or we run out of source traces + auto SrcTraceIt = SrcTraces.begin(); + while (TemporalProfTraces.size() < TemporalProfTraceReservoirSize && + SrcTraceIt < SrcTraces.end()) + TemporalProfTraces.push_back(*SrcTraceIt++); + // Our reservoir is full, we need to sample the source stream + llvm::shuffle(SrcTraceIt, SrcTraces.end(), RNG); + for (uint64_t I = TemporalProfTraces.size(); + I < SrcStreamSize && SrcTraceIt < SrcTraces.end(); I++) { + std::uniform_int_distribution<uint64_t> Distribution(0, I); uint64_t RandomIndex = Distribution(RNG); if (RandomIndex < TemporalProfTraces.size()) - IndicesToReplace.insert(RandomIndex); - ++TemporalProfTraceStreamSize; + TemporalProfTraces[RandomIndex] = *SrcTraceIt++; } - // Then we insert a random sample of the source traces. - llvm::shuffle(SrcTraces.begin(), SrcTraces.end(), RNG); - for (const auto &[Index, Trace] : llvm::zip(IndicesToReplace, SrcTraces)) - TemporalProfTraces[Index] = std::move(Trace); + TemporalProfTraceStreamSize += SrcStreamSize; } void InstrProfWriter::mergeRecordsFromWriter(InstrProfWriter &&IPW, diff --git a/llvm/lib/SandboxIR/Context.cpp b/llvm/lib/SandboxIR/Context.cpp index fe34037..70ac68a 100644 --- a/llvm/lib/SandboxIR/Context.cpp +++ b/llvm/lib/SandboxIR/Context.cpp @@ -256,6 +256,7 @@ Value *Context::getOrCreateValueInternal(llvm::Value *LLVMV, llvm::User *U) { case llvm::Instruction::FPToUI: case llvm::Instruction::FPToSI: case llvm::Instruction::FPExt: + case llvm::Instruction::PtrToAddr: case llvm::Instruction::PtrToInt: case llvm::Instruction::IntToPtr: case llvm::Instruction::SIToFP: diff --git a/llvm/lib/SandboxIR/Instruction.cpp b/llvm/lib/SandboxIR/Instruction.cpp index 956047c..1a81d18 100644 --- a/llvm/lib/SandboxIR/Instruction.cpp +++ b/llvm/lib/SandboxIR/Instruction.cpp @@ -1007,6 +1007,9 @@ static llvm::Instruction::CastOps getLLVMCastOp(Instruction::Opcode Opc) { return static_cast<llvm::Instruction::CastOps>(llvm::Instruction::FPToSI); case Instruction::Opcode::FPExt: return static_cast<llvm::Instruction::CastOps>(llvm::Instruction::FPExt); + case Instruction::Opcode::PtrToAddr: + return static_cast<llvm::Instruction::CastOps>( + llvm::Instruction::PtrToAddr); case Instruction::Opcode::PtrToInt: return static_cast<llvm::Instruction::CastOps>(llvm::Instruction::PtrToInt); case Instruction::Opcode::IntToPtr: diff --git a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp index e4aa8b8..e63b937 100644 --- a/llvm/lib/Target/RISCV/RISCVISelLowering.cpp +++ b/llvm/lib/Target/RISCV/RISCVISelLowering.cpp @@ -1844,6 +1844,17 @@ bool RISCVTargetLowering::getTgtMemIntrinsic(IntrinsicInfo &Info, return SetRVVLoadStoreInfo(/*PtrOp*/ I.arg_size() - 3, /*IsStore*/ true, /*IsUnitStrided*/ false, /*UsePtrVal*/ true); + case Intrinsic::riscv_sseg2_store_mask: + case Intrinsic::riscv_sseg3_store_mask: + case Intrinsic::riscv_sseg4_store_mask: + case Intrinsic::riscv_sseg5_store_mask: + case Intrinsic::riscv_sseg6_store_mask: + case Intrinsic::riscv_sseg7_store_mask: + case Intrinsic::riscv_sseg8_store_mask: + // Operands are (vec, ..., vec, ptr, offset, mask, vl) + return SetRVVLoadStoreInfo(/*PtrOp*/ I.arg_size() - 4, + /*IsStore*/ true, + /*IsUnitStrided*/ false, /*UsePtrVal*/ true); case Intrinsic::riscv_vlm: return SetRVVLoadStoreInfo(/*PtrOp*/ 0, /*IsStore*/ false, @@ -11084,69 +11095,118 @@ SDValue RISCVTargetLowering::LowerINTRINSIC_W_CHAIN(SDValue Op, return lowerVectorIntrinsicScalars(Op, DAG, Subtarget); } -SDValue RISCVTargetLowering::LowerINTRINSIC_VOID(SDValue Op, - SelectionDAG &DAG) const { - unsigned IntNo = Op.getConstantOperandVal(1); +static SDValue +lowerFixedVectorSegStoreIntrinsics(unsigned IntNo, SDValue Op, + const RISCVSubtarget &Subtarget, + SelectionDAG &DAG) { + bool IsStrided; switch (IntNo) { - default: - break; case Intrinsic::riscv_seg2_store_mask: case Intrinsic::riscv_seg3_store_mask: case Intrinsic::riscv_seg4_store_mask: case Intrinsic::riscv_seg5_store_mask: case Intrinsic::riscv_seg6_store_mask: case Intrinsic::riscv_seg7_store_mask: - case Intrinsic::riscv_seg8_store_mask: { - SDLoc DL(Op); - static const Intrinsic::ID VssegInts[] = { - Intrinsic::riscv_vsseg2_mask, Intrinsic::riscv_vsseg3_mask, - Intrinsic::riscv_vsseg4_mask, Intrinsic::riscv_vsseg5_mask, - Intrinsic::riscv_vsseg6_mask, Intrinsic::riscv_vsseg7_mask, - Intrinsic::riscv_vsseg8_mask}; + case Intrinsic::riscv_seg8_store_mask: + IsStrided = false; + break; + case Intrinsic::riscv_sseg2_store_mask: + case Intrinsic::riscv_sseg3_store_mask: + case Intrinsic::riscv_sseg4_store_mask: + case Intrinsic::riscv_sseg5_store_mask: + case Intrinsic::riscv_sseg6_store_mask: + case Intrinsic::riscv_sseg7_store_mask: + case Intrinsic::riscv_sseg8_store_mask: + IsStrided = true; + break; + default: + llvm_unreachable("unexpected intrinsic ID"); + } - // Operands: (chain, int_id, vec*, ptr, mask, vl) - unsigned NF = Op->getNumOperands() - 5; - assert(NF >= 2 && NF <= 8 && "Unexpected seg number"); - MVT XLenVT = Subtarget.getXLenVT(); - MVT VT = Op->getOperand(2).getSimpleValueType(); - MVT ContainerVT = getContainerForFixedLengthVector(VT); - unsigned Sz = NF * ContainerVT.getVectorMinNumElements() * - ContainerVT.getScalarSizeInBits(); - EVT VecTupTy = MVT::getRISCVVectorTupleVT(Sz, NF); + SDLoc DL(Op); + static const Intrinsic::ID VssegInts[] = { + Intrinsic::riscv_vsseg2_mask, Intrinsic::riscv_vsseg3_mask, + Intrinsic::riscv_vsseg4_mask, Intrinsic::riscv_vsseg5_mask, + Intrinsic::riscv_vsseg6_mask, Intrinsic::riscv_vsseg7_mask, + Intrinsic::riscv_vsseg8_mask}; + static const Intrinsic::ID VsssegInts[] = { + Intrinsic::riscv_vssseg2_mask, Intrinsic::riscv_vssseg3_mask, + Intrinsic::riscv_vssseg4_mask, Intrinsic::riscv_vssseg5_mask, + Intrinsic::riscv_vssseg6_mask, Intrinsic::riscv_vssseg7_mask, + Intrinsic::riscv_vssseg8_mask}; + + // Operands: (chain, int_id, vec*, ptr, mask, vl) or + // (chain, int_id, vec*, ptr, stride, mask, vl) + unsigned NF = Op->getNumOperands() - (IsStrided ? 6 : 5); + assert(NF >= 2 && NF <= 8 && "Unexpected seg number"); + MVT XLenVT = Subtarget.getXLenVT(); + MVT VT = Op->getOperand(2).getSimpleValueType(); + MVT ContainerVT = ::getContainerForFixedLengthVector(DAG, VT, Subtarget); + unsigned Sz = NF * ContainerVT.getVectorMinNumElements() * + ContainerVT.getScalarSizeInBits(); + EVT VecTupTy = MVT::getRISCVVectorTupleVT(Sz, NF); - SDValue VL = Op.getOperand(Op.getNumOperands() - 1); - SDValue Mask = Op.getOperand(Op.getNumOperands() - 2); - MVT MaskVT = Mask.getSimpleValueType(); - MVT MaskContainerVT = - ::getContainerForFixedLengthVector(DAG, MaskVT, Subtarget); - Mask = convertToScalableVector(MaskContainerVT, Mask, DAG, Subtarget); + SDValue VL = Op.getOperand(Op.getNumOperands() - 1); + SDValue Mask = Op.getOperand(Op.getNumOperands() - 2); + MVT MaskVT = Mask.getSimpleValueType(); + MVT MaskContainerVT = + ::getContainerForFixedLengthVector(DAG, MaskVT, Subtarget); + Mask = convertToScalableVector(MaskContainerVT, Mask, DAG, Subtarget); - SDValue IntID = DAG.getTargetConstant(VssegInts[NF - 2], DL, XLenVT); - SDValue Ptr = Op->getOperand(NF + 2); + SDValue IntID = DAG.getTargetConstant( + IsStrided ? VsssegInts[NF - 2] : VssegInts[NF - 2], DL, XLenVT); + SDValue Ptr = Op->getOperand(NF + 2); - auto *FixedIntrinsic = cast<MemIntrinsicSDNode>(Op); + auto *FixedIntrinsic = cast<MemIntrinsicSDNode>(Op); - SDValue StoredVal = DAG.getUNDEF(VecTupTy); - for (unsigned i = 0; i < NF; i++) - StoredVal = DAG.getNode( - RISCVISD::TUPLE_INSERT, DL, VecTupTy, StoredVal, - convertToScalableVector( - ContainerVT, FixedIntrinsic->getOperand(2 + i), DAG, Subtarget), - DAG.getTargetConstant(i, DL, MVT::i32)); + SDValue StoredVal = DAG.getUNDEF(VecTupTy); + for (unsigned i = 0; i < NF; i++) + StoredVal = DAG.getNode( + RISCVISD::TUPLE_INSERT, DL, VecTupTy, StoredVal, + convertToScalableVector(ContainerVT, FixedIntrinsic->getOperand(2 + i), + DAG, Subtarget), + DAG.getTargetConstant(i, DL, MVT::i32)); + + SmallVector<SDValue, 10> Ops = { + FixedIntrinsic->getChain(), + IntID, + StoredVal, + Ptr, + Mask, + VL, + DAG.getTargetConstant(Log2_64(VT.getScalarSizeInBits()), DL, XLenVT)}; + // Insert the stride operand. + if (IsStrided) + Ops.insert(std::next(Ops.begin(), 4), + Op.getOperand(Op.getNumOperands() - 3)); + + return DAG.getMemIntrinsicNode( + ISD::INTRINSIC_VOID, DL, DAG.getVTList(MVT::Other), Ops, + FixedIntrinsic->getMemoryVT(), FixedIntrinsic->getMemOperand()); +} + +SDValue RISCVTargetLowering::LowerINTRINSIC_VOID(SDValue Op, + SelectionDAG &DAG) const { + unsigned IntNo = Op.getConstantOperandVal(1); + switch (IntNo) { + default: + break; + case Intrinsic::riscv_seg2_store_mask: + case Intrinsic::riscv_seg3_store_mask: + case Intrinsic::riscv_seg4_store_mask: + case Intrinsic::riscv_seg5_store_mask: + case Intrinsic::riscv_seg6_store_mask: + case Intrinsic::riscv_seg7_store_mask: + case Intrinsic::riscv_seg8_store_mask: + case Intrinsic::riscv_sseg2_store_mask: + case Intrinsic::riscv_sseg3_store_mask: + case Intrinsic::riscv_sseg4_store_mask: + case Intrinsic::riscv_sseg5_store_mask: + case Intrinsic::riscv_sseg6_store_mask: + case Intrinsic::riscv_sseg7_store_mask: + case Intrinsic::riscv_sseg8_store_mask: + return lowerFixedVectorSegStoreIntrinsics(IntNo, Op, Subtarget, DAG); - SDValue Ops[] = { - FixedIntrinsic->getChain(), - IntID, - StoredVal, - Ptr, - Mask, - VL, - DAG.getTargetConstant(Log2_64(VT.getScalarSizeInBits()), DL, XLenVT)}; - - return DAG.getMemIntrinsicNode( - ISD::INTRINSIC_VOID, DL, DAG.getVTList(MVT::Other), Ops, - FixedIntrinsic->getMemoryVT(), FixedIntrinsic->getMemOperand()); - } case Intrinsic::riscv_sf_vc_xv_se: return getVCIXISDNodeVOID(Op, DAG, RISCVISD::SF_VC_XV_SE); case Intrinsic::riscv_sf_vc_iv_se: diff --git a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td index 5541506..24ebbc3 100644 --- a/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td +++ b/llvm/lib/Target/RISCV/RISCVSchedSpacemitX60.td @@ -524,16 +524,33 @@ foreach mx = SchedMxListW in { foreach mx = SchedMxList in { defvar IsWorstCase = SMX60IsWorstCaseMX<mx, SchedMxList>.c; - defm "" : LMULWriteResMX<"WriteVSALUV", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSALUX", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSALUI", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVAALUV", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVAALUX", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSMulV", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSMulX", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSShiftV", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSShiftX", [SMX60_VIEU], mx, IsWorstCase>; - defm "" : LMULWriteResMX<"WriteVSShiftI", [SMX60_VIEU], mx, IsWorstCase>; + let Latency = Get4458Latency<mx>.c, ReleaseAtCycles = [ConstOneUntilM1ThenDouble<mx>.c] in { + defm "" : LMULWriteResMX<"WriteVSALUV", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVSALUX", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVSALUI", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVAALUV", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVAALUX", [SMX60_VIEU], mx, IsWorstCase>; + } + + // Latency of vsmul: e8/e16 = 4/4/5/8, e32 = 5/5/5/8, e64 = 7/8/16/32 + // We use the worst-case until we can split the SEW. + defvar VSMulLat = ConstValueUntilLMULThenDoubleBase<"M2", 7, 8, mx>.c; + // Latency of vsmul: e8/e16/e32 = 1/2/4/8, e64 = 4/8/16/32 + // We use the worst-case until we can split the SEW. + defvar VSMulOcc = ConstValueUntilLMULThenDoubleBase<"M1", 1, 4, mx>.c; + // TODO: change WriteVSMulV/X to be defined with LMULSEWSchedWrites + let Latency = VSMulLat, ReleaseAtCycles = [VSMulOcc] in { + defm "" : LMULWriteResMX<"WriteVSMulV", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVSMulX", [SMX60_VIEU], mx, IsWorstCase>; + } + + defvar VSShiftLat = ConstValueUntilLMULThenDouble<"M2", 4, mx>.c; + defvar VSShiftOcc = ConstOneUntilMF2ThenDouble<mx>.c; + let Latency = VSShiftLat, ReleaseAtCycles = [VSShiftOcc] in { + defm "" : LMULWriteResMX<"WriteVSShiftV", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVSShiftX", [SMX60_VIEU], mx, IsWorstCase>; + defm "" : LMULWriteResMX<"WriteVSShiftI", [SMX60_VIEU], mx, IsWorstCase>; + } } // 13. Vector Floating-Point Instructions diff --git a/llvm/lib/Transforms/Scalar/InferAlignment.cpp b/llvm/lib/Transforms/Scalar/InferAlignment.cpp index 0ddc231..e9bf59c 100644 --- a/llvm/lib/Transforms/Scalar/InferAlignment.cpp +++ b/llvm/lib/Transforms/Scalar/InferAlignment.cpp @@ -58,14 +58,55 @@ bool inferAlignment(Function &F, AssumptionCache &AC, DominatorTree &DT) { } // Compute alignment from known bits. + auto InferFromKnownBits = [&](Instruction &I, Value *PtrOp) { + KnownBits Known = computeKnownBits(PtrOp, DL, &AC, &I, &DT); + unsigned TrailZ = + std::min(Known.countMinTrailingZeros(), +Value::MaxAlignmentExponent); + return Align(1ull << std::min(Known.getBitWidth() - 1, TrailZ)); + }; + + // Propagate alignment between loads and stores that originate from the + // same base pointer. + DenseMap<Value *, Align> BestBasePointerAligns; + auto InferFromBasePointer = [&](Value *PtrOp, Align LoadStoreAlign) { + APInt OffsetFromBase(DL.getIndexTypeSizeInBits(PtrOp->getType()), 0); + PtrOp = PtrOp->stripAndAccumulateConstantOffsets(DL, OffsetFromBase, true); + // Derive the base pointer alignment from the load/store alignment + // and the offset from the base pointer. + Align BasePointerAlign = + commonAlignment(LoadStoreAlign, OffsetFromBase.getLimitedValue()); + + auto [It, Inserted] = + BestBasePointerAligns.try_emplace(PtrOp, BasePointerAlign); + if (!Inserted) { + // If the stored base pointer alignment is better than the + // base pointer alignment we derived, we may be able to use it + // to improve the load/store alignment. If not, store the + // improved base pointer alignment for future iterations. + if (It->second > BasePointerAlign) { + Align BetterLoadStoreAlign = + commonAlignment(It->second, OffsetFromBase.getLimitedValue()); + return BetterLoadStoreAlign; + } + It->second = BasePointerAlign; + } + return LoadStoreAlign; + }; + for (BasicBlock &BB : F) { + // We need to reset the map for each block because alignment information + // can only be propagated from instruction A to B if A dominates B. + // This is because control flow (and exception throwing) could be dependent + // on the address (and its alignment) at runtime. Some sort of dominator + // tree approach could be better, but doing a simple forward pass through a + // single basic block is correct too. + BestBasePointerAligns.clear(); + for (Instruction &I : BB) { Changed |= tryToImproveAlign( DL, &I, [&](Value *PtrOp, Align OldAlign, Align PrefAlign) { - KnownBits Known = computeKnownBits(PtrOp, DL, &AC, &I, &DT); - unsigned TrailZ = std::min(Known.countMinTrailingZeros(), - +Value::MaxAlignmentExponent); - return Align(1ull << std::min(Known.getBitWidth() - 1, TrailZ)); + return std::max(InferFromKnownBits(I, PtrOp), + InferFromBasePointer(PtrOp, OldAlign)); }); } } diff --git a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp index fcdb8a9..c68149b 100644 --- a/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp +++ b/llvm/lib/Transforms/Scalar/LowerMatrixIntrinsics.cpp @@ -263,6 +263,7 @@ static bool isUniformShape(Value *V) { case llvm::Instruction::FPExt: return true; case llvm::Instruction::AddrSpaceCast: + case CastInst::PtrToAddr: case CastInst::PtrToInt: case CastInst::IntToPtr: return false; diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index 39011e7..ec06a21 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -12050,7 +12050,8 @@ static InstructionCost canConvertToFMA(ArrayRef<Value *> VL, for (auto [V, Op] : zip(VL, Operands.front())) { auto *I = dyn_cast<Instruction>(Op); if (!I || !I->hasOneUse()) { - FMACost += TTI.getInstructionCost(cast<Instruction>(V), CostKind); + if (auto *OpI = dyn_cast<Instruction>(V)) + FMACost += TTI.getInstructionCost(OpI, CostKind); if (I) FMACost += TTI.getInstructionCost(I, CostKind); continue; diff --git a/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp b/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp index f32d57f..e414c12 100644 --- a/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp +++ b/llvm/lib/Transforms/Vectorize/SandboxVectorizer/Legality.cpp @@ -81,6 +81,7 @@ LegalityAnalysis::notVectorizableBasedOnOpcodesAndTypes( case Instruction::Opcode::FPToUI: case Instruction::Opcode::FPToSI: case Instruction::Opcode::FPExt: + case Instruction::Opcode::PtrToAddr: case Instruction::Opcode::PtrToInt: case Instruction::Opcode::IntToPtr: case Instruction::Opcode::SIToFP: diff --git a/llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json b/llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json index 9b38f2e..07fde84 100644 --- a/llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json +++ b/llvm/test/Analysis/IR2Vec/Inputs/dummy_2D_vocab.json @@ -47,6 +47,7 @@ "FPTrunc": [89, 90], "FPExt": [91, 92], "PtrToInt": [93, 94], + "PtrToAddr": [135, 136], "IntToPtr": [95, 96], "BitCast": [97, 98], "AddrSpaceCast": [99, 100], diff --git a/llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt b/llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt index 79fcf82..1b9b3c2 100644 --- a/llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt +++ b/llvm/test/Analysis/IR2Vec/Inputs/reference_default_vocab_print.txt @@ -45,6 +45,7 @@ Key: SIToFP: [ 87.00 88.00 ] Key: FPTrunc: [ 89.00 90.00 ] Key: FPExt: [ 91.00 92.00 ] Key: PtrToInt: [ 93.00 94.00 ] +Key: PtrToAddr: [ 135.00 136.00 ] Key: IntToPtr: [ 95.00 96.00 ] Key: BitCast: [ 97.00 98.00 ] Key: AddrSpaceCast: [ 99.00 100.00 ] diff --git a/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt b/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt index 584bd31..9673e7f 100644 --- a/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt +++ b/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd1_vocab_print.txt @@ -45,6 +45,7 @@ Key: SIToFP: [ 43.50 44.00 ] Key: FPTrunc: [ 44.50 45.00 ] Key: FPExt: [ 45.50 46.00 ] Key: PtrToInt: [ 46.50 47.00 ] +Key: PtrToAddr: [ 67.50 68.00 ] Key: IntToPtr: [ 47.50 48.00 ] Key: BitCast: [ 48.50 49.00 ] Key: AddrSpaceCast: [ 49.50 50.00 ] diff --git a/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt b/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt index 2727c85..1f575d2 100644 --- a/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt +++ b/llvm/test/Analysis/IR2Vec/Inputs/reference_wtd2_vocab_print.txt @@ -45,6 +45,7 @@ Key: SIToFP: [ 8.70 8.80 ] Key: FPTrunc: [ 8.90 9.00 ] Key: FPExt: [ 9.10 9.20 ] Key: PtrToInt: [ 9.30 9.40 ] +Key: PtrToAddr: [ 13.50 13.60 ] Key: IntToPtr: [ 9.50 9.60 ] Key: BitCast: [ 9.70 9.80 ] Key: AddrSpaceCast: [ 9.90 10.00 ] diff --git a/llvm/test/Analysis/ValueTracking/pr152700.ll b/llvm/test/Analysis/ValueTracking/pr152700.ll new file mode 100644 index 0000000..91644c5 --- /dev/null +++ b/llvm/test/Analysis/ValueTracking/pr152700.ll @@ -0,0 +1,28 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt < %s -passes=instcombine -S | FileCheck %s + +declare noundef i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() +declare i32 @llvm.umin.i32(i32, i32) +define i32 @foo(i1 %c, i32 %arg) { +; CHECK-LABEL: define i32 @foo( +; CHECK-SAME: i1 [[C:%.*]], i32 [[ARG:%.*]]) { +; CHECK-NEXT: [[ENTRY:.*]]: +; CHECK-NEXT: [[I:%.*]] = call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() +; CHECK-NEXT: br i1 [[C]], label %[[BB_1:.*]], label %[[BB_2:.*]] +; CHECK: [[BB_1]]: +; CHECK-NEXT: br label %[[BB_2]] +; CHECK: [[BB_2]]: +; CHECK-NEXT: [[PHI:%.*]] = phi i32 [ [[I]], %[[ENTRY]] ], [ 0, %[[BB_1]] ] +; CHECK-NEXT: [[RES:%.*]] = call i32 @llvm.umin.i32(i32 [[PHI]], i32 [[ARG]]) +; CHECK-NEXT: ret i32 [[RES]] +; +entry: + %i = call i32 @llvm.nvvm.read.ptx.sreg.nctaid.x() + br i1 %c, label %bb.1, label %bb.2 +bb.1: + br label %bb.2 +bb.2: + %phi = phi i32 [ %i, %entry ], [ 0, %bb.1 ] + %res = call i32 @llvm.umin.i32(i32 %phi, i32 %arg) + ret i32 %res +} diff --git a/llvm/test/Assembler/ptrtoaddr-invalid-constexpr.ll b/llvm/test/Assembler/ptrtoaddr-invalid-constexpr.ll new file mode 100644 index 0000000..665deff --- /dev/null +++ b/llvm/test/Assembler/ptrtoaddr-invalid-constexpr.ll @@ -0,0 +1,56 @@ +;; Check all requirements on the ptrtoaddr constant expression operands +;; Most of these invalid cases are detected at parse time but some are only +;; detected at verification time (see Verifier::visitPtrToAddrInst()) +; RUN: rm -rf %t && split-file --leading-lines %s %t + +;--- src_vec_dst_no_vec.ll +; RUN: not llvm-as %t/src_vec_dst_no_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_VEC_DST_NO_VEC %s --implicit-check-not="error:" +@g = global i64 ptrtoaddr (<2 x ptr> <ptr @g, ptr @g> to i64) +; SRC_VEC_DST_NO_VEC: [[#@LINE-1]]:17: error: invalid cast opcode for cast from '<2 x ptr>' to 'i64' + +;--- src_no_vec_dst_vec.ll +; RUN: not llvm-as %t/src_no_vec_dst_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NO_VEC_DST_VEC %s --implicit-check-not="error:" +@g = global <2 x i64> ptrtoaddr (ptr @g to <2 x i64>) +; SRC_NO_VEC_DST_VEC: [[#@LINE-1]]:23: error: invalid cast opcode for cast from 'ptr' to '<2 x i64>' + +;--- dst_not_int.ll +; RUN: not llvm-as %t/dst_not_int.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_INT %s --implicit-check-not="error:" +@g = global float ptrtoaddr (ptr @g to float) +; DST_NOT_INT: [[#@LINE-1]]:19: error: invalid cast opcode for cast from 'ptr' to 'float' + +;--- dst_not_int_vec.ll +; RUN: not llvm-as %t/dst_not_int_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_INT_VEC %s --implicit-check-not="error:" +@g = global <2 x float> ptrtoaddr (<2 x ptr> <ptr @g, ptr @g> to <2 x float>) +; DST_NOT_INT_VEC: [[#@LINE-1]]:25: error: invalid cast opcode for cast from '<2 x ptr>' to '<2 x float>' + +;--- src_not_ptr.ll +; RUN: not llvm-as %t/src_not_ptr.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NOT_PTR %s --implicit-check-not="error:" +@g = global i64 ptrtoaddr (i32 1 to i64) +; SRC_NOT_PTR: [[#@LINE-1]]:17: error: invalid cast opcode for cast from 'i32' to 'i64' + +;--- src_not_ptr_vec.ll +; RUN: not llvm-as %t/src_not_ptr_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NOT_PTR_VEC %s --implicit-check-not="error:" +@g = global <2 x i64> ptrtoaddr (<2 x i32> <i32 1, i32 2> to <2 x i64>) +; SRC_NOT_PTR_VEC: [[#@LINE-1]]:23: error: invalid cast opcode for cast from '<2 x i32>' to '<2 x i64>' + +;--- vec_src_fewer_elems.ll +; RUN: not llvm-as %t/vec_src_fewer_elems.ll -o /dev/null 2>&1 | FileCheck -check-prefix=VEC_SRC_FEWER_ELEMS %s --implicit-check-not="error:" +@g = global <4 x i64> ptrtoaddr (<2 x ptr> <ptr @g, ptr @g> to <4 x i64>) +; VEC_SRC_FEWER_ELEMS: [[#@LINE-1]]:23: error: invalid cast opcode for cast from '<2 x ptr>' to '<4 x i64>' + +;--- vec_dst_fewer_elems.ll +; RUN: not llvm-as %t/vec_dst_fewer_elems.ll -o /dev/null 2>&1 | FileCheck -check-prefix=VEC_DST_FEWER_ELEMS %s --implicit-check-not="error:" +@g = global <2 x i64> ptrtoaddr (<4 x ptr> <ptr @g, ptr @g, ptr @g, ptr @g> to <2 x i64>) +; VEC_DST_FEWER_ELEMS: [[#@LINE-1]]:23: error: invalid cast opcode for cast from '<4 x ptr>' to '<2 x i64>' + +;--- dst_not_addr_size.ll +; The following invalid IR is caught by the verifier, not the parser: +; RUN: llvm-as %t/dst_not_addr_size.ll --disable-output --disable-verify +; RUN: not llvm-as %t/dst_not_addr_size.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_ADDR_SIZE %s --implicit-check-not="error:" +; DST_NOT_ADDR_SIZE: assembly parsed, but does not verify as correct! +@g = global i32 ptrtoaddr (ptr @g to i32) +; DST_NOT_ADDR_SIZE-NEXT: PtrToAddr result must be address width +; DST_NOT_ADDR_SIZE-NEXT: i32 ptrtoaddr (ptr @g to i32) +@g_vec = global <4 x i32> ptrtoaddr (<4 x ptr> <ptr @g, ptr @g, ptr @g, ptr @g> to <4 x i32>) +; TODO: Verifier.cpp does not visit ConstantVector/ConstantStruct values +; TODO-DST_NOT_ADDR_SIZE: PtrToAddr result must be address width diff --git a/llvm/test/Assembler/ptrtoaddr-invalid.ll b/llvm/test/Assembler/ptrtoaddr-invalid.ll new file mode 100644 index 0000000..dff787b --- /dev/null +++ b/llvm/test/Assembler/ptrtoaddr-invalid.ll @@ -0,0 +1,84 @@ +;; Check all requirements on the ptrtoaddr instruction operands +;; Most of these invalid cases are detected at parse time but some are only +;; detected at verification time (see Verifier::visitPtrToAddrInst()) +; RUN: rm -rf %t && split-file --leading-lines %s %t + +;--- src_vec_dst_no_vec.ll +; RUN: not llvm-as %t/src_vec_dst_no_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_VEC_DST_NO_VEC %s --implicit-check-not="error:" +define i64 @bad(<2 x ptr> %p) { + %addr = ptrtoaddr <2 x ptr> %p to i64 + ; SRC_VEC_DST_NO_VEC: [[#@LINE-1]]:21: error: invalid cast opcode for cast from '<2 x ptr>' to 'i64' + ret i64 %addr +} + +;--- src_no_vec_dst_vec.ll +; RUN: not llvm-as %t/src_no_vec_dst_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NO_VEC_DST_VEC %s --implicit-check-not="error:" +define <2 x i64> @bad(ptr %p) { + %addr = ptrtoaddr ptr %p to <2 x i64> + ; SRC_NO_VEC_DST_VEC: [[#@LINE-1]]:21: error: invalid cast opcode for cast from 'ptr' to '<2 x i64>' + ret <2 x i64> %addr +} + +;--- dst_not_int.ll +; RUN: not llvm-as %t/dst_not_int.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_INT %s --implicit-check-not="error:" +define float @bad(ptr %p) { + %addr = ptrtoaddr ptr %p to float + ; DST_NOT_INT: [[#@LINE-1]]:21: error: invalid cast opcode for cast from 'ptr' to 'float' + ret float %addr +} + +;--- dst_not_int_vec.ll +; RUN: not llvm-as %t/dst_not_int_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_INT_VEC %s --implicit-check-not="error:" +define <2 x float> @bad(<2 x ptr> %p) { + %addr = ptrtoaddr <2 x ptr> %p to <2 x float> + ; DST_NOT_INT_VEC: [[#@LINE-1]]:21: error: invalid cast opcode for cast from '<2 x ptr>' to '<2 x float>' + ret <2 x float> %addr +} + +;--- src_not_ptr.ll +; RUN: not llvm-as %t/src_not_ptr.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NOT_PTR %s --implicit-check-not="error:" +define i64 @bad(i32 %p) { + %addr = ptrtoaddr i32 %p to i64 + ; SRC_NOT_PTR: [[#@LINE-1]]:21: error: invalid cast opcode for cast from 'i32' to 'i64' + ret i64 %addr +} + +;--- src_not_ptr_vec.ll +; RUN: not llvm-as %t/src_not_ptr_vec.ll -o /dev/null 2>&1 | FileCheck -check-prefix=SRC_NOT_PTR_VEC %s --implicit-check-not="error:" +define <2 x i64> @bad(<2 x i32> %p) { + %addr = ptrtoaddr <2 x i32> %p to <2 x i64> + ; SRC_NOT_PTR_VEC: [[#@LINE-1]]:21: error: invalid cast opcode for cast from '<2 x i32>' to '<2 x i64>' + ret <2 x i64> %addr +} + +;--- vec_src_fewer_elems.ll +; RUN: not llvm-as %t/vec_src_fewer_elems.ll -o /dev/null 2>&1 | FileCheck -check-prefix=VEC_SRC_FEWER_ELEMS %s --implicit-check-not="error:" +define <4 x i64> @bad(<2 x ptr> %p) { + %addr = ptrtoaddr <2 x ptr> %p to <4 x i64> + ; VEC_SRC_FEWER_ELEMS: [[#@LINE-1]]:21: error: invalid cast opcode for cast from '<2 x ptr>' to '<4 x i64>' + ret <4 x i64> %addr +} + +;--- vec_dst_fewer_elems.ll +; RUN: not llvm-as %t/vec_dst_fewer_elems.ll -o /dev/null 2>&1 | FileCheck -check-prefix=VEC_DST_FEWER_ELEMS %s --implicit-check-not="error:" +define <2 x i64> @bad(<4 x ptr> %p) { + %addr = ptrtoaddr <4 x ptr> %p to <2 x i64> + ; VEC_DST_FEWER_ELEMS: [[#@LINE-1]]:21: error: invalid cast opcode for cast from '<4 x ptr>' to '<2 x i64>' + ret <2 x i64> %addr +} + +;--- dst_not_addr_size.ll +; The following invalid IR is caught by the verifier, not the parser: +; RUN: llvm-as %t/dst_not_addr_size.ll --disable-output --disable-verify +; RUN: not llvm-as %t/dst_not_addr_size.ll -o /dev/null 2>&1 | FileCheck -check-prefix=DST_NOT_ADDR_SIZE %s --implicit-check-not="error:" +; DST_NOT_ADDR_SIZE: assembly parsed, but does not verify as correct! +define i32 @bad(ptr %p) { + %addr = ptrtoaddr ptr %p to i32 + ; DST_NOT_ADDR_SIZE: PtrToAddr result must be address width + ret i32 %addr +} +define <4 x i32> @bad_vec(<4 x ptr> %p) { + %addr = ptrtoaddr <4 x ptr> %p to <4 x i32> + ; DST_NOT_ADDR_SIZE: PtrToAddr result must be address width + ret <4 x i32> %addr +} diff --git a/llvm/test/Assembler/ptrtoaddr.ll b/llvm/test/Assembler/ptrtoaddr.ll new file mode 100644 index 0000000..f21410b --- /dev/null +++ b/llvm/test/Assembler/ptrtoaddr.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llvm-dis | FileCheck %s +target datalayout = "p1:64:64:64:32" + +@i_as0 = global i32 0 +@global_cast_as0 = global i64 ptrtoaddr (ptr @i_as0 to i64) +; CHECK: @global_cast_as0 = global i64 ptrtoaddr (ptr @i_as0 to i64) +@i_as1 = addrspace(1) global i32 0 +@global_cast_as1 = global i32 ptrtoaddr (ptr addrspace(1) @i_as1 to i32) +; CHECK: @global_cast_as1 = global i32 ptrtoaddr (ptr addrspace(1) @i_as1 to i32) + +define i64 @test_as0(ptr %p) { + %addr = ptrtoaddr ptr %p to i64 + ; CHECK: %addr = ptrtoaddr ptr %p to i64 + ret i64 %addr +} + +define i32 @test_as1(ptr addrspace(1) %p) { + %addr = ptrtoaddr ptr addrspace(1) %p to i32 + ; CHECK: %addr = ptrtoaddr ptr addrspace(1) %p to i32 + ret i32 %addr +} + +define <2 x i32> @test_vec_as1(<2 x ptr addrspace(1)> %p) { + %addr = ptrtoaddr <2 x ptr addrspace(1)> %p to <2 x i32> + ; CHECK: %addr = ptrtoaddr <2 x ptr addrspace(1)> %p to <2 x i32> + ret <2 x i32> %addr +} diff --git a/llvm/test/Bitcode/ptrtoaddr.ll b/llvm/test/Bitcode/ptrtoaddr.ll new file mode 100644 index 0000000..6c5fed2 --- /dev/null +++ b/llvm/test/Bitcode/ptrtoaddr.ll @@ -0,0 +1,27 @@ +; RUN: llvm-as < %s | llvm-dis | llvm-as | llvm-dis | FileCheck %s +target datalayout = "p1:64:64:64:32" + +@i_as0 = global i32 0 +@global_cast_as0 = global i64 ptrtoaddr (ptr @i_as0 to i64) +; CHECK: @global_cast_as0 = global i64 ptrtoaddr (ptr @i_as0 to i64) +@i_as1 = addrspace(1) global i32 0 +@global_cast_as1 = global i32 ptrtoaddr (ptr addrspace(1) @i_as1 to i32) +; CHECK: @global_cast_as1 = global i32 ptrtoaddr (ptr addrspace(1) @i_as1 to i32) + +define i64 @test_as0(ptr %p) { + %addr = ptrtoaddr ptr %p to i64 + ; CHECK: %addr = ptrtoaddr ptr %p to i64 + ret i64 %addr +} + +define i32 @test_as1(ptr addrspace(1) %p) { + %addr = ptrtoaddr ptr addrspace(1) %p to i32 + ; CHECK: %addr = ptrtoaddr ptr addrspace(1) %p to i32 + ret i32 %addr +} + +define <2 x i32> @test_vec_as1(<2 x ptr addrspace(1)> %p) { + %addr = ptrtoaddr <2 x ptr addrspace(1)> %p to <2 x i32> + ; CHECK: %addr = ptrtoaddr <2 x ptr addrspace(1)> %p to <2 x i32> + ret <2 x i32> %addr +} diff --git a/llvm/test/CMakeLists.txt b/llvm/test/CMakeLists.txt index 3042b8f..b46f482 100644 --- a/llvm/test/CMakeLists.txt +++ b/llvm/test/CMakeLists.txt @@ -30,7 +30,6 @@ llvm_canonicalize_cmake_booleans( LLVM_INCLUDE_SPIRV_TOOLS_TESTS LLVM_APPEND_VC_REV LLVM_HAS_LOGF128 - LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS ) configure_lit_site_cfg( diff --git a/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ssegN-store.ll b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ssegN-store.ll new file mode 100644 index 0000000..abf2894 --- /dev/null +++ b/llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ssegN-store.ll @@ -0,0 +1,72 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 5 +; RUN: llc -mtriple=riscv64 -mattr=+v -verify-machineinstrs < %s | FileCheck %s + +define void @store_factor2(<8 x i8> %v0, <8 x i8> %v1, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor2: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg2e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg2.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor3(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor3: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg3e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg3.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor4(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor4: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg4e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg4.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor5(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor5: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg5e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg5.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor6(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor6: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg6e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg6.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor7(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, <8 x i8> %v6, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor7: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg7e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg7.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, <8 x i8> %v6, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} + +define void @store_factor8(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, <8 x i8> %v6, <8 x i8> %v7, ptr %ptr, i64 %stride) { +; CHECK-LABEL: store_factor8: +; CHECK: # %bb.0: +; CHECK-NEXT: vsetivli zero, 8, e8, mf2, ta, ma +; CHECK-NEXT: vssseg8e8.v v8, (a0), a1 +; CHECK-NEXT: ret + call void @llvm.riscv.sseg8.store.mask.v8i8.i64.i64(<8 x i8> %v0, <8 x i8> %v1, <8 x i8> %v2, <8 x i8> %v3, <8 x i8> %v4, <8 x i8> %v5, <8 x i8> %v6, <8 x i8> %v7, ptr %ptr, i64 %stride, <8 x i1> splat (i1 true), i64 8) + ret void +} diff --git a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll index 7990dfc..4c84304 100644 --- a/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll +++ b/llvm/test/CodeGen/RISCV/rvv/vxrm-insert-out-of-loop.ll @@ -366,8 +366,8 @@ define void @test1(ptr nocapture noundef writeonly %dst, i32 noundef signext %i_ ; RV64X60-NEXT: # => This Inner Loop Header: Depth=2 ; RV64X60-NEXT: vl2r.v v8, (s2) ; RV64X60-NEXT: vl2r.v v10, (s3) -; RV64X60-NEXT: sub s1, s1, t3 ; RV64X60-NEXT: vaaddu.vv v8, v8, v10 +; RV64X60-NEXT: sub s1, s1, t3 ; RV64X60-NEXT: vs2r.v v8, (s4) ; RV64X60-NEXT: add s4, s4, t3 ; RV64X60-NEXT: add s3, s3, t3 diff --git a/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll b/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll new file mode 100644 index 0000000..f65d99d --- /dev/null +++ b/llvm/test/CodeGen/X86/GlobalISel/ptrtoaddr.ll @@ -0,0 +1,109 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu -global-isel < %s -o - | FileCheck %s --check-prefix=CHECK + +define i1 @ptrtoaddr_1(ptr %p) { +; CHECK-LABEL: ptrtoaddr_1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: xorb $1, %al +; CHECK-NEXT: # kill: def $al killed $al killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i1 + %ret = xor i1 %trunc, 1 + ret i1 %ret +} + +define i8 @ptrtoaddr_8(ptr %p) { +; CHECK-LABEL: ptrtoaddr_8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notb %al +; CHECK-NEXT: # kill: def $al killed $al killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i8 + %ret = xor i8 %trunc, -1 + ret i8 %ret +} + +define i16 @ptrtoaddr_16(ptr %p) { +; CHECK-LABEL: ptrtoaddr_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notw %ax +; CHECK-NEXT: # kill: def $ax killed $ax killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i16 + %ret = xor i16 %trunc, -1 + ret i16 %ret +} + +define i32 @ptrtoaddr_32(ptr %p) { +; CHECK-LABEL: ptrtoaddr_32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notl %eax +; CHECK-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i32 + %ret = xor i32 %trunc, -1 + ret i32 %ret +} + +define i64 @ptrtoaddr_64(ptr %p) { +; CHECK-LABEL: ptrtoaddr_64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notq %rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %ret = xor i64 %addr, -1 + ret i64 %ret +} + +define i128 @ptrtoaddr_128(ptr %p) { +; CHECK-LABEL: ptrtoaddr_128: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: xorl %edx, %edx +; CHECK-NEXT: notq %rax +; CHECK-NEXT: notq %rdx +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %ext = zext i64 %addr to i128 + %ret = xor i128 %ext, -1 + ret i128 %ret +} + +; TODO: Vector version cannot be handled by GlobalIsel yet (same error as ptrtoint: https://github.com/llvm/llvm-project/issues/150875). +; define <2 x i64> @ptrtoaddr_vec(<2 x ptr> %p) { +; entry: +; %addr = ptrtoaddr <2 x ptr> %p to <2 x i64> +; %ret = xor <2 x i64> %addr, <i64 -1, i64 -1> +; ret <2 x i64> %ret +;} + +; UTC_ARGS: --disable + +@foo = global [16 x i8] zeroinitializer +@addr = global i64 ptrtoaddr (ptr @foo to i64) +; CHECK: addr: +; CHECK-NEXT: .quad foo +; CHECK-NEXT: .size addr, 8 +@addr_plus_one = global i64 ptrtoaddr (ptr getelementptr (i8, ptr @foo, i64 1) to i64) +; CHECK: addr_plus_one: +; CHECK-NEXT: .quad foo+1 +; CHECK-NEXT: .size addr_plus_one, 8 +@const_addr = global i64 ptrtoaddr (ptr getelementptr (i8, ptr null, i64 1) to i64) +; CHECK: const_addr: +; CHECK-NEXT: .quad 0+1 +; CHECK-NEXT: .size const_addr, 8 diff --git a/llvm/test/CodeGen/X86/ptrtoaddr.ll b/llvm/test/CodeGen/X86/ptrtoaddr.ll new file mode 100644 index 0000000..24bf9db --- /dev/null +++ b/llvm/test/CodeGen/X86/ptrtoaddr.ll @@ -0,0 +1,113 @@ +; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py +; RUN: llc -mtriple=x86_64-linux-gnu < %s -o - | FileCheck %s --check-prefix=CHECK + +define i1 @ptrtoaddr_1(ptr %p) { +; CHECK-LABEL: ptrtoaddr_1: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: xorb $1, %al +; CHECK-NEXT: # kill: def $al killed $al killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i1 + %ret = xor i1 %trunc, 1 + ret i1 %ret +} + +define i8 @ptrtoaddr_8(ptr %p) { +; CHECK-LABEL: ptrtoaddr_8: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notb %al +; CHECK-NEXT: # kill: def $al killed $al killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i8 + %ret = xor i8 %trunc, -1 + ret i8 %ret +} + +define i16 @ptrtoaddr_16(ptr %p) { +; CHECK-LABEL: ptrtoaddr_16: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notl %eax +; CHECK-NEXT: # kill: def $ax killed $ax killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i16 + %ret = xor i16 %trunc, -1 + ret i16 %ret +} + +define i32 @ptrtoaddr_32(ptr %p) { +; CHECK-LABEL: ptrtoaddr_32: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notl %eax +; CHECK-NEXT: # kill: def $eax killed $eax killed $rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %trunc = trunc i64 %addr to i32 + %ret = xor i32 %trunc, -1 + ret i32 %ret +} + +define i64 @ptrtoaddr_64(ptr %p) { +; CHECK-LABEL: ptrtoaddr_64: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notq %rax +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %ret = xor i64 %addr, -1 + ret i64 %ret +} + +define i128 @ptrtoaddr_128(ptr %p) { +; CHECK-LABEL: ptrtoaddr_128: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: movq %rdi, %rax +; CHECK-NEXT: notq %rax +; CHECK-NEXT: movq $-1, %rdx +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr ptr %p to i64 + %ext = zext i64 %addr to i128 + %ret = xor i128 %ext, -1 + ret i128 %ret +} + + +define <2 x i64> @ptrtoaddr_vec(<2 x ptr> %p) { +; CHECK-LABEL: ptrtoaddr_vec: +; CHECK: # %bb.0: # %entry +; CHECK-NEXT: pcmpeqd %xmm1, %xmm1 +; CHECK-NEXT: pxor %xmm1, %xmm0 +; CHECK-NEXT: retq +entry: + %addr = ptrtoaddr <2 x ptr> %p to <2 x i64> + %ret = xor <2 x i64> %addr, <i64 -1, i64 -1> + ret <2 x i64> %ret +} + +; UTC_ARGS: --disable + +@foo = global [16 x i8] zeroinitializer +@addr = global i64 ptrtoaddr (ptr @foo to i64) +; CHECK: addr: +; CHECK-NEXT: .quad foo +; CHECK-NEXT: .size addr, 8 +@addr_plus_one = global i64 ptrtoaddr (ptr getelementptr (i8, ptr @foo, i64 1) to i64) +; CHECK: addr_plus_one: +; CHECK-NEXT: .quad foo+1 +; CHECK-NEXT: .size addr_plus_one, 8 +@const_addr = global i64 ptrtoaddr (ptr getelementptr (i8, ptr null, i64 1) to i64) +; CHECK: const_addr: +; CHECK-NEXT: .quad 0+1 +; CHECK-NEXT: .size const_addr, 8 diff --git a/llvm/test/DebugInfo/KeyInstructions/debugify.ll b/llvm/test/DebugInfo/KeyInstructions/debugify.ll index 551ae27..d3be513 100644 --- a/llvm/test/DebugInfo/KeyInstructions/debugify.ll +++ b/llvm/test/DebugInfo/KeyInstructions/debugify.ll @@ -1,10 +1,7 @@ ; RUN: opt -passes=debugify --debugify-atoms -S -o - < %s \ ; RUN: | FileCheck %s -;; Mirrors llvm/test/DebugInfo/debugify.ll. Split out here because the -;; test is only supported if LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS is enabled -;; (which is a condition for running this test directory). Once the conditional -;; compilation of the feature is removed this can be merged into the original. +;; Mirrors llvm/test/DebugInfo/debugify.ll ; CHECK-LABEL: define void @foo define void @foo() { diff --git a/llvm/test/DebugInfo/KeyInstructions/lit.local.cfg b/llvm/test/DebugInfo/KeyInstructions/lit.local.cfg deleted file mode 100644 index 482bd5c..0000000 --- a/llvm/test/DebugInfo/KeyInstructions/lit.local.cfg +++ /dev/null @@ -1,2 +0,0 @@ -if not config.has_key_instructions: - config.unsupported = True diff --git a/llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll b/llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll index 88eff97..0c2db4a 100644 --- a/llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll +++ b/llvm/test/Transforms/IRNormalizer/regression-convergence-tokens.ll @@ -7,9 +7,9 @@ define i32 @nested(i32 %src) #0 { ; CHECK-SAME: i32 [[A0:%.*]]) #[[ATTR0:[0-9]+]] { ; CHECK-NEXT: [[BB15160:.*:]] ; CHECK-NEXT: [[T1:%.*]] = call token @llvm.experimental.convergence.entry() -; CHECK-NEXT: %"vl77672llvm.experimental.convergence.anchor()" = call token @llvm.experimental.convergence.anchor() -; CHECK-NEXT: %"op68297(vl77672)" = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[A0]]) [ "convergencectrl"(token %"vl77672llvm.experimental.convergence.anchor()") ] -; CHECK-NEXT: ret i32 %"op68297(vl77672)" +; CHECK-NEXT: %"vl14659llvm.experimental.convergence.anchor()" = call token @llvm.experimental.convergence.anchor() +; CHECK-NEXT: %"op15516(vl14659)" = call i32 @llvm.amdgcn.readfirstlane.i32(i32 [[A0]]) [ "convergencectrl"(token %"vl14659llvm.experimental.convergence.anchor()") ] +; CHECK-NEXT: ret i32 %"op15516(vl14659)" ; %t1 = call token @llvm.experimental.convergence.entry() %t2 = call token @llvm.experimental.convergence.anchor() diff --git a/llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll b/llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll index 35ac0fd..b9be105 100644 --- a/llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll +++ b/llvm/test/Transforms/IRNormalizer/regression-infinite-loop.ll @@ -8,18 +8,18 @@ define void @test(ptr, i32) { ; CHECK-NEXT: %"vl72693([[A1]], 1)" = add i32 [[A1]], 1 ; CHECK-NEXT: br label %[[BB16110:.*]] ; CHECK: [[BB16110]]: -; CHECK-NEXT: %"op10912(op18080, vl72693)" = phi i32 [ %"op18080(op10412, op17645)", %[[BB16110]] ], [ %"vl72693([[A1]], 1)", %[[BB76951]] ] -; CHECK-NEXT: %"op10912(op17645, vl72693)" = phi i32 [ %"op17645(op10912)70", %[[BB16110]] ], [ %"vl72693([[A1]], 1)", %[[BB76951]] ] -; CHECK-NEXT: %"op15084(op10912)" = mul i32 %"op10912(op18080, vl72693)", undef -; CHECK-NEXT: %"op16562(op15084)" = xor i32 -1, %"op15084(op10912)" -; CHECK-NEXT: %"op44627(op10912, op16562)" = add i32 %"op10912(op18080, vl72693)", %"op16562(op15084)" -; CHECK-NEXT: %"op17645(op10912)" = add i32 -1, %"op10912(op17645, vl72693)" -; CHECK-NEXT: %"op18080(op17645, op44627)" = add i32 %"op17645(op10912)", %"op44627(op10912, op16562)" -; CHECK-NEXT: %"op17720(op15084, op18080)" = mul i32 %"op15084(op10912)", %"op18080(op17645, op44627)" -; CHECK-NEXT: %"op16562(op17720)" = xor i32 -1, %"op17720(op15084, op18080)" -; CHECK-NEXT: %"op17430(op16562, op18080)" = add i32 %"op16562(op17720)", %"op18080(op17645, op44627)" +; CHECK-NEXT: %"op81283(op18080, vl72693)" = phi i32 [ %"op18080(op10412, op18131)", %[[BB16110]] ], [ %"vl72693([[A1]], 1)", %[[BB76951]] ] +; CHECK-NEXT: %"op81283(op18131, vl72693)" = phi i32 [ %"op18131(op81283)70", %[[BB16110]] ], [ %"vl72693([[A1]], 1)", %[[BB76951]] ] +; CHECK-NEXT: %"op13219(op81283)" = mul i32 %"op81283(op18080, vl72693)", undef +; CHECK-NEXT: %"op16562(op13219)" = xor i32 -1, %"op13219(op81283)" +; CHECK-NEXT: %"op12556(op16562, op81283)" = add i32 %"op16562(op13219)", %"op81283(op18080, vl72693)" +; CHECK-NEXT: %"op18131(op81283)" = add i32 -1, %"op81283(op18131, vl72693)" +; CHECK-NEXT: %"op18080(op12556, op18131)" = add i32 %"op12556(op16562, op81283)", %"op18131(op81283)" +; CHECK-NEXT: %"op17720(op13219, op18080)" = mul i32 %"op13219(op81283)", %"op18080(op12556, op18131)" +; CHECK-NEXT: %"op16562(op17720)" = xor i32 -1, %"op17720(op13219, op18080)" +; CHECK-NEXT: %"op17430(op16562, op18080)" = add i32 %"op16562(op17720)", %"op18080(op12556, op18131)" ; CHECK-NEXT: %"op10412(op17430)" = add i32 %"op17430(op16562, op18080)", undef -; CHECK-NEXT: %"op17720(op10412, op17720)" = mul i32 %"op10412(op17430)", %"op17720(op15084, op18080)" +; CHECK-NEXT: %"op17720(op10412, op17720)" = mul i32 %"op10412(op17430)", %"op17720(op13219, op18080)" ; CHECK-NEXT: %"op16562(op17720)1" = xor i32 -1, %"op17720(op10412, op17720)" ; CHECK-NEXT: %"op17430(op10412, op16562)" = add i32 %"op10412(op17430)", %"op16562(op17720)1" ; CHECK-NEXT: %"op10412(op17430)2" = add i32 %"op17430(op10412, op16562)", undef @@ -45,11 +45,11 @@ define void @test(ptr, i32) { ; CHECK-NEXT: %"op17720(op10412, op17720)21" = mul i32 %"op10412(op17430)20", %"op17720(op10412, op17720)17" ; CHECK-NEXT: %"op16562(op17720)22" = xor i32 -1, %"op17720(op10412, op17720)21" ; CHECK-NEXT: %"op17430(op10412, op16562)23" = add i32 %"op10412(op17430)20", %"op16562(op17720)22" -; CHECK-NEXT: %"op17645(op10912)24" = add i32 -9, %"op10912(op17645, vl72693)" -; CHECK-NEXT: %"op18080(op17430, op17645)" = add i32 %"op17430(op10412, op16562)23", %"op17645(op10912)24" -; CHECK-NEXT: %"op17720(op17720, op18080)" = mul i32 %"op17720(op10412, op17720)21", %"op18080(op17430, op17645)" +; CHECK-NEXT: %"op18131(op81283)24" = add i32 -9, %"op81283(op18131, vl72693)" +; CHECK-NEXT: %"op18080(op17430, op18131)" = add i32 %"op17430(op10412, op16562)23", %"op18131(op81283)24" +; CHECK-NEXT: %"op17720(op17720, op18080)" = mul i32 %"op17720(op10412, op17720)21", %"op18080(op17430, op18131)" ; CHECK-NEXT: %"op16562(op17720)25" = xor i32 -1, %"op17720(op17720, op18080)" -; CHECK-NEXT: %"op17430(op16562, op18080)26" = add i32 %"op16562(op17720)25", %"op18080(op17430, op17645)" +; CHECK-NEXT: %"op17430(op16562, op18080)26" = add i32 %"op16562(op17720)25", %"op18080(op17430, op18131)" ; CHECK-NEXT: %"op10412(op17430)27" = add i32 %"op17430(op16562, op18080)26", undef ; CHECK-NEXT: %"op17720(op10412, op17720)28" = mul i32 %"op10412(op17430)27", %"op17720(op17720, op18080)" ; CHECK-NEXT: %"op16562(op17720)29" = xor i32 -1, %"op17720(op10412, op17720)28" @@ -66,11 +66,11 @@ define void @test(ptr, i32) { ; CHECK-NEXT: %"op17720(op10412, op17720)40" = mul i32 %"op10412(op17430)39", %"op17720(op10412, op17720)36" ; CHECK-NEXT: %"op16562(op17720)41" = xor i32 -1, %"op17720(op10412, op17720)40" ; CHECK-NEXT: %"op17430(op10412, op16562)42" = add i32 %"op10412(op17430)39", %"op16562(op17720)41" -; CHECK-NEXT: %"op17645(op10912)43" = add i32 -14, %"op10912(op17645, vl72693)" -; CHECK-NEXT: %"op18080(op17430, op17645)44" = add i32 %"op17430(op10412, op16562)42", %"op17645(op10912)43" -; CHECK-NEXT: %"op17720(op17720, op18080)45" = mul i32 %"op17720(op10412, op17720)40", %"op18080(op17430, op17645)44" +; CHECK-NEXT: %"op18131(op81283)43" = add i32 -14, %"op81283(op18131, vl72693)" +; CHECK-NEXT: %"op18080(op17430, op18131)44" = add i32 %"op17430(op10412, op16562)42", %"op18131(op81283)43" +; CHECK-NEXT: %"op17720(op17720, op18080)45" = mul i32 %"op17720(op10412, op17720)40", %"op18080(op17430, op18131)44" ; CHECK-NEXT: %"op16562(op17720)46" = xor i32 -1, %"op17720(op17720, op18080)45" -; CHECK-NEXT: %"op17430(op16562, op18080)47" = add i32 %"op16562(op17720)46", %"op18080(op17430, op17645)44" +; CHECK-NEXT: %"op17430(op16562, op18080)47" = add i32 %"op16562(op17720)46", %"op18080(op17430, op18131)44" ; CHECK-NEXT: %"op10412(op17430)48" = add i32 %"op17430(op16562, op18080)47", undef ; CHECK-NEXT: %"op17720(op10412, op17720)49" = mul i32 %"op10412(op17430)48", %"op17720(op17720, op18080)45" ; CHECK-NEXT: %"op16562(op17720)50" = xor i32 -1, %"op17720(op10412, op17720)49" @@ -93,9 +93,9 @@ define void @test(ptr, i32) { ; CHECK-NEXT: %"op17430(op10412, op16562)67" = add i32 %"op10412(op17430)64", %"op16562(op17720)66" ; CHECK-NEXT: %"op10412(op17430)68" = add i32 %"op17430(op10412, op16562)67", undef ; CHECK-NEXT: %"op10412(op10412)69" = add i32 %"op10412(op17430)68", undef -; CHECK-NEXT: %"op17645(op10912)70" = add i32 -21, %"op10912(op17645, vl72693)" -; CHECK-NEXT: %"op18080(op10412, op17645)" = add i32 %"op10412(op10412)69", %"op17645(op10912)70" -; CHECK-NEXT: store i32 %"op18080(op10412, op17645)", ptr [[A0]], align 4 +; CHECK-NEXT: %"op18131(op81283)70" = add i32 -21, %"op81283(op18131, vl72693)" +; CHECK-NEXT: %"op18080(op10412, op18131)" = add i32 %"op10412(op10412)69", %"op18131(op81283)70" +; CHECK-NEXT: store i32 %"op18080(op10412, op18131)", ptr [[A0]], align 4 ; CHECK-NEXT: br label %[[BB16110]] ; bb: diff --git a/llvm/test/Transforms/IRNormalizer/reordering-basic.ll b/llvm/test/Transforms/IRNormalizer/reordering-basic.ll index fd09ce0..06e67e0 100644 --- a/llvm/test/Transforms/IRNormalizer/reordering-basic.ll +++ b/llvm/test/Transforms/IRNormalizer/reordering-basic.ll @@ -28,16 +28,16 @@ define double @baz(double %x) { ; CHECK-SAME: double [[A0:%.*]]) { ; CHECK-NEXT: [[BB76951:.*:]] ; CHECK-NEXT: [[IFCOND:%.*]] = fcmp one double [[A0]], 0.000000e+00 -; CHECK-NEXT: br i1 [[IFCOND]], label %[[BB91455:.*]], label %[[BB914551:.*]] -; CHECK: [[BB91455]]: -; CHECK-NEXT: %"vl15001bir()" = call double @bir() +; CHECK-NEXT: br i1 [[IFCOND]], label %[[BB47054:.*]], label %[[BB470541:.*]] +; CHECK: [[BB47054]]: +; CHECK-NEXT: %"vl16994bir()" = call double @bir() ; CHECK-NEXT: br label %[[BB17254:.*]] -; CHECK: [[BB914551]]: -; CHECK-NEXT: %"vl69719bar()" = call double @bar() +; CHECK: [[BB470541]]: +; CHECK-NEXT: %"vl88592bar()" = call double @bar() ; CHECK-NEXT: br label %[[BB17254]] ; CHECK: [[BB17254]]: -; CHECK-NEXT: %"op19734(vl15001, vl69719)" = phi double [ %"vl15001bir()", %[[BB91455]] ], [ %"vl69719bar()", %[[BB914551]] ] -; CHECK-NEXT: ret double %"op19734(vl15001, vl69719)" +; CHECK-NEXT: %"op16411(vl16994, vl88592)" = phi double [ %"vl16994bir()", %[[BB47054]] ], [ %"vl88592bar()", %[[BB470541]] ] +; CHECK-NEXT: ret double %"op16411(vl16994, vl88592)" ; entry: %ifcond = fcmp one double %x, 0.000000e+00 diff --git a/llvm/test/Transforms/IRNormalizer/reordering.ll b/llvm/test/Transforms/IRNormalizer/reordering.ll index 64abe8e..a3dbcb5 100644 --- a/llvm/test/Transforms/IRNormalizer/reordering.ll +++ b/llvm/test/Transforms/IRNormalizer/reordering.ll @@ -23,7 +23,7 @@ declare void @effecting() ; Place dead instruction(s) before the terminator define void @call_effecting() { ; CHECK-LABEL: define void @call_effecting() { -; CHECK-NEXT: bb15160: +; CHECK-NEXT: bb14885: ; CHECK-NEXT: call void @effecting() ; CHECK-NEXT: [[TMP0:%.*]] = add i32 0, 1 ; CHECK-NEXT: ret void @@ -51,7 +51,7 @@ exit: define void @dont_move_above_alloca() { ; CHECK-LABEL: define void @dont_move_above_alloca() { -; CHECK-NEXT: bb15160: +; CHECK-NEXT: bb14885: ; CHECK-NEXT: [[TMP0:%.*]] = alloca i32, align 4 ; CHECK-NEXT: call void @effecting() ; CHECK-NEXT: ret void @@ -65,7 +65,7 @@ declare void @effecting1() define void @dont_reorder_effecting() { ; CHECK-LABEL: define void @dont_reorder_effecting() { -; CHECK-NEXT: bb10075: +; CHECK-NEXT: bb45003: ; CHECK-NEXT: call void @effecting() ; CHECK-NEXT: call void @effecting1() ; CHECK-NEXT: ret void @@ -79,7 +79,7 @@ declare void @effecting2(i32) define void @dont_reorder_effecting1() { ; CHECK-LABEL: define void @dont_reorder_effecting1() { -; CHECK-NEXT: bb10075: +; CHECK-NEXT: bb45003: ; CHECK-NEXT: [[ONE:%.*]] = add i32 1, 1 ; CHECK-NEXT: call void @effecting2(i32 [[ONE]]) ; CHECK-NEXT: [[TWO:%.*]] = add i32 2, 2 diff --git a/llvm/test/Transforms/InferAlignment/propagate-from-other-load-stores.ll b/llvm/test/Transforms/InferAlignment/propagate-from-other-load-stores.ll new file mode 100644 index 0000000..3fc7c59 --- /dev/null +++ b/llvm/test/Transforms/InferAlignment/propagate-from-other-load-stores.ll @@ -0,0 +1,194 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 5 +; RUN: opt < %s -passes=infer-alignment -S | FileCheck %s +%struct.S1 = type { %struct.float3, %struct.float3, i32, i32 } +%struct.float3 = type { float, float, float } + + +; ------------------------------------------------------------------------------ +; Test that we can propagate the align 16 to the load and store that are set to align 4 +; ------------------------------------------------------------------------------ + +define void @prop_align(ptr %v, ptr %vout) { +; CHECK-LABEL: define void @prop_align( +; CHECK-SAME: ptr [[V:%.*]], ptr [[VOUT:%.*]]) { +; CHECK-NEXT: [[DOTUNPACK_UNPACK:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: [[DOTUNPACK_ELT7:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 4 +; CHECK-NEXT: [[DOTUNPACK_UNPACK8:%.*]] = load float, ptr [[DOTUNPACK_ELT7]], align 4 +; CHECK-NEXT: [[DOTUNPACK_ELT9:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 8 +; CHECK-NEXT: [[DOTUNPACK_UNPACK10:%.*]] = load float, ptr [[DOTUNPACK_ELT9]], align 8 +; CHECK-NEXT: [[DOTELT1:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 12 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK:%.*]] = load float, ptr [[DOTELT1]], align 4 +; CHECK-NEXT: [[DOTUNPACK2_ELT12:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 16 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK13:%.*]] = load float, ptr [[DOTUNPACK2_ELT12]], align 16 +; CHECK-NEXT: [[DOTUNPACK2_ELT14:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 20 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK15:%.*]] = load float, ptr [[DOTUNPACK2_ELT14]], align 4 +; CHECK-NEXT: [[DOTELT3:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 24 +; CHECK-NEXT: [[DOTUNPACK4:%.*]] = load i32, ptr [[DOTELT3]], align 8 +; CHECK-NEXT: [[DOTELT5:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 28 +; CHECK-NEXT: [[DOTUNPACK6:%.*]] = load i32, ptr [[DOTELT5]], align 4 +; CHECK-NEXT: store float [[DOTUNPACK_UNPACK]], ptr [[VOUT]], align 16 +; CHECK-NEXT: [[VOUT_REPACK23:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 4 +; CHECK-NEXT: store float [[DOTUNPACK_UNPACK8]], ptr [[VOUT_REPACK23]], align 4 +; CHECK-NEXT: [[VOUT_REPACK25:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 8 +; CHECK-NEXT: store float [[DOTUNPACK_UNPACK10]], ptr [[VOUT_REPACK25]], align 8 +; CHECK-NEXT: [[VOUT_REPACK17:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 12 +; CHECK-NEXT: store float [[DOTUNPACK2_UNPACK]], ptr [[VOUT_REPACK17]], align 4 +; CHECK-NEXT: [[VOUT_REPACK17_REPACK27:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 16 +; CHECK-NEXT: store float [[DOTUNPACK2_UNPACK13]], ptr [[VOUT_REPACK17_REPACK27]], align 16 +; CHECK-NEXT: [[VOUT_REPACK17_REPACK29:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 20 +; CHECK-NEXT: store float [[DOTUNPACK2_UNPACK15]], ptr [[VOUT_REPACK17_REPACK29]], align 4 +; CHECK-NEXT: [[VOUT_REPACK19:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 24 +; CHECK-NEXT: store i32 [[DOTUNPACK4]], ptr [[VOUT_REPACK19]], align 8 +; CHECK-NEXT: [[VOUT_REPACK21:%.*]] = getelementptr inbounds nuw i8, ptr [[VOUT]], i64 28 +; CHECK-NEXT: store i32 [[DOTUNPACK6]], ptr [[VOUT_REPACK21]], align 4 +; CHECK-NEXT: ret void +; + %.unpack.unpack = load float, ptr %v, align 16 + %.unpack.elt7 = getelementptr inbounds nuw i8, ptr %v, i64 4 + %.unpack.unpack8 = load float, ptr %.unpack.elt7, align 4 + %.unpack.elt9 = getelementptr inbounds nuw i8, ptr %v, i64 8 + %.unpack.unpack10 = load float, ptr %.unpack.elt9, align 8 + %.elt1 = getelementptr inbounds nuw i8, ptr %v, i64 12 + %.unpack2.unpack = load float, ptr %.elt1, align 4 + %.unpack2.elt12 = getelementptr inbounds nuw i8, ptr %v, i64 16 + %.unpack2.unpack13 = load float, ptr %.unpack2.elt12, align 4 + %.unpack2.elt14 = getelementptr inbounds nuw i8, ptr %v, i64 20 + %.unpack2.unpack15 = load float, ptr %.unpack2.elt14, align 4 + %.elt3 = getelementptr inbounds nuw i8, ptr %v, i64 24 + %.unpack4 = load i32, ptr %.elt3, align 8 + %.elt5 = getelementptr inbounds nuw i8, ptr %v, i64 28 + %.unpack6 = load i32, ptr %.elt5, align 4 + store float %.unpack.unpack, ptr %vout, align 16 + %vout.repack23 = getelementptr inbounds nuw i8, ptr %vout, i64 4 + store float %.unpack.unpack8, ptr %vout.repack23, align 4 + %vout.repack25 = getelementptr inbounds nuw i8, ptr %vout, i64 8 + store float %.unpack.unpack10, ptr %vout.repack25, align 8 + %vout.repack17 = getelementptr inbounds nuw i8, ptr %vout, i64 12 + store float %.unpack2.unpack, ptr %vout.repack17, align 4 + %vout.repack17.repack27 = getelementptr inbounds nuw i8, ptr %vout, i64 16 + store float %.unpack2.unpack13, ptr %vout.repack17.repack27, align 4 + %vout.repack17.repack29 = getelementptr inbounds nuw i8, ptr %vout, i64 20 + store float %.unpack2.unpack15, ptr %vout.repack17.repack29, align 4 + %vout.repack19 = getelementptr inbounds nuw i8, ptr %vout, i64 24 + store i32 %.unpack4, ptr %vout.repack19, align 8 + %vout.repack21 = getelementptr inbounds nuw i8, ptr %vout, i64 28 + store i32 %.unpack6, ptr %vout.repack21, align 4 + ret void +} + +; ------------------------------------------------------------------------------ +; Test that alignment is not propagated from a source that does not dominate the destination +; ------------------------------------------------------------------------------ + +define void @no_prop_align(ptr %v, ptr %vout, i1 %cond) { +; CHECK-LABEL: define void @no_prop_align( +; CHECK-SAME: ptr [[V:%.*]], ptr [[VOUT:%.*]], i1 [[COND:%.*]]) { +; CHECK-NEXT: br i1 [[COND]], label %[[BRANCH1:.*]], label %[[BRANCH2:.*]] +; CHECK: [[BRANCH1]]: +; CHECK-NEXT: [[DOTUNPACK_UNPACK:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: [[DOTUNPACK_ELT7:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 4 +; CHECK-NEXT: [[DOTUNPACK_UNPACK8:%.*]] = load float, ptr [[DOTUNPACK_ELT7]], align 4 +; CHECK-NEXT: [[DOTUNPACK_ELT9:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 8 +; CHECK-NEXT: [[DOTUNPACK_UNPACK10:%.*]] = load float, ptr [[DOTUNPACK_ELT9]], align 8 +; CHECK-NEXT: [[DOTELT1:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 12 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK:%.*]] = load float, ptr [[DOTELT1]], align 4 +; CHECK-NEXT: br label %[[END:.*]] +; CHECK: [[BRANCH2]]: +; CHECK-NEXT: [[DOTUNPACK2_ELT12:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 16 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK13:%.*]] = load float, ptr [[DOTUNPACK2_ELT12]], align 4 +; CHECK-NEXT: [[DOTUNPACK2_ELT14:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 20 +; CHECK-NEXT: [[DOTUNPACK2_UNPACK15:%.*]] = load float, ptr [[DOTUNPACK2_ELT14]], align 4 +; CHECK-NEXT: [[DOTELT3:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 24 +; CHECK-NEXT: [[DOTUNPACK4:%.*]] = load i32, ptr [[DOTELT3]], align 8 +; CHECK-NEXT: [[DOTELT5:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 28 +; CHECK-NEXT: [[DOTUNPACK6:%.*]] = load i32, ptr [[DOTELT5]], align 4 +; CHECK-NEXT: br label %[[END]] +; CHECK: [[END]]: +; CHECK-NEXT: ret void +; + br i1 %cond, label %branch1, label %branch2 + +branch1: + %.unpack.unpack = load float, ptr %v, align 16 + %.unpack.elt7 = getelementptr inbounds nuw i8, ptr %v, i64 4 + %.unpack.unpack8 = load float, ptr %.unpack.elt7, align 4 + %.unpack.elt9 = getelementptr inbounds nuw i8, ptr %v, i64 8 + %.unpack.unpack10 = load float, ptr %.unpack.elt9, align 8 + %.elt1 = getelementptr inbounds nuw i8, ptr %v, i64 12 + %.unpack2.unpack = load float, ptr %.elt1, align 4 + br label %end + +branch2: + %.unpack2.elt12 = getelementptr inbounds nuw i8, ptr %v, i64 16 + %.unpack2.unpack13 = load float, ptr %.unpack2.elt12, align 4 + %.unpack2.elt14 = getelementptr inbounds nuw i8, ptr %v, i64 20 + %.unpack2.unpack15 = load float, ptr %.unpack2.elt14, align 4 + %.elt3 = getelementptr inbounds nuw i8, ptr %v, i64 24 + %.unpack4 = load i32, ptr %.elt3, align 8 + %.elt5 = getelementptr inbounds nuw i8, ptr %v, i64 28 + %.unpack6 = load i32, ptr %.elt5, align 4 + br label %end + +end: + ret void +} + +; ------------------------------------------------------------------------------ +; Test that we can propagate to/from negative offset GEPs +; ------------------------------------------------------------------------------ + +define void @prop_align_negative_offset(ptr %v) { +; CHECK-LABEL: define void @prop_align_negative_offset( +; CHECK-SAME: ptr [[V:%.*]]) { +; CHECK-NEXT: [[LOADALIGNED:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: [[GEPNEGATIVE:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 -16 +; CHECK-NEXT: [[LOADUNALIGNED:%.*]] = load float, ptr [[GEPNEGATIVE]], align 16 +; CHECK-NEXT: ret void +; + %loadAligned= load float, ptr %v, align 16 + %gepNegative = getelementptr inbounds nuw i8, ptr %v, i64 -16 + %loadUnaligned = load float, ptr %gepNegative, align 4 + ret void +} + +define void @prop_align_negative_offset_2(ptr %v) { +; CHECK-LABEL: define void @prop_align_negative_offset_2( +; CHECK-SAME: ptr [[V:%.*]]) { +; CHECK-NEXT: [[GEPNEGATIVE:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 -16 +; CHECK-NEXT: [[LOADALIGNED:%.*]] = load float, ptr [[GEPNEGATIVE]], align 16 +; CHECK-NEXT: [[LOADUNALIGNED:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: ret void +; + %gepNegative = getelementptr inbounds nuw i8, ptr %v, i64 -16 + %loadAligned = load float, ptr %gepNegative, align 16 + %loadUnaligned= load float, ptr %v, align 4 + ret void +} + +define void @prop_align_negative_offset_3(ptr %v) { +; CHECK-LABEL: define void @prop_align_negative_offset_3( +; CHECK-SAME: ptr [[V:%.*]]) { +; CHECK-NEXT: [[LOADALIGNED:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: [[GEPNEGATIVE:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 -8 +; CHECK-NEXT: [[LOADUNALIGNED:%.*]] = load float, ptr [[GEPNEGATIVE]], align 8 +; CHECK-NEXT: ret void +; + %loadAligned= load float, ptr %v, align 16 + %gepNegative = getelementptr inbounds nuw i8, ptr %v, i64 -8 + %loadUnaligned = load float, ptr %gepNegative, align 4 + ret void +} + +define void @prop_align_negative_offset_4(ptr %v) { +; CHECK-LABEL: define void @prop_align_negative_offset_4( +; CHECK-SAME: ptr [[V:%.*]]) { +; CHECK-NEXT: [[LOADALIGNED:%.*]] = load float, ptr [[V]], align 16 +; CHECK-NEXT: [[GEPNEGATIVE:%.*]] = getelementptr inbounds nuw i8, ptr [[V]], i64 -20 +; CHECK-NEXT: [[LOADUNALIGNED:%.*]] = load float, ptr [[GEPNEGATIVE]], align 4 +; CHECK-NEXT: ret void +; + %loadAligned= load float, ptr %v, align 16 + %gepNegative = getelementptr inbounds nuw i8, ptr %v, i64 -20 + %loadUnaligned = load float, ptr %gepNegative, align 4 + ret void +} diff --git a/llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll b/llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll index 405a26d..c649f29e 100644 --- a/llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll +++ b/llvm/test/Transforms/PhaseOrdering/X86/masked-memory-ops-with-cf.ll @@ -13,7 +13,7 @@ define void @basic(i1 %cond, ptr %b, ptr %p, ptr %q) { ; CHECK-NEXT: [[TMP5:%.*]] = call <1 x i64> @llvm.masked.load.v1i64.p0(ptr [[B:%.*]], i32 8, <1 x i1> [[TMP0]], <1 x i64> poison) ; CHECK-NEXT: [[TMP6:%.*]] = bitcast <1 x i64> [[TMP5]] to i64 ; CHECK-NEXT: [[TMP7:%.*]] = bitcast i16 [[TMP2]] to <1 x i16> -; CHECK-NEXT: call void @llvm.masked.store.v1i16.p0(<1 x i16> [[TMP7]], ptr [[B]], i32 2, <1 x i1> [[TMP0]]) +; CHECK-NEXT: call void @llvm.masked.store.v1i16.p0(<1 x i16> [[TMP7]], ptr [[B]], i32 8, <1 x i1> [[TMP0]]) ; CHECK-NEXT: [[TMP8:%.*]] = bitcast i32 [[TMP4]] to <1 x i32> ; CHECK-NEXT: call void @llvm.masked.store.v1i32.p0(<1 x i32> [[TMP8]], ptr [[P]], i32 4, <1 x i1> [[TMP0]]) ; CHECK-NEXT: [[TMP9:%.*]] = bitcast i64 [[TMP6]] to <1 x i64> diff --git a/llvm/test/lit.site.cfg.py.in b/llvm/test/lit.site.cfg.py.in index 893e2cb..973e0ec9 100644 --- a/llvm/test/lit.site.cfg.py.in +++ b/llvm/test/lit.site.cfg.py.in @@ -66,7 +66,6 @@ config.spirv_tools_tests = @LLVM_INCLUDE_SPIRV_TOOLS_TESTS@ config.have_vc_rev = @LLVM_APPEND_VC_REV@ config.force_vc_rev = "@LLVM_FORCE_VC_REVISION@" config.has_logf128 = @LLVM_HAS_LOGF128@ -config.has_key_instructions = @LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS@ import lit.llvm lit.llvm.initialize(lit_config, config) diff --git a/llvm/test/tools/llvm-ir2vec/entities.ll b/llvm/test/tools/llvm-ir2vec/entities.ll index 737044c..4ed6400 100644 --- a/llvm/test/tools/llvm-ir2vec/entities.ll +++ b/llvm/test/tools/llvm-ir2vec/entities.ll @@ -1,6 +1,6 @@ ; RUN: llvm-ir2vec entities | FileCheck %s -CHECK: 92 +CHECK: 93 CHECK-NEXT: Ret 0 CHECK-NEXT: Br 1 CHECK-NEXT: Switch 2 @@ -48,48 +48,49 @@ CHECK-NEXT: SIToFP 43 CHECK-NEXT: FPTrunc 44 CHECK-NEXT: FPExt 45 CHECK-NEXT: PtrToInt 46 -CHECK-NEXT: IntToPtr 47 -CHECK-NEXT: BitCast 48 -CHECK-NEXT: AddrSpaceCast 49 -CHECK-NEXT: CleanupPad 50 -CHECK-NEXT: CatchPad 51 -CHECK-NEXT: ICmp 52 -CHECK-NEXT: FCmp 53 -CHECK-NEXT: PHI 54 -CHECK-NEXT: Call 55 -CHECK-NEXT: Select 56 -CHECK-NEXT: UserOp1 57 -CHECK-NEXT: UserOp2 58 -CHECK-NEXT: VAArg 59 -CHECK-NEXT: ExtractElement 60 -CHECK-NEXT: InsertElement 61 -CHECK-NEXT: ShuffleVector 62 -CHECK-NEXT: ExtractValue 63 -CHECK-NEXT: InsertValue 64 -CHECK-NEXT: LandingPad 65 -CHECK-NEXT: Freeze 66 -CHECK-NEXT: FloatTy 67 +CHECK-NEXT: PtrToAddr 47 +CHECK-NEXT: IntToPtr 48 +CHECK-NEXT: BitCast 49 +CHECK-NEXT: AddrSpaceCast 50 +CHECK-NEXT: CleanupPad 51 +CHECK-NEXT: CatchPad 52 +CHECK-NEXT: ICmp 53 +CHECK-NEXT: FCmp 54 +CHECK-NEXT: PHI 55 +CHECK-NEXT: Call 56 +CHECK-NEXT: Select 57 +CHECK-NEXT: UserOp1 58 +CHECK-NEXT: UserOp2 59 +CHECK-NEXT: VAArg 60 +CHECK-NEXT: ExtractElement 61 +CHECK-NEXT: InsertElement 62 +CHECK-NEXT: ShuffleVector 63 +CHECK-NEXT: ExtractValue 64 +CHECK-NEXT: InsertValue 65 +CHECK-NEXT: LandingPad 66 +CHECK-NEXT: Freeze 67 CHECK-NEXT: FloatTy 68 CHECK-NEXT: FloatTy 69 CHECK-NEXT: FloatTy 70 CHECK-NEXT: FloatTy 71 CHECK-NEXT: FloatTy 72 CHECK-NEXT: FloatTy 73 -CHECK-NEXT: VoidTy 74 -CHECK-NEXT: LabelTy 75 -CHECK-NEXT: MetadataTy 76 -CHECK-NEXT: UnknownTy 77 -CHECK-NEXT: TokenTy 78 -CHECK-NEXT: IntegerTy 79 -CHECK-NEXT: FunctionTy 80 -CHECK-NEXT: PointerTy 81 -CHECK-NEXT: StructTy 82 -CHECK-NEXT: ArrayTy 83 -CHECK-NEXT: VectorTy 84 +CHECK-NEXT: FloatTy 74 +CHECK-NEXT: VoidTy 75 +CHECK-NEXT: LabelTy 76 +CHECK-NEXT: MetadataTy 77 +CHECK-NEXT: UnknownTy 78 +CHECK-NEXT: TokenTy 79 +CHECK-NEXT: IntegerTy 80 +CHECK-NEXT: FunctionTy 81 +CHECK-NEXT: PointerTy 82 +CHECK-NEXT: StructTy 83 +CHECK-NEXT: ArrayTy 84 CHECK-NEXT: VectorTy 85 -CHECK-NEXT: PointerTy 86 -CHECK-NEXT: UnknownTy 87 -CHECK-NEXT: Function 88 -CHECK-NEXT: Pointer 89 -CHECK-NEXT: Constant 90 -CHECK-NEXT: Variable 91 +CHECK-NEXT: VectorTy 86 +CHECK-NEXT: PointerTy 87 +CHECK-NEXT: UnknownTy 88 +CHECK-NEXT: Function 89 +CHECK-NEXT: Pointer 90 +CHECK-NEXT: Constant 91 +CHECK-NEXT: Variable 92 diff --git a/llvm/test/tools/llvm-ir2vec/triplets.ll b/llvm/test/tools/llvm-ir2vec/triplets.ll index a7fd9e4..6f64bab 100644 --- a/llvm/test/tools/llvm-ir2vec/triplets.ll +++ b/llvm/test/tools/llvm-ir2vec/triplets.ll @@ -25,41 +25,41 @@ entry: } ; TRIPLETS: MAX_RELATION=3 -; TRIPLETS-NEXT: 12 79 0 -; TRIPLETS-NEXT: 12 91 2 -; TRIPLETS-NEXT: 12 91 3 +; TRIPLETS-NEXT: 12 80 0 +; TRIPLETS-NEXT: 12 92 2 +; TRIPLETS-NEXT: 12 92 3 ; TRIPLETS-NEXT: 12 0 1 -; TRIPLETS-NEXT: 0 74 0 -; TRIPLETS-NEXT: 0 91 2 -; TRIPLETS-NEXT: 16 79 0 -; TRIPLETS-NEXT: 16 91 2 -; TRIPLETS-NEXT: 16 91 3 +; TRIPLETS-NEXT: 0 75 0 +; TRIPLETS-NEXT: 0 92 2 +; TRIPLETS-NEXT: 16 80 0 +; TRIPLETS-NEXT: 16 92 2 +; TRIPLETS-NEXT: 16 92 3 ; TRIPLETS-NEXT: 16 0 1 -; TRIPLETS-NEXT: 0 74 0 -; TRIPLETS-NEXT: 0 91 2 -; TRIPLETS-NEXT: 30 81 0 -; TRIPLETS-NEXT: 30 90 2 +; TRIPLETS-NEXT: 0 75 0 +; TRIPLETS-NEXT: 0 92 2 +; TRIPLETS-NEXT: 30 82 0 +; TRIPLETS-NEXT: 30 91 2 ; TRIPLETS-NEXT: 30 30 1 -; TRIPLETS-NEXT: 30 81 0 -; TRIPLETS-NEXT: 30 90 2 +; TRIPLETS-NEXT: 30 82 0 +; TRIPLETS-NEXT: 30 91 2 ; TRIPLETS-NEXT: 30 32 1 -; TRIPLETS-NEXT: 32 74 0 -; TRIPLETS-NEXT: 32 91 2 -; TRIPLETS-NEXT: 32 89 3 +; TRIPLETS-NEXT: 32 75 0 +; TRIPLETS-NEXT: 32 92 2 +; TRIPLETS-NEXT: 32 90 3 ; TRIPLETS-NEXT: 32 32 1 -; TRIPLETS-NEXT: 32 74 0 -; TRIPLETS-NEXT: 32 91 2 -; TRIPLETS-NEXT: 32 89 3 +; TRIPLETS-NEXT: 32 75 0 +; TRIPLETS-NEXT: 32 92 2 +; TRIPLETS-NEXT: 32 90 3 ; TRIPLETS-NEXT: 32 31 1 -; TRIPLETS-NEXT: 31 79 0 -; TRIPLETS-NEXT: 31 89 2 +; TRIPLETS-NEXT: 31 80 0 +; TRIPLETS-NEXT: 31 90 2 ; TRIPLETS-NEXT: 31 31 1 -; TRIPLETS-NEXT: 31 79 0 -; TRIPLETS-NEXT: 31 89 2 +; TRIPLETS-NEXT: 31 80 0 +; TRIPLETS-NEXT: 31 90 2 ; TRIPLETS-NEXT: 31 12 1 -; TRIPLETS-NEXT: 12 79 0 -; TRIPLETS-NEXT: 12 91 2 -; TRIPLETS-NEXT: 12 91 3 +; TRIPLETS-NEXT: 12 80 0 +; TRIPLETS-NEXT: 12 92 2 +; TRIPLETS-NEXT: 12 92 3 ; TRIPLETS-NEXT: 12 0 1 -; TRIPLETS-NEXT: 0 74 0 -; TRIPLETS-NEXT: 0 91 2 +; TRIPLETS-NEXT: 0 75 0 +; TRIPLETS-NEXT: 0 92 2 diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s index 5cf5ed5..234a3e2 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-arithmetic.s @@ -3002,357 +3002,357 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu # CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWSUB_VX vwsub.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VV vaaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VV vaaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADDU_VX vaaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADDU_VX vaaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VV vaadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VV vaadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VAADD_VX vaadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VAADD_VX vaadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VV vasubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VV vasubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUBU_VX vasubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUBU_VX vasubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VV vasub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VV vasub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VASUB_VX vasub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VASUB_VX vasub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VMADC_VI vmadc.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -3882,445 +3882,445 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VRSUB_VX vrsub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VI vsaddu.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VI vsaddu.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VV vsaddu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VV vsaddu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADDU_VX vsaddu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADDU_VX vsaddu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VI vsadd.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VI vsadd.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VV vsadd.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VV vsadd.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSADD_VX vsadd.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSADD_VX vsadd.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VV vssubu.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VV vssubu.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUBU_VX vssubu.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUBU_VX vssubu.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VV vssub.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VV vssub.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 5 4.00 5 SMX60_VIEU[4] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSUB_VX vssub.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSUB_VX vssub.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VWADDU_WV vwaddu.wv v8, v16, v24 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu @@ -4574,7 +4574,7 @@ vwsub.wx v8, v16, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 1120.00 - - - - 3292.00 - +# CHECK-NEXT: - 1120.00 - - - - 4084.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: @@ -5267,11 +5267,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5279,29 +5279,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5311,11 +5311,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5323,29 +5323,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5355,11 +5355,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5367,29 +5367,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5399,11 +5399,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5411,29 +5411,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vaadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vaadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5443,11 +5443,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5455,29 +5455,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5487,11 +5487,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5499,29 +5499,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5531,11 +5531,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5543,29 +5543,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -5575,11 +5575,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -5587,29 +5587,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vasub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vasub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 4.00 - vmadc.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6147,11 +6147,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6159,29 +6159,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6191,11 +6191,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6203,29 +6203,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6235,11 +6235,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6247,29 +6247,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsaddu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsaddu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6279,11 +6279,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6291,29 +6291,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6323,11 +6323,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6335,29 +6335,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6367,11 +6367,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6379,29 +6379,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsadd.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsadd.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6411,11 +6411,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6423,29 +6423,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6455,11 +6455,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6467,29 +6467,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssubu.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssubu.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6499,11 +6499,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6511,29 +6511,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -6543,11 +6543,11 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu @@ -6555,29 +6555,29 @@ vwsub.wx v8, v16, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssub.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssub.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 4.00 - vwaddu.wv v8, v16, v24 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s index 89d3872..5a5f366 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-bitwise.s @@ -2630,269 +2630,269 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu # CHECK-NEXT: 1 16 4.00 16 SMX60_VIEU[4] VSRL_VX vsrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VI vssra.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VI vssra.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VV vssra.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VV vssra.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRA_VX vssra.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRA_VX vssra.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VI vssrl.vi v8, v8, 12 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VI vssrl.vi v8, v8, 12 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VV vssrl.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VV vssrl.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 1.00 4 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 2.00 4 SMX60_VIEU[2] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 4 4.00 4 SMX60_VIEU[4] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSSRL_VX vssrl.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSSRL_VX vssrl.vx v8, v8, t5 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP @@ -2906,7 +2906,7 @@ vssrl.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 708.00 - - - - 2436.00 - +# CHECK-NEXT: - 708.00 - - - - 3060.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: @@ -4069,43 +4069,43 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -4113,43 +4113,43 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -4157,43 +4157,43 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssra.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssra.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -4201,43 +4201,43 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vi v8, v8, 12 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vi v8, v8, 12 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -4245,43 +4245,43 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -4289,40 +4289,40 @@ vssrl.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 2.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vssrl.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vssrl.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vssrl.vx v8, v8, t5 diff --git a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s index 572ebf2..a166f15 100644 --- a/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s +++ b/llvm/test/tools/llvm-mca/RISCV/SpacemitX60/rvv-mul-div.s @@ -1906,93 +1906,93 @@ vsmul.vx v8, v8, x30 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu # CHECK-NEXT: 1 8 4.00 8 SMX60_VIEU[4] VWMULSU_VX vwmulsu.vx v8, v16, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VV vsmul.vv v8, v8, v8 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VV vsmul.vv v8, v8, v8 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, mf8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, mf4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, mf2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 1.00 7 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 7 4.00 7 SMX60_VIEU[4] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 8 8.00 8 SMX60_VIEU[8] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 16 16.00 16 SMX60_VIEU[16] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK-NEXT: 1 1 1.00 U 1 SMX60_IEU,SMX60_IEUA VSETVLI vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: 1 1 1.00 1 SMX60_VIEU VSMUL_VX vsmul.vx v8, v8, t5 +# CHECK-NEXT: 1 32 32.00 32 SMX60_VIEU[32] VSMUL_VX vsmul.vx v8, v8, t5 # CHECK: Resources: # CHECK-NEXT: [0] - SMX60_FP @@ -2006,7 +2006,7 @@ vsmul.vx v8, v8, x30 # CHECK: Resource pressure per iteration: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] -# CHECK-NEXT: - 486.00 - - - - 3748.00 - +# CHECK-NEXT: - 486.00 - - - - 4196.00 - # CHECK: Resource pressure by instruction: # CHECK-NEXT: [0] [1] [2] [3.0] [3.1] [4] [5] [6] Instructions: @@ -2901,43 +2901,43 @@ vsmul.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vv v8, v8, v8 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vv v8, v8, v8 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf4, tu, mu @@ -2945,40 +2945,40 @@ vsmul.vx v8, v8, x30 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, mf8, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e8, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, mf4, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e16, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, mf2, tu, mu # CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e32, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m1, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 4.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m2, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 8.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m4, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 16.00 - vsmul.vx v8, v8, t5 # CHECK-NEXT: - 1.00 - - - - - - vsetvli t3, zero, e64, m8, tu, mu -# CHECK-NEXT: - - - - - - 1.00 - vsmul.vx v8, v8, t5 +# CHECK-NEXT: - - - - - - 32.00 - vsmul.vx v8, v8, t5 diff --git a/llvm/test/tools/llvm-profdata/merge-traces.proftext b/llvm/test/tools/llvm-profdata/merge-traces.proftext index bcf29ba..3512f33 100644 --- a/llvm/test/tools/llvm-profdata/merge-traces.proftext +++ b/llvm/test/tools/llvm-profdata/merge-traces.proftext @@ -1,24 +1,36 @@ -# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s -o %t.profdata -# RUN: llvm-profdata show --temporal-profile-traces %t.profdata | FileCheck %s --check-prefixes=SAMPLE1,SEEN1 -# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %t.profdata -o %t.profdata -# RUN: llvm-profdata show --temporal-profile-traces %t.profdata | FileCheck %s --check-prefixes=SAMPLE2,SEEN2 -# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %t.profdata -o %t.profdata -# RUN: llvm-profdata show --temporal-profile-traces %t.profdata | FileCheck %s --check-prefixes=SAMPLE2,SEEN3 -# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %t.profdata -o %t.profdata -# RUN: llvm-profdata show --temporal-profile-traces %t.profdata | FileCheck %s --check-prefixes=SAMPLE2,SEEN4 - -# SEEN1: Temporal Profile Traces (samples=1 seen=1): -# SEEN2: Temporal Profile Traces (samples=2 seen=2): -# SEEN3: Temporal Profile Traces (samples=2 seen=3): -# SEEN4: Temporal Profile Traces (samples=2 seen=4): -# SAMPLE1: Temporal Profile Trace 0 (weight=1 count=3): -# SAMPLE1: a -# SAMPLE1: b -# SAMPLE1: c -# SAMPLE2: Temporal Profile Trace 1 (weight=1 count=3): -# SAMPLE2: a -# SAMPLE2: b -# SAMPLE2: c +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s --text | FileCheck %s --check-prefixes=CHECK,SEEN1,SAMPLE1 + +# Merge %s twice so it has two traces +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %s --text | FileCheck %s --check-prefixes=CHECK,SEEN2,SAMPLE2 +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %s -o %t-2.profdata + +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %s %s --text | FileCheck %s --check-prefixes=CHECK,SEEN3,SAMPLE2 +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %t-2.profdata %s --text | FileCheck %s --check-prefixes=CHECK,SEEN3,SAMPLE2 +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %t-2.profdata --text | FileCheck %s --check-prefixes=CHECK,SEEN3,SAMPLE2 + +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %s %s %s --text | FileCheck %s --check-prefixes=CHECK,SEEN4,SAMPLE2 +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %t-2.profdata %s %s --text | FileCheck %s --check-prefixes=CHECK,SEEN4,SAMPLE2 +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %t-2.profdata %t-2.profdata --text | FileCheck %s --check-prefixes=CHECK,SEEN4,SAMPLE2 + +# Test that we can increase the reservoir size, even if inputs are sampled +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=2 %s %s %s %s -o %t-4.profdata +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=4 %t-4.profdata %t-4.profdata --text | FileCheck %s --check-prefixes=CHECK,SEEN8,SAMPLE4 + +# Test that decreasing the reservoir size truncates traces +# RUN: llvm-profdata merge --temporal-profile-trace-reservoir-size=1 %t-4.profdata --text | FileCheck %s --check-prefixes=CHECK,SEEN4,SAMPLE1 + +# CHECK: :temporal_prof_traces +# CHECK: # Num Temporal Profile Traces: +# SAMPLE1: 1 +# SAMPLE2: 2 +# SAMPLE4: 4 +# CHECK: # Temporal Profile Trace Stream Size: +# SEEN1: 1 +# SEEN2: 2 +# SEEN3: 3 +# SEEN4: 4 +# SEEN8: 8 +# CHECK: a,b,c, # Header :ir diff --git a/llvm/test/tools/llvm-profdata/read-traces.proftext b/llvm/test/tools/llvm-profdata/read-traces.proftext index 87f69fe..5e822a9 100644 --- a/llvm/test/tools/llvm-profdata/read-traces.proftext +++ b/llvm/test/tools/llvm-profdata/read-traces.proftext @@ -3,19 +3,16 @@ # RUN: llvm-profdata merge -text %t.2.profdata -o %t.3.proftext # RUN: diff %t.1.proftext %t.3.proftext -# RUN: llvm-profdata show --temporal-profile-traces %t.1.proftext | FileCheck %s +# RUN: llvm-profdata merge -text %s | FileCheck %s -# CHECK: Temporal Profile Traces (samples=3 seen=3): -# CHECK: Temporal Profile Trace 0 (weight=1 count=3): -# CHECK: foo -# CHECK: bar -# CHECK: goo -# CHECK: Temporal Profile Trace 1 (weight=3 count=3): -# CHECK: foo -# CHECK: goo -# CHECK: bar -# CHECK: Temporal Profile Trace 2 (weight=1 count=1): -# CHECK: goo +# CHECK: :temporal_prof_traces +# CHECK: # Num Temporal Profile Traces: +# CHECK-NEXT: 3 +# CHECK: # Temporal Profile Trace Stream Size: +# CHECK-NEXT: 3 +# CHECK-DAG: foo,bar,goo, +# CHECK-DAG: foo,goo,bar, +# CHECK-DAG: goo, # Header :ir diff --git a/llvm/test/tools/llvm-profdata/trace-limit.proftext b/llvm/test/tools/llvm-profdata/trace-limit.proftext index e246ee8..6b4f974 100644 --- a/llvm/test/tools/llvm-profdata/trace-limit.proftext +++ b/llvm/test/tools/llvm-profdata/trace-limit.proftext @@ -11,7 +11,7 @@ # RUN: llvm-profdata merge --temporal-profile-max-trace-length=1000 %s -o %t.profdata # RUN: llvm-profdata show --temporal-profile-traces %t.profdata | FileCheck %s --check-prefixes=CHECK,ALL -# NONE: Temporal Profile Traces (samples=0 +# NONE: Temporal Profile Traces (samples=0 seen=0): # CHECK: Temporal Profile Traces (samples=1 seen=1): # SOME: Trace 0 (weight=1 count=2): # ALL: Trace 0 (weight=1 count=3): diff --git a/llvm/unittests/Analysis/IR2VecTest.cpp b/llvm/unittests/Analysis/IR2VecTest.cpp index e288585..f7838cc4 100644 --- a/llvm/unittests/Analysis/IR2VecTest.cpp +++ b/llvm/unittests/Analysis/IR2VecTest.cpp @@ -320,11 +320,13 @@ TEST_F(IR2VecTestFixture, GetInstVecMap) { EXPECT_TRUE(InstMap.count(AddInst)); EXPECT_TRUE(InstMap.count(RetInst)); - EXPECT_EQ(InstMap.at(AddInst).size(), 2u); - EXPECT_EQ(InstMap.at(RetInst).size(), 2u); + const auto &AddEmb = InstMap.at(AddInst); + const auto &RetEmb = InstMap.at(RetInst); + EXPECT_EQ(AddEmb.size(), 2u); + EXPECT_EQ(RetEmb.size(), 2u); - EXPECT_TRUE(InstMap.at(AddInst).approximatelyEquals(Embedding(2, 27.6))); - EXPECT_TRUE(InstMap.at(RetInst).approximatelyEquals(Embedding(2, 16.8))); + EXPECT_TRUE(AddEmb.approximatelyEquals(Embedding(2, 27.9))); + EXPECT_TRUE(RetEmb.approximatelyEquals(Embedding(2, 17.0))); } TEST_F(IR2VecTestFixture, GetBBVecMap) { @@ -337,9 +339,9 @@ TEST_F(IR2VecTestFixture, GetBBVecMap) { EXPECT_TRUE(BBMap.count(BB)); EXPECT_EQ(BBMap.at(BB).size(), 2u); - // BB vector should be sum of add and ret: {27.6, 27.6} + {16.8, 16.8} = - // {44.4, 44.4} - EXPECT_TRUE(BBMap.at(BB).approximatelyEquals(Embedding(2, 44.4))); + // BB vector should be sum of add and ret: {27.9, 27.9} + {17.0, 17.0} = + // {44.9, 44.9} + EXPECT_TRUE(BBMap.at(BB).approximatelyEquals(Embedding(2, 44.9))); } TEST_F(IR2VecTestFixture, GetBBVector) { @@ -349,7 +351,7 @@ TEST_F(IR2VecTestFixture, GetBBVector) { const auto &BBVec = Emb->getBBVector(*BB); EXPECT_EQ(BBVec.size(), 2u); - EXPECT_TRUE(BBVec.approximatelyEquals(Embedding(2, 44.4))); + EXPECT_TRUE(BBVec.approximatelyEquals(Embedding(2, 44.9))); } TEST_F(IR2VecTestFixture, GetFunctionVector) { @@ -360,8 +362,8 @@ TEST_F(IR2VecTestFixture, GetFunctionVector) { EXPECT_EQ(FuncVec.size(), 2u); - // Function vector should match BB vector (only one BB): {44.4, 44.4} - EXPECT_TRUE(FuncVec.approximatelyEquals(Embedding(2, 44.4))); + // Function vector should match BB vector (only one BB): {44.9, 44.9} + EXPECT_TRUE(FuncVec.approximatelyEquals(Embedding(2, 44.9))); } static constexpr unsigned MaxOpcodes = Vocabulary::MaxOpcodes; diff --git a/llvm/unittests/IR/BasicBlockDbgInfoTest.cpp b/llvm/unittests/IR/BasicBlockDbgInfoTest.cpp index aac0f96..7780bba 100644 --- a/llvm/unittests/IR/BasicBlockDbgInfoTest.cpp +++ b/llvm/unittests/IR/BasicBlockDbgInfoTest.cpp @@ -189,11 +189,7 @@ TEST(BasicBlockDbgInfoTest, DropSourceAtomOnSplit) { ASSERT_TRUE(After); const DebugLoc &OrigTerminatorDL = After->getTerminator()->getDebugLoc(); ASSERT_TRUE(OrigTerminatorDL); -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS EXPECT_EQ(OrigTerminatorDL->getAtomGroup(), 1u); -#else - EXPECT_EQ(OrigTerminatorDL->getAtomGroup(), 0u); -#endif } // Test splitBasicBlock. @@ -204,11 +200,7 @@ TEST(BasicBlockDbgInfoTest, DropSourceAtomOnSplit) { const DebugLoc &OrigTerminatorDL = After->getTerminator()->getDebugLoc(); ASSERT_TRUE(OrigTerminatorDL); -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS EXPECT_EQ(OrigTerminatorDL->getAtomGroup(), 1u); -#else - EXPECT_EQ(OrigTerminatorDL->getAtomGroup(), 0u); -#endif BasicBlock *Before = After->getSinglePredecessor(); ASSERT_TRUE(Before); diff --git a/llvm/unittests/IR/MetadataTest.cpp b/llvm/unittests/IR/MetadataTest.cpp index ba8367f..7425703 100644 --- a/llvm/unittests/IR/MetadataTest.cpp +++ b/llvm/unittests/IR/MetadataTest.cpp @@ -1470,17 +1470,10 @@ TEST_F(DILocationTest, Merge) { PickMergedSourceLocations = false; } -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS #define EXPECT_ATOM(Loc, Group, Rank) \ EXPECT_EQ(Group, M->getAtomGroup()); \ EXPECT_EQ(Rank, M->getAtomRank()); -#else -#define EXPECT_ATOM(Loc, Group, Rank) \ - EXPECT_EQ(0u, M->getAtomGroup()); \ - EXPECT_EQ(0u, M->getAtomRank()); \ - (void)Group; \ - (void)Rank; -#endif + // Identical, including source atom numbers. { auto *A = DILocation::get(Context, 2, 7, N, nullptr, false, /*AtomGroup*/ 1, @@ -1753,15 +1746,8 @@ TEST_F(DILocationTest, KeyInstructions) { EXPECT_EQ(Context.pImpl->NextAtomGroup, 1u); DILocation *A1 = DILocation::get(Context, 1, 0, getSubprogram(), nullptr, false, 1, 2); - // The group is only applied to the DILocation if we've built LLVM with - // EXPERIMENTAL_KEY_INSTRUCTIONS. -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS EXPECT_EQ(A1->getAtomGroup(), 1u); EXPECT_EQ(A1->getAtomRank(), 2u); -#else - EXPECT_EQ(A1->getAtomGroup(), 0u); - EXPECT_EQ(A1->getAtomRank(), 0u); -#endif // Group number 1 has been "used" so next available is 2. EXPECT_EQ(Context.pImpl->NextAtomGroup, 2u); diff --git a/llvm/unittests/Transforms/Utils/CloningTest.cpp b/llvm/unittests/Transforms/Utils/CloningTest.cpp index b8b0357..fe81986 100644 --- a/llvm/unittests/Transforms/Utils/CloningTest.cpp +++ b/llvm/unittests/Transforms/Utils/CloningTest.cpp @@ -1203,13 +1203,9 @@ TEST_F(CloneInstruction, cloneKeyInstructions) { ASSERT_FALSE(verifyModule(*M, &errs())); -#ifdef EXPERIMENTAL_KEY_INSTRUCTIONS #define EXPECT_ATOM(Inst, G) \ EXPECT_TRUE(Inst->getDebugLoc()); \ EXPECT_EQ(Inst->getDebugLoc()->getAtomGroup(), uint64_t(G)); -#else -#define EXPECT_ATOM(Inst, G) (void)Inst; -#endif Function *F = M->getFunction("test"); BasicBlock *BB = &*F->begin(); diff --git a/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn b/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn index b609d4a..f8c4838 100644 --- a/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn +++ b/llvm/utils/gn/secondary/clang-tools-extra/clangd/BUILD.gn @@ -122,6 +122,7 @@ static_library("clangd") { "SemanticHighlighting.cpp", "SemanticSelection.cpp", "SourceCode.cpp", + "SymbolDocumentation.cpp", "SystemIncludeExtractor.cpp", "TUScheduler.cpp", "TidyProvider.cpp", diff --git a/llvm/utils/gn/secondary/clang/test/BUILD.gn b/llvm/utils/gn/secondary/clang/test/BUILD.gn index ed68387..020e35e 100644 --- a/llvm/utils/gn/secondary/clang/test/BUILD.gn +++ b/llvm/utils/gn/secondary/clang/test/BUILD.gn @@ -60,7 +60,6 @@ write_lit_config("lit_site_cfg") { "CLANG_VENDOR_UTI=org.llvm.clang", "ENABLE_BACKTRACES=1", "ENABLE_SHARED=0", - "LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS=0", "LLVM_EXTERNAL_LIT=", "LLVM_HOST_TRIPLE=$llvm_current_triple", "LLVM_INCLUDE_SPIRV_TOOLS_TESTS=0", diff --git a/llvm/utils/gn/secondary/llvm/test/BUILD.gn b/llvm/utils/gn/secondary/llvm/test/BUILD.gn index 08cddc1..aaac823 100644 --- a/llvm/utils/gn/secondary/llvm/test/BUILD.gn +++ b/llvm/utils/gn/secondary/llvm/test/BUILD.gn @@ -65,7 +65,6 @@ write_lit_config("lit_site_cfg") { "LLVM_ENABLE_FFI=0", "LLVM_ENABLE_HTTPLIB=0", "LLVM_ENABLE_PROFCHECK=0", - "LLVM_EXPERIMENTAL_KEY_INSTRUCTIONS=0", "LLVM_FORCE_VC_REVISION=", "LLVM_HAS_LOGF128=0", "LLVM_HAVE_OPT_VIEWER_MODULES=0", diff --git a/llvm/utils/lit/lit/llvm/config.py b/llvm/utils/lit/lit/llvm/config.py index 649636d..b04fb25 100644 --- a/llvm/utils/lit/lit/llvm/config.py +++ b/llvm/utils/lit/lit/llvm/config.py @@ -107,6 +107,8 @@ class LLVMConfig(object): features.add("system-solaris") elif platform.system() == "OS/390": features.add("system-zos") + elif sys.platform == "cygwin": + features.add("system-cygwin") # Native compilation: host arch == default triple arch # Both of these values should probably be in every site config (e.g. as diff --git a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td index 30df3b7..8d50726 100644 --- a/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td +++ b/mlir/include/mlir/Dialect/LLVMIR/NVVMOps.td @@ -402,6 +402,44 @@ def NVVM_ReduxOp : } //===----------------------------------------------------------------------===// +// NVVM Performance Monitor events +//===----------------------------------------------------------------------===// + +def NVVM_PMEventOp : NVVM_PTXBuilder_Op<"pmevent">, + Arguments<(ins OptionalAttr<I16Attr>:$maskedEventId, + OptionalAttr<I32Attr>:$eventId)> { + let summary = "Trigger one or more Performance Monitor events."; + + let description = [{ + Triggers one or more of a fixed number of performance monitor events, with + event index or mask specified by immediate operand. + + Without `mask` it triggers a single performance monitor event indexed by + immediate operand a, in the range 0..15. + + With `mask` it triggers one or more of the performance monitor events. Each + bit in the 16-bit immediate operand controls an event. + + [For more information, see PTX ISA](https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#miscellaneous-instructions-pmevent) + }]; + + string llvmBuilder = [{ + llvm::Value *mId = builder.getInt16(* $maskedEventId); + createIntrinsicCall(builder, llvm::Intrinsic::nvvm_pm_event_mask, {mId}); + }]; + + let assemblyFormat = "attr-dict (`id` `=` $eventId^)? (`mask` `=` $maskedEventId^)?"; + + let extraClassDeclaration = [{ + bool hasIntrinsic() { return !getEventId(); } + }]; + let extraClassDefinition = [{ + std::string $cppClass::getPtx() { return std::string("pmevent %0;"); } + }]; + let hasVerifier = 1; +} + +//===----------------------------------------------------------------------===// // NVVM Split arrive/wait barrier //===----------------------------------------------------------------------===// diff --git a/mlir/include/mlir/Dialect/XeGPU/IR/CMakeLists.txt b/mlir/include/mlir/Dialect/XeGPU/IR/CMakeLists.txt index 3f8cac4..728f1aa 100644 --- a/mlir/include/mlir/Dialect/XeGPU/IR/CMakeLists.txt +++ b/mlir/include/mlir/Dialect/XeGPU/IR/CMakeLists.txt @@ -12,3 +12,9 @@ mlir_tablegen(XeGPUEnums.h.inc -gen-enum-decls) mlir_tablegen(XeGPUEnums.cpp.inc -gen-enum-defs) add_public_tablegen_target(MLIRXeGPUEnumsIncGen) add_dependencies(mlir-headers MLIRXeGPUEnumsIncGen) + +set(LLVM_TARGET_DEFINITIONS XeGPUAttrs.td) +mlir_tablegen(XeGPUAttrInterface.h.inc -gen-attr-interface-decls) +mlir_tablegen(XeGPUAttrInterface.cpp.inc -gen-attr-interface-defs) +add_public_tablegen_target(MLIRXeGPUAttrInterfaceIncGen) +add_dependencies(mlir-headers MLIRXeGPUAttrInterfaceIncGen) diff --git a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h index 8e2784f..3592da4 100644 --- a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h +++ b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPU.h @@ -15,6 +15,7 @@ #include "mlir/IR/BuiltinTypes.h" #include "mlir/IR/Dialect.h" #include "mlir/IR/TypeUtilities.h" +#include "mlir/IR/Value.h" #include "mlir/Interfaces/ShapedOpInterfaces.h" #include "mlir/Interfaces/SideEffectInterfaces.h" #include "mlir/Interfaces/ViewLikeInterface.h" @@ -22,17 +23,19 @@ namespace mlir { namespace xegpu { class TensorDescType; +class LayoutAttr; +class SliceAttr; } // namespace xegpu } // namespace mlir +#include <mlir/Dialect/XeGPU/IR/XeGPUAttrInterface.h.inc> +#include <mlir/Dialect/XeGPU/IR/XeGPUDialect.h.inc> #include <mlir/Dialect/XeGPU/IR/XeGPUEnums.h.inc> + #define GET_ATTRDEF_CLASSES #include <mlir/Dialect/XeGPU/IR/XeGPUAttrs.h.inc> #define GET_TYPEDEF_CLASSES #include <mlir/Dialect/XeGPU/IR/XeGPUTypes.h.inc> - -#include <mlir/Dialect/XeGPU/IR/XeGPUDialect.h.inc> - #define GET_OP_CLASSES #include <mlir/Dialect/XeGPU/IR/XeGPU.h.inc> diff --git a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td index 64eb21c..1f420c1 100644 --- a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td +++ b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td @@ -175,7 +175,38 @@ def XeGPU_FenceScopeAttr: let assemblyFormat = "$value"; } -def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout"> { +def LayoutTrait: AttrInterface<"LayoutTrait"> { + let cppNamespace = "::mlir::xegpu"; + let description = [{ + Common trait for all XeGPU layouts. + }]; + + let methods = [ + InterfaceMethod<"Get the rank of attribute", + "int64_t", + "getRank">, + InterfaceMethod<"Get the SgLayout field of the attribute as integer array", + "std::optional<SmallVector<int64_t>>", + "getSgLayoutAsInt">, + InterfaceMethod<"Get the SgData field of the attribute as integer array", + "std::optional<SmallVector<int64_t>>", + "getSgDataAsInt">, + InterfaceMethod<[{Delinearizes a linear subgroup ID into its multidimensional + indices based on the effective subgroup layout.}], + "FailureOr<SmallVector<Value>>", + "delinearizeSubgroupId", + (ins "OpBuilder &": $builder, "Location":$loc, "Value":$linearId)>, + InterfaceMethod<[{Generates instructions to compute multidimensional offsets for blocks + assigned to a subgroup identified by linearId. The shape parameter + represents the workgroup-level problem size. Each subgroup may access + multiple blocks according to round-robin distribution rules.}], + "FailureOr<SmallVector<SmallVector<Value>>>", + "getOffsets", + (ins "OpBuilder &": $builder, "Location":$loc, "Value":$linearId, "ArrayRef<int64_t>":$shape)> + ]; +} + +def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout", [LayoutTrait]> { let summary = [{ Describes the data distribution to subgroups and work-items for a tensor specified by the tensor descriptor. @@ -330,12 +361,143 @@ def XeGPU_LayoutAttr : XeGPUAttr<"Layout", "layout"> { return LayoutAttr::get(getContext(), getSgLayout(), getSgData(), nullptr, getLaneLayout(), getLaneData(), getOrder()); } + + std::optional<SmallVector<int64_t>> getSgLayoutAsInt() const { + if (DenseI32ArrayAttr layout = getSgLayout()) + return llvm::to_vector_of<int64_t>(layout.asArrayRef()); + return std::nullopt; + } + + std::optional<SmallVector<int64_t>> getSgDataAsInt() const { + if (DenseI32ArrayAttr data = getSgData()) + return llvm::to_vector_of<int64_t>(data.asArrayRef()); + return std::nullopt; + } + + /// Delinearizes a linear subgroup ID into its multidimensional indices + /// based on the effective subgroup layout. + FailureOr<SmallVector<Value>> + delinearizeSubgroupId(OpBuilder &builder, Location loc, Value linearId); + + /// Generates instructions to compute multidimensional offsets for blocks + /// assigned to a subgroup identified by linearId. The shape parameter + /// represents the workgroup-level problem size. Each subgroup may access + /// multiple blocks according to round-robin distribution rules. + FailureOr<SmallVector<SmallVector<Value>>> + getOffsets(OpBuilder &builder, Location loc, Value linearId, ArrayRef<int64_t> shape); + }]; let assemblyFormat = "`<` struct(params) `>`"; let genVerifyDecl = 1; } + +def XeGPU_SliceAttr : XeGPUAttr<"Slice", "slice", [LayoutTrait]> { + let summary = [{Describes the data distribution and sharing among subgroups or work-items.}]; + + let description = [{ + Like LayoutAttr, SliceAttr describes data distribution among subgroups or work-items. + However, whereas LayoutAttr requires the data to have the same rank as the attribute, + SliceAttr permits the data to have a lower rank. In this case, compute units in the + specified dimensions (given by `$dims`) share the data, provided that the remaining + ranks match the data rank. SliceAttr is commonly used by operations such as + vector.multi_reduction and vector.broadcast. + + Example: + ``` + #l = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]> + #r = #xegpu.slice<#l, dim = [0]> + + %exp = math.exp %input {layout_result_0 = #l}: vector<256x128xf32> + %red = vector.multi_reduction<add>, %exp, %acc [0] {layout_result_0 = #r}: vector<256x128xf32> to vector<128xf32> + %bcast = vector.broadcast %red {layout_result_0 = #l} : vector<128xf32> to vector<256x128xf32> + ``` + In this example, %red is conceptually divided into 4 vectors of type vector<32xf32>, each assigned to + a group of subgroups. Each group consists of 8 subgroups from the same column of sg_layout, sharing a + single reduction result of type vector<32xf32>. + + }]; + + let parameters = (ins + "xegpu::LayoutTrait": $parent, + "DenseI64ArrayAttr": $dims + ); + + let extraClassDeclaration = [{ + + int64_t getRank() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + return parent.getRank() - attr.getDims().size(); + } + + DenseI32ArrayAttr getOrder() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + return parent.getOrder(); + } + + bool isWgLayout() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + return parent.isWgLayout(); + } + + bool isSgLayout() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + return parent.isSgLayout(); + } + + /// Returns the SgLayout of the attribute, computed by applying + /// the slice dimensions to the underlying LayoutAttr. + std::optional<SmallVector<int64_t>> getSgLayoutAsInt() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + if (auto layout = parent.getSgLayoutAsInt()) { + ArrayRef<int64_t> dims = attr.getDims().asArrayRef(); + return XeGPUDialect::slice(llvm::ArrayRef<int64_t>(*layout), dims); + } + return std::nullopt; + } + + /// Returns the SgData of the attribute, computed by applying + /// the slice dimensions to the underlying LayoutAttr. + std::optional<SmallVector<int64_t>> getSgDataAsInt() const { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + if (auto data = parent.getSgDataAsInt()) { + ArrayRef<int64_t> dims = attr.getDims().asArrayRef(); + return XeGPUDialect::slice(llvm::ArrayRef<int64_t>(*data), dims); + } + return std::nullopt; + } + + /// flatten a nested SliceAttr, e.g., for 2-level nested SliceAttr + /// #xegpu.slice<#xegpu.slice<#xegpu.layout<sg_layout = [4, 8, 12]>, dims = [0]>, dims = [0]> + /// it will coalese two slice operations and return a simplified SliceAttr + /// #xegpu.slice<#xegpu.layout<sg_layout = [4, 8, 12]>, dims = [0, 1]> + SliceAttr flatten() const; + + /// Delinearizes a linear subgroup ID into its multidimensional indices + /// based on the effective subgroup layout. + FailureOr<SmallVector<Value>> + delinearizeSubgroupId(OpBuilder &builder, Location loc, Value linearId); + + /// Generates instructions to compute multidimensional offsets for blocks + /// assigned to a subgroup identified by linearId. The shape parameter + /// represents the workgroup-level problem size. Each subgroup may access + /// multiple blocks according to round-robin distribution rules. + FailureOr<SmallVector<SmallVector<Value>>> + getOffsets(OpBuilder &builder, Location loc, Value linearId, ArrayRef<int64_t> shape); + + }]; + + let assemblyFormat = "`<` qualified($parent) `,` `dims` `=` $dims `>`"; + let genVerifyDecl = 1; +} + def XeGPU_RangeAttr : XeGPUAttr<"Range", "range"> { let summary = [{Specifies a half-open range}]; let description = [{ diff --git a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td index 549018b..76d58e5 100644 --- a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td +++ b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUDialect.td @@ -41,6 +41,18 @@ def XeGPU_Dialect : Dialect { /// Checks if the given shape can be evenly distributed based on the layout /// and data factors provided by the LayoutAttr. static bool isEvenlyDistributable(llvm::ArrayRef<int64_t> shape, xegpu::LayoutAttr attr); + + /// drops/slices the shape in the specified dims, and return the rest. e.g., + /// for shape = [32, 64, 8], dims = [0, 2], it will return [64] + template<typename T, typename U> + static llvm::SmallVector<T> slice(llvm::ArrayRef<T> shape, llvm::ArrayRef<U> dims) { + llvm::SmallVector<T> result; + for (auto [i, v]: llvm::enumerate(shape)) { + if (!llvm::is_contained(dims, i)) + result.push_back(v); + } + return result; + } }]; } diff --git a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td index 75b16a87..1a6a34c 100644 --- a/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td +++ b/mlir/include/mlir/Dialect/XeGPU/IR/XeGPUOps.td @@ -29,7 +29,7 @@ class XeGPU_Op<string mnemonic, list<Trait> traits = []>: void printProperties(::mlir::MLIRContext *ctx, ::mlir::OpAsmPrinter &p, const Properties &prop, ::mlir::ArrayRef<::llvm::StringRef> elidedProps) { - + DictionaryAttr propAttr = dyn_cast_if_present<mlir::DictionaryAttr>(getPropertiesAsAttr(ctx, prop)); // filter out the elidedProps from propAttr, and get the resultAttr @@ -43,7 +43,7 @@ class XeGPU_Op<string mnemonic, list<Trait> traits = []>: } if (!filteredAttrs.empty()) { - p << "<" << DictionaryAttr::get(ctx, filteredAttrs) << ">"; + p << "<" << DictionaryAttr::get(ctx, filteredAttrs) << ">"; } } @@ -60,8 +60,7 @@ class XeGPU_Op<string mnemonic, list<Trait> traits = []>: } -def XeGPU_CreateNdDescOp: XeGPU_Op<"create_nd_tdesc", [Pure, ViewLikeOpInterface, - AttrSizedOperandSegments, OffsetSizeAndStrideOpInterface]> { +def XeGPU_CreateNdDescOp: XeGPU_Op<"create_nd_tdesc", [Pure, ViewLikeOpInterface, AttrSizedOperandSegments]> { let summary = "Create nd-tensor descriptor operation"; let description = [{ @@ -181,82 +180,38 @@ def XeGPU_CreateNdDescOp: XeGPU_Op<"create_nd_tdesc", [Pure, ViewLikeOpInterface return getType().getShape(); } - /// wrapper for matching with OffsetSizeAndStrideOpInterface - OperandRange getSizes() { - return getShape(); + SmallVector<OpFoldResult> getMixedOffsets() { + auto statics = getConstOffsets().value_or(SmallVector<int64_t>()); + auto dynamics = getOffsets(); + if (statics.size() == 0 && dynamics.size() == 0) + return {}; + return getMixedValues(statics, dynamics, getContext()); } - ArrayRef<int64_t> getStaticOffsets(){ - auto attr = getConstOffsetsAttr(); - - if (attr) - return attr; + SmallVector<OpFoldResult> getMixedSizes() { + SmallVector<int64_t> statics; - int64_t rank = getMixedSizes().size(); - - setConstOffsets(llvm::SmallVector<int64_t, 4>(rank, 0)); + /// Get the static sizes/shape, the value passed to const_shape + /// will overide the value in memref shape. + if (auto memrefTy = llvm::dyn_cast<MemRefType>(getSourceType())) + statics = llvm::to_vector(memrefTy.getShape()); + if (auto attr = getConstShapeAttr()) + statics = llvm::to_vector(attr.asArrayRef()); - attr = getConstOffsetsAttr(); - return attr; + return getMixedValues(statics, getShape(), getContext()); } - /// wrapper for matching with OffsetSizeAndStrideOpInterface - /// If source is IntegerType or `const_shape` is filled, - /// it will return `const_shape`, such that mixes of `shape` - /// and `const_shape` will be used to represent the shape of - /// source operand. They overide static shape from source memref type. - ArrayRef<int64_t> getStaticSizes() { - /// To be compatible with OffsetSizeAndStrideOpInterface, which expects valid return value and perform checks - static llvm::SmallVector<int64_t, 4> emptyShape; - - auto attr = getConstShapeAttr(); - if (attr) - return attr; - - if (llvm::isa<IntegerType>(getSourceType())) - return emptyShape; - - auto memrefType = llvm::dyn_cast<MemRefType>(getSourceType()); - assert(memrefType && "Incorrect use of getStaticSizes"); - return memrefType.getShape(); - } + SmallVector<OpFoldResult> getMixedStrides() { + SmallVector<int64_t> statics; - /// wrapper for matching with OffsetSizeAndStrideOpInterface - /// If source is IntegerType or `const_strides` is filled, it - /// will return `const_strides`, such that mixes of `strides` - /// and `const_strides` will be used to represent the strides of - /// source operand. They overide static strides from source memref type. - ArrayRef<int64_t> getStaticStrides() { - /// To be compatible with OffsetSizeAndStrideOpInterface, which expects valid return value and perform checks - static llvm::SmallVector<int64_t, 4> emptyStrides; - - auto attr = getConstStridesAttr(); - if (attr) - return attr; - - if (llvm::isa<IntegerType>(getSourceType())) - return emptyStrides; - - auto memrefType = llvm::dyn_cast<MemRefType>(getSourceType()); - assert(memrefType && "Incorrect use of getStaticStrides"); - auto [strides, _] = memrefType.getStridesAndOffset(); - // reuse the storage of ConstStridesAttr since strides from - // memref is not persistant - setConstStrides(strides); - attr = getConstStridesAttr(); - return attr; - } + /// Get the static strides, the value passed to const_strides + /// will overide the value in memref. + if (auto memrefTy = llvm::dyn_cast<MemRefType>(getSourceType())) + statics = memrefTy.getStridesAndOffset().first; + if (auto attr = getConstStridesAttr()) + statics = llvm::to_vector(attr.asArrayRef()); - /// Return the expected rank of each of the`static_offsets`, - /// `static_shape` and `static_strides` attributes. - std::array<unsigned, 3> getArrayAttrMaxRanks() { - unsigned rank; - if (auto ty = llvm::dyn_cast<MemRefType>(getSourceType())) { - rank = ty.getRank(); - } else { - rank = (unsigned)getMixedOffsets().size(); - } - return {rank, rank, rank}; + return getMixedValues(statics, getStrides(), getContext()); } /// Return the number of leading operands before the `offsets`, @@ -314,15 +269,15 @@ def XeGPU_PrefetchNdOp : XeGPU_Op<"prefetch_nd", []> { }]; let assemblyFormat = [{ - $TensorDesc `` - custom<OptionalDynamicIndexList>($offsets, $const_offsets) + $TensorDesc `` + custom<OptionalDynamicIndexList>($offsets, $const_offsets) prop-dict attr-dict `:` qualified(type($TensorDesc)) }]; let builders = [ - OpBuilder<(ins "Value": $TensorDesc, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + OpBuilder<(ins "Value": $TensorDesc, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; @@ -370,7 +325,7 @@ def XeGPU_LoadNdOp : XeGPU_Op<"load_nd", [ let arguments = (ins XeGPU_TensorDesc: $TensorDesc, Variadic<Index>: $offsets, - OptionalAttr<DenseI64ArrayAttr>: $const_offsets, + OptionalAttr<DenseI64ArrayAttr>: $const_offsets, OptionalAttr<UnitAttr>: $packed, OptionalAttr<DenseI64ArrayAttr>: $transpose, OptionalAttr<XeGPU_CacheHintAttr>: $l1_hint, @@ -390,16 +345,16 @@ def XeGPU_LoadNdOp : XeGPU_Op<"load_nd", [ }]; let assemblyFormat = [{ - $TensorDesc `` - custom<OptionalDynamicIndexList>($offsets, $const_offsets) + $TensorDesc `` + custom<OptionalDynamicIndexList>($offsets, $const_offsets) prop-dict attr-dict `:` qualified(type($TensorDesc)) `->` type($value) }]; let builders = [ - OpBuilder<(ins "Type": $value, "Value": $TensorDesc, + OpBuilder<(ins "Type": $value, "Value": $TensorDesc, "UnitAttr": $packed, "DenseI64ArrayAttr": $transpose, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; @@ -442,7 +397,7 @@ def XeGPU_StoreNdOp : XeGPU_Op<"store_nd", [ let arguments = (ins XeGPU_ValueType: $value, XeGPU_TensorDesc: $TensorDesc, Variadic<Index>: $offsets, - OptionalAttr<DenseI64ArrayAttr>: $const_offsets, + OptionalAttr<DenseI64ArrayAttr>: $const_offsets, OptionalAttr<XeGPU_CacheHintAttr>: $l1_hint, OptionalAttr<XeGPU_CacheHintAttr>: $l2_hint, OptionalAttr<XeGPU_CacheHintAttr>: $l3_hint); @@ -458,16 +413,16 @@ def XeGPU_StoreNdOp : XeGPU_Op<"store_nd", [ }]; let assemblyFormat = [{ - $value `,` - $TensorDesc `` - custom<OptionalDynamicIndexList>($offsets, $const_offsets) + $value `,` + $TensorDesc `` + custom<OptionalDynamicIndexList>($offsets, $const_offsets) prop-dict attr-dict `:` type($value) `,` qualified(type($TensorDesc)) }]; let builders = [ - OpBuilder<(ins "Value": $value, "Value": $TensorDesc, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + OpBuilder<(ins "Value": $value, "Value": $TensorDesc, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; @@ -635,12 +590,12 @@ def XeGPU_PrefetchOp : XeGPU_Op<"prefetch", []> { l3_hint = #xegpu.cache_hint<cached>} : !xegpu.tensor_desc<16xf16> ``` - + Example 2: A variant accepts memref as base pointer and an offset instead of scattered TensorTdesc. It combines "create scattered TensorTdesc" and "prefetch with scattered TensorTdesc". The source operand could be a raw pointer (uint64_t). - Please refer to create_tdesc for the restriction of memref. + Please refer to create_tdesc for the restriction of memref. ```mlir %a = memref.alloc() : memref<1024xf32> %0 = arith.constant dense<[0, 16, 32, 64]> : vector<4xindex> @@ -676,16 +631,16 @@ def XeGPU_PrefetchOp : XeGPU_Op<"prefetch", []> { }]; let assemblyFormat = [{ - $source + $source (`[` $offsets^ `]`)? prop-dict - attr-dict `:` type(operands) + attr-dict `:` type(operands) }]; - + let builders = [ OpBuilder<(ins "Value": $source, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; @@ -723,7 +678,7 @@ def XeGPU_LoadGatherOp : XeGPU_Op<"load", [MemoryEffects<[MemRead]>]> { : !xegpu.tensor_desc<16x8xf32, #xegpu.scatter_tdesc_attr<memory_space=global, chunk_size=8>>, vector<16xi1> -> vector<16x8xf32> ``` - + Example 3 (SIMT mode): ```mlir %2 = xegpu.load %1, %0 <{l1_hint = #xegpu.cache_hint<cached>, @@ -732,12 +687,12 @@ def XeGPU_LoadGatherOp : XeGPU_Op<"load", [MemoryEffects<[MemRead]>]> { : !xegpu.tensor_desc<16x8xf32, #xegpu.scatter_tdesc_attr<memory_space=global, chunk_size=8>> vector<16xi1> -> vector<8xf32> ``` - + Example 4: A variant accepts memref as base pointer and an offset instead of scattered TensorTdesc. It combines "create scattered TensorTdesc" and "load with scattered TensorTdesc". The source operand could be a raw pointer (uint64_t). Please refer to create_tdesc - for the restriction of memref. + for the restriction of memref. ```mlir %a = memref.alloc() : memref<1024xf32> %offsets = vector.step : vector<16xindex> @@ -794,14 +749,14 @@ def XeGPU_LoadGatherOp : XeGPU_Op<"load", [MemoryEffects<[MemRead]>]> { let assemblyFormat = [{ $source (`[` $offsets^ `]`)? `,` - $mask prop-dict + $mask prop-dict attr-dict `:` type(operands) `->` type($value) }]; let builders = [ OpBuilder<(ins "Type": $value, "Value": $source, "Value": $mask, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; @@ -848,7 +803,7 @@ def XeGPU_StoreScatterOp : XeGPU_Op<"store", [MemoryEffects<[MemWrite]>]> { A variant accepts memref as base pointer and an offset instead of scattered TensorTdesc. It combines "create scattered TensorTdesc" and "store with scattered TensorTdesc". The dest operand could be a raw pointer (uint64_t). - Please refer to create_tdesc for the restriction of memref. + Please refer to create_tdesc for the restriction of memref. ```mlir %a = memref.alloc() : memref<1024xf32> %val = arith.constant dense<0.0> : vector<16xf32> @@ -901,15 +856,15 @@ def XeGPU_StoreScatterOp : XeGPU_Op<"store", [MemoryEffects<[MemWrite]>]> { $value `,` $dest (`[` $offsets^ `]`)? `,` - $mask - prop-dict + $mask + prop-dict attr-dict `:` type(operands) }]; let builders = [ OpBuilder<(ins "Value": $value, "Value": $dest, "Value": $mask, - "xegpu::CachePolicyAttr": $l1_hint, - "xegpu::CachePolicyAttr": $l2_hint, + "xegpu::CachePolicyAttr": $l1_hint, + "xegpu::CachePolicyAttr": $l2_hint, "xegpu::CachePolicyAttr": $l3_hint)> ]; diff --git a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp index e0977f5..7ad429e 100644 --- a/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp +++ b/mlir/lib/Dialect/LLVMIR/IR/NVVMDialect.cpp @@ -189,6 +189,26 @@ LogicalResult BulkStoreOp::verify() { return success(); } +LogicalResult PMEventOp::verify() { + auto eventId = getEventId(); + auto maskedEventId = getMaskedEventId(); + if (!maskedEventId && !eventId) { + return emitOpError() << "either `id` or `mask` must be set"; + } + + if (maskedEventId && eventId) { + return emitOpError() << "`id` and `mask` cannot be set at the same time"; + } + + if (eventId) { + if (eventId < 0 || eventId > 15) { + return emitOpError() << "`id` must be between 0 and 15"; + } + } + + return llvm::success(); +} + // Given the element type of an operand and whether or not it is an accumulator, // this function returns the PTX type (`NVVM::MMATypes`) that corresponds to the // operand's element type. diff --git a/mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp b/mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp index 8754743..639e0fe 100644 --- a/mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp +++ b/mlir/lib/Dialect/Linalg/TransformOps/LinalgTransformOps.cpp @@ -15,6 +15,7 @@ #include "mlir/Dialect/Arith/Utils/Utils.h" #include "mlir/Dialect/Bufferization/IR/Bufferization.h" #include "mlir/Dialect/Bufferization/Transforms/OneShotAnalysis.h" +#include "mlir/Dialect/CommonFolders.h" #include "mlir/Dialect/GPU/IR/GPUDialect.h" #include "mlir/Dialect/Linalg/IR/Linalg.h" #include "mlir/Dialect/Linalg/TransformOps/GPUHeuristics.h" @@ -27,6 +28,7 @@ #include "mlir/Dialect/Transform/IR/TransformTypes.h" #include "mlir/Dialect/Transform/Interfaces/TransformInterfaces.h" #include "mlir/Dialect/Transform/Utils/Utils.h" +#include "mlir/Dialect/UB/IR/UBOps.h" #include "mlir/Dialect/Utils/IndexingUtils.h" #include "mlir/Dialect/Utils/StaticValueUtils.h" #include "mlir/Dialect/Vector/Transforms/LoweringPatterns.h" @@ -1985,14 +1987,19 @@ transform::PadOp::apply(transform::TransformRewriter &rewriter, // Convert the padding values to attributes. SmallVector<Attribute> paddingValues; - for (auto const &it : + for (auto const &[untypedAttr, elementOrTensorType] : llvm::zip(getPaddingValues(), linalgTarget->getOperandTypes())) { - auto attr = dyn_cast<TypedAttr>(std::get<0>(it)); + + if (isa<ub::PoisonAttr>(untypedAttr)) { + paddingValues.push_back(untypedAttr); + continue; + } + auto attr = dyn_cast<TypedAttr>(untypedAttr); if (!attr) { - emitOpError("expects padding values to be typed attributes"); + emitOpError("expects padding values to be typed attributes or poison"); return DiagnosedSilenceableFailure::definiteFailure(); } - Type elementType = getElementTypeOrSelf(std::get<1>(it)); + Type elementType = getElementTypeOrSelf(elementOrTensorType); // Try to parse string attributes to obtain an attribute of element type. if (auto stringAttr = dyn_cast<StringAttr>(attr)) { auto parsedAttr = dyn_cast_if_present<TypedAttr>(parseAttribute( @@ -2000,7 +2007,7 @@ transform::PadOp::apply(transform::TransformRewriter &rewriter, /*numRead=*/nullptr, /*isKnownNullTerminated=*/true)); if (!parsedAttr || parsedAttr.getType() != elementType) { auto diag = this->emitOpError("expects a padding that parses to ") - << elementType << ", got " << std::get<0>(it); + << elementType << ", got " << untypedAttr; diag.attachNote(linalgTarget.getLoc()) << "when applied to this op"; return DiagnosedSilenceableFailure::definiteFailure(); } @@ -2235,8 +2242,13 @@ transform::PadTilingInterfaceOp::apply(transform::TransformRewriter &rewriter, llvm::zip(getPaddingValues(), targetOp->getOperandTypes())) { auto attr = dyn_cast<TypedAttr>(untypedAttr); Type elementType = getElementTypeOrSelf(elementOrTensorType); + + if (isa<ub::PoisonAttr>(untypedAttr)) { + paddingValues.push_back(untypedAttr); + continue; + } if (!attr) { - emitOpError("expects padding values to be typed attributes"); + emitOpError("expects padding values to be typed attributes or poison"); return DiagnosedSilenceableFailure::definiteFailure(); } // Try to parse string attributes to obtain an attribute of element type. diff --git a/mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp b/mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp index 2e62523..3d12bc3 100644 --- a/mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp +++ b/mlir/lib/Dialect/Linalg/Transforms/PadTilingInterface.cpp @@ -11,6 +11,7 @@ #include "mlir/Dialect/Affine/IR/AffineOps.h" #include "mlir/Dialect/Complex/IR/Complex.h" #include "mlir/Dialect/Tensor/IR/Tensor.h" +#include "mlir/Dialect/UB/IR/UBOps.h" #include "mlir/Dialect/Utils/StaticValueUtils.h" #include "mlir/IR/AffineExpr.h" #include "mlir/IR/BuiltinAttributes.h" @@ -230,13 +231,18 @@ static Value padOperand(RewriterBase &rewriter, TilingInterface opToPad, Value paddingValue; if (auto complexTy = dyn_cast<ComplexType>(getElementTypeOrSelf(v.getType()))) { - auto complexAttr = cast<ArrayAttr>(paddingValueAttr); - paddingValue = complex::ConstantOp::create(rewriter, opToPad.getLoc(), - complexTy, complexAttr); - } else { - paddingValue = arith::ConstantOp::create(rewriter, opToPad.getLoc(), - cast<TypedAttr>(paddingValueAttr)); + if (auto complexAttr = dyn_cast<ArrayAttr>(paddingValueAttr)) { + paddingValue = complex::ConstantOp::create(rewriter, opToPad.getLoc(), + complexTy, complexAttr); + } + } else if (isa<ub::PoisonAttr>(paddingValueAttr)) { + paddingValue = ub::PoisonOp::create(rewriter, opToPad.getLoc(), + getElementTypeOrSelf(v.getType())); + } else if (auto typedAttr = dyn_cast<TypedAttr>(paddingValueAttr)) { + paddingValue = + arith::ConstantOp::create(rewriter, opToPad.getLoc(), typedAttr); } + assert(paddingValue && "failed to create value from padding attribute"); // Pad the operand to the bounding box defined by `paddedShape`. SmallVector<int64_t> tensorShape; diff --git a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp index a450056..cb4783d 100644 --- a/mlir/lib/Dialect/Vector/IR/VectorOps.cpp +++ b/mlir/lib/Dialect/Vector/IR/VectorOps.cpp @@ -2841,9 +2841,47 @@ LogicalResult BroadcastOp::verify() { llvm_unreachable("unexpected vector.broadcast op error"); } +// Fold broadcast(shape_cast(x)) into broadcast(x) if x's type is compatible +// with broadcast's result type and shape_cast only adds or removes ones in the +// leading dimensions. +static LogicalResult foldBroadcastOfShapeCast(BroadcastOp broadcastOp) { + auto srcShapeCast = broadcastOp.getSource().getDefiningOp<ShapeCastOp>(); + if (!srcShapeCast) + return failure(); + + VectorType srcType = srcShapeCast.getSourceVectorType(); + VectorType destType = broadcastOp.getResultVectorType(); + // Check type compatibility. + if (vector::isBroadcastableTo(srcType, destType) != + BroadcastableToResult::Success) + return failure(); + + ArrayRef<int64_t> srcShape = srcType.getShape(); + ArrayRef<int64_t> shapecastShape = + srcShapeCast.getResultVectorType().getShape(); + // Trailing dimensions should be the same if shape_cast only alters the + // leading dimensions. + unsigned numTrailingDims = std::min(srcShape.size(), shapecastShape.size()); + if (!llvm::equal(srcShape.take_back(numTrailingDims), + shapecastShape.take_back(numTrailingDims))) + return failure(); + + assert(all_of(srcShape.drop_back(numTrailingDims), + [](int64_t E) { return E == 1; }) && + all_of(shapecastShape.drop_back(numTrailingDims), + [](int64_t E) { return E == 1; }) && + "ill-formed shape_cast"); + + broadcastOp.getSourceMutable().assign(srcShapeCast.getSource()); + return success(); +} + OpFoldResult BroadcastOp::fold(FoldAdaptor adaptor) { if (getSourceType() == getResultVectorType()) return getSource(); + if (succeeded(foldBroadcastOfShapeCast(*this))) + return getResult(); + if (!adaptor.getSource()) return {}; auto vectorType = getResultVectorType(); diff --git a/mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt b/mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt index 242a97c..7c6a4f3 100644 --- a/mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt +++ b/mlir/lib/Dialect/XeGPU/IR/CMakeLists.txt @@ -7,11 +7,14 @@ add_mlir_dialect_library(MLIRXeGPUDialect DEPENDS MLIRXeGPUIncGen + MLIRXeGPUAttrInterfaceIncGen MLIRXeGPUAttrsIncGen MLIRXeGPUEnumsIncGen LINK_LIBS PUBLIC MLIRArithDialect + MLIRIndexDialect + MLIRAffineUtils MLIRArithUtils MLIRDialectUtils MLIRIR diff --git a/mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp b/mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp index 3c0ca114..d997296 100644 --- a/mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp +++ b/mlir/lib/Dialect/XeGPU/IR/XeGPUDialect.cpp @@ -6,12 +6,16 @@ // //===----------------------------------------------------------------------===// +#include "mlir/Dialect/Affine/Utils.h" +#include "mlir/Dialect/Arith/Utils/Utils.h" +#include "mlir/Dialect/Index/IR/IndexOps.h" #include "mlir/Dialect/Utils/IndexingUtils.h" #include "mlir/Dialect/XeGPU/IR/XeGPU.h" #include "mlir/Dialect/XeGPU/IR/XeGPUTargetInfo.h" #include "mlir/IR/Builders.h" #include "mlir/IR/DialectImplementation.h" #include "llvm/ADT/TypeSwitch.h" +#include "llvm/Support/Debug.h" using std::optional; @@ -33,6 +37,57 @@ void XeGPUDialect::initialize() { >(); } +/// Generates instructions to compute offsets for a subgroup identified by +/// its multidimensional indices (sgId), using the specified subgroup layout +/// (sgLayout), subgroup data dimensions (sizePerSg), and the overall data +/// dimensions (sizePerWg). +static SmallVector<SmallVector<Value>> +genOffsetsComputingInsts(OpBuilder &builder, Location loc, + SmallVector<Value> sgId, ArrayRef<int64_t> sgLayout, + ArrayRef<int64_t> sizePerSg, + ArrayRef<int64_t> sizePerWg) { + + SmallVector<SmallVector<Value>> offsets; + + // nd local offset, localOffset[i] = sgId[i] * sizePerSg[i] + SmallVector<Value> localOffsets = llvm::map_to_vector( + llvm::zip(sgId, sizePerSg), [&](const auto &t) -> Value { + return builder.createOrFold<index::MulOp>( + loc, std::get<0>(t), + builder.createOrFold<arith::ConstantIndexOp>(loc, std::get<1>(t))); + }); + + // distUnit[i] is the minimum value between sizePerWg[i] and + // sgLayout[i] * sizePerSg[i] + SmallVector<int64_t> distUnit = llvm::map_to_vector( + llvm::zip_equal(sizePerWg, computeElementwiseMul(sgLayout, sizePerSg)), + [](const auto &t) { return std::min(std::get<0>(t), std::get<1>(t)); }); + + for (SmallVector<int64_t> unitOffs : + StaticTileOffsetRange(sizePerWg, distUnit)) { + SmallVector<Value> base = + llvm::map_to_vector(unitOffs, [&](int64_t d) -> Value { + return builder.create<arith::ConstantIndexOp>(loc, d); + }); + + SmallVector<Value> adds = llvm::map_to_vector( + llvm::zip_equal(base, localOffsets), [&](const auto &t) -> Value { + return builder.createOrFold<arith::AddIOp>(loc, std::get<0>(t), + std::get<1>(t)); + }); + + SmallVector<Value> mods = llvm::map_to_vector( + llvm::zip_equal(adds, sizePerWg), [&](const auto &t) -> Value { + return builder.createOrFold<index::RemUOp>( + loc, std::get<0>(t), + builder.create<arith::ConstantIndexOp>(loc, std::get<1>(t))); + }); + + offsets.push_back(mods); + } + return offsets; +} + // Checks if the given shape can be evenly distributed based on the layout // and data factors provided by the LayoutAttr. bool XeGPUDialect::isEvenlyDistributable(llvm::ArrayRef<int64_t> shape, @@ -211,6 +266,148 @@ LayoutAttr::verify(llvm::function_ref<mlir::InFlightDiagnostic()> emitError, return success(); } +FailureOr<SmallVector<Value>> +LayoutAttr::delinearizeSubgroupId(OpBuilder &builder, Location loc, + Value linearId) { + // delinearizeSubgroupId is only available for + // workgroup-level layout attribute + if (!isWgLayout()) + return failure(); + + // TODO: handle order attribute + auto hasDefaultOrder = [&]() { + DenseI32ArrayAttr order = getOrder(); + return !order || isIdentityPermutation(llvm::to_vector_of<int64_t>( + llvm::reverse(order.asArrayRef()))); + }; + if (!hasDefaultOrder()) + return mlir::emitError(loc, "order attribute is currently not supported."); + + auto dims = llvm::map_to_vector(*getSgLayoutAsInt(), [&](int64_t d) -> Value { + return builder.createOrFold<arith::ConstantIndexOp>(loc, d); + }); + + return affine::delinearizeIndex(builder, loc, linearId, dims); +} + +/// Implements LayoutTrait::getOffsets to generate instructions for +/// computing multi-dimensional offsets when distributed by LayoutAttr. +FailureOr<SmallVector<SmallVector<Value>>> +LayoutAttr::getOffsets(OpBuilder &builder, Location loc, Value linearId, + ArrayRef<int64_t> shape) { + if (!isWgLayout()) + return failure(); + + SmallVector<int64_t> sgLayout = getSgLayoutAsInt().value(); + SmallVector<int64_t> sgShape; + if (auto maybeSgShape = getSgDataAsInt()) + sgShape = maybeSgShape.value(); + else if (auto derivedShape = computeShapeRatio(shape, sgLayout)) + sgShape = derivedShape.value(); + else + return failure(); + + // delinearize Ids + auto maybeIds = delinearizeSubgroupId(builder, loc, linearId); + if (failed(maybeIds)) + return failure(); + SmallVector<Value> sgIds = *maybeIds; + + return genOffsetsComputingInsts(builder, loc, sgIds, sgLayout, sgShape, + shape); +} + +//===----------------------------------------------------------------------===// +// XeGPU_SliceAttr +//===----------------------------------------------------------------------===// +LogicalResult +SliceAttr::verify(llvm::function_ref<InFlightDiagnostic()> emitError, + xegpu::LayoutTrait parent, DenseI64ArrayAttr dims) { + if (!parent || !dims) + return emitError() << "expected parent layout and dims attribute"; + + int64_t rank = parent.getRank(); + + // check every element in dims is unique and smaller than rank + llvm::SmallDenseSet<int64_t> seen; + for (int64_t dim : dims.asArrayRef()) { + if (dim < 0 || dim >= rank) + return emitError() << "invalid dim (" << dim << ") in slice attribute."; + if (!seen.insert(dim).second) + return emitError() << "repeated dim (" << dim << ") in slice attribute."; + } + return success(); +} + +SliceAttr SliceAttr::flatten() const { + xegpu::LayoutTrait parent = getParent(); + SmallVector<DenseI64ArrayAttr> slicedDims({getDims()}); + + while (auto sliceAttr = dyn_cast<xegpu::SliceAttr>(parent)) { + parent = sliceAttr.getParent(); + slicedDims.push_back(sliceAttr.getDims()); + } + + auto layoutAttr = dyn_cast<xegpu::LayoutAttr>(parent); + SmallVector<int64_t> indices = + llvm::to_vector(llvm::seq<int64_t>(0, layoutAttr.getRank())); + + // get remaining dims (flattend) by applying slice ops with all slicedDims + SmallVector<int64_t> remainingDims(indices); + for (auto dim : llvm::reverse(slicedDims)) + remainingDims = XeGPUDialect::slice(llvm::ArrayRef<int64_t>(remainingDims), + dim.asArrayRef()); + + // get flattend sliced dims by applying slice ops with the remaining dims + SmallVector<int64_t> flattendDims = XeGPUDialect::slice( + llvm::ArrayRef<int64_t>(indices), llvm::ArrayRef<int64_t>(remainingDims)); + + return xegpu::SliceAttr::get( + getContext(), layoutAttr, + DenseI64ArrayAttr::get(getContext(), flattendDims)); +} + +FailureOr<SmallVector<Value>> +SliceAttr::delinearizeSubgroupId(OpBuilder &builder, Location loc, + Value linearId) { + SliceAttr attr = flatten(); + auto parent = dyn_cast<LayoutAttr>(attr.getParent()); + return parent.delinearizeSubgroupId(builder, loc, linearId); +} + +/// Implements LayoutTrait::getOffsets to generate instructions for +/// computing multi-dimensional offsets when distributed by SliceAttr. +FailureOr<SmallVector<SmallVector<Value>>> +SliceAttr::getOffsets(OpBuilder &builder, Location loc, Value linearId, + ArrayRef<int64_t> shape) { + assert(getRank() == static_cast<int64_t>(shape.size()) && "invalid shape."); + if (!isWgLayout()) + return failure(); + + SmallVector<int64_t> sgLayout = getSgLayoutAsInt().value(); + SmallVector<int64_t> sgShape; + if (auto maybeSgShape = getSgDataAsInt()) + sgShape = maybeSgShape.value(); + else if (auto derivedShape = computeShapeRatio(shape, sgLayout)) + sgShape = derivedShape.value(); + else + return failure(); + + // delinearize Ids + auto maybeIds = delinearizeSubgroupId(builder, loc, linearId); + if (failed(maybeIds)) + return failure(); + + // The effective sgIds for offsets computing correspond + // to the dims that are not sliced. + ArrayRef<int64_t> dims = flatten().getDims().asArrayRef(); + SmallVector<Value> sgIds = + XeGPUDialect::slice(ArrayRef<Value>(*maybeIds), dims); + + return genOffsetsComputingInsts(builder, loc, sgIds, sgLayout, sgShape, + shape); +} + //===----------------------------------------------------------------------===// // XeGPU_RangeAttr //===----------------------------------------------------------------------===// diff --git a/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp b/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp index 33450f3..2cd086f 100644 --- a/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp +++ b/mlir/lib/Dialect/XeGPU/IR/XeGPUOps.cpp @@ -265,8 +265,8 @@ void CreateNdDescOp::build(OpBuilder &builder, OperationState &state, } LogicalResult CreateNdDescOp::verify() { - auto rank = (int64_t)getMixedOffsets().size(); - bool invalidRank = false; + size_t rank = getMixedSizes().size(); + bool invalidRank = rank != getMixedStrides().size(); bool invalidElemTy = false; // Memory space of created TensorDesc should match with the source. @@ -280,31 +280,28 @@ LogicalResult CreateNdDescOp::verify() { << " Source: " << srcMemorySpace << ", TensorDesc: " << tdescMemorySpace; + if (size_t offsetRank = getMixedOffsets().size()) + invalidRank |= (offsetRank != rank); + // check source type matches the rank if it is a memref. // It also should have the same ElementType as TensorDesc. - auto memrefTy = dyn_cast<MemRefType>(getSourceType()); - if (memrefTy) { - invalidRank |= (memrefTy.getRank() != rank); + if (auto memrefTy = dyn_cast<MemRefType>(getSourceType())) invalidElemTy |= memrefTy.getElementType() != getElementType(); - } if (llvm::isa<IntegerType>(getSourceType())) { // strides and shape must present for integer source. if (getMixedStrides().empty() || getMixedSizes().empty()) - return emitOpError("Expecting strides and shape to be present for " + return emitOpError("expecting strides and shape to be present for " "integer source."); } - // mismatches among shape, strides, and offsets are - // already handeled by OffsetSizeAndStrideOpInterface. - // So they are not check here. if (invalidRank) return emitOpError( "Expecting the rank of shape, strides, offsets, and source (if source " "is a memref) should match with each other."); // check result TensorDesc rank - if (getType().getRank() > rank) + if (getType().getRank() > (int64_t)rank) return emitOpError( "Expecting the TensorDesc rank is not greater than the " "ranks of shape, strides, offsets or the memref source."); @@ -931,6 +928,9 @@ void ConvertLayoutOp::getCanonicalizationPatterns(RewritePatternSet &patterns, } // namespace xegpu } // namespace mlir +namespace mlir { +#include <mlir/Dialect/XeGPU/IR/XeGPUAttrInterface.cpp.inc> +} // namespace mlir #include <mlir/Dialect/XeGPU/IR/XeGPUEnums.cpp.inc> #define GET_OP_CLASSES #include <mlir/Dialect/XeGPU/IR/XeGPU.cpp.inc> diff --git a/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp b/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp index 850f70c..4a5525c 100644 --- a/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp +++ b/mlir/lib/Dialect/XeGPU/Transforms/XeGPUWgToSgDistribute.cpp @@ -125,39 +125,6 @@ getSgShapeAndCount(ArrayRef<int64_t> shape, xegpu::LayoutAttr layout) { struct WgToSgCreateNdOp : public OpConversionPattern<xegpu::CreateNdDescOp> { using OpConversionPattern<xegpu::CreateNdDescOp>::OpConversionPattern; - // Calculate offset for each subgroup - static SmallVector<OpFoldResult> - calculateGlobalOffsets(ConversionPatternRewriter &rewriter, Location loc, - const SmallVector<OpFoldResult> &originalOffsets, - const SmallVector<Value> &localOffset, - const SmallVector<int64_t> &distUnitBaseAddr, - const SmallVector<int64_t> &distUnitShape) { - assert(localOffset.size() == distUnitBaseAddr.size() && - "localOffset and distUnitBaseAddr must have the same rank"); - - SmallVector<OpFoldResult> globalOffsets(originalOffsets.begin(), - originalOffsets.end()); - size_t rank = localOffset.size(); - for (size_t i = 0; i < rank; ++i) { - size_t dimIdx = originalOffsets.size() - rank + i; - Value constOffset = - arith::ConstantIndexOp::create(rewriter, loc, distUnitBaseAddr[i]); - Value offset = - rewriter.createOrFold<index::AddOp>(loc, localOffset[i], constOffset); - Value modValue = - arith::ConstantIndexOp::create(rewriter, loc, distUnitShape[i]); - Value offsetMod = - rewriter.createOrFold<index::RemUOp>(loc, offset, modValue); - Value origOffset = getValueOrCreateConstantIndexOp( - rewriter, loc, originalOffsets[dimIdx]); - Value globalOffset = - rewriter.createOrFold<index::AddOp>(loc, origOffset, offsetMod); - globalOffsets[dimIdx] = globalOffset; - } - - return globalOffsets; - } - LogicalResult matchAndRewrite(xegpu::CreateNdDescOp op, OneToNOpAdaptor adaptor, ConversionPatternRewriter &rewriter) const override { @@ -177,74 +144,56 @@ struct WgToSgCreateNdOp : public OpConversionPattern<xegpu::CreateNdDescOp> { return rewriter.notifyMatchFailure( op, "sgLayout attribute is required in layout"); - SmallVector<int64_t> sgShape = getSgShapeAndCount(wgShape, layout).first; - - // TODO : Handle order attribute // Get the subgroup ID - auto linearSgId = + Value linearSgId = gpu::SubgroupIdOp::create(rewriter, loc, /*upper_bound=*/nullptr); - // Create constants for layout dimensions - SmallVector<Value> sgLayoutDim(sgLayout.size()); - SmallVector<Value> sgDataDim(sgShape.size()); - - for (size_t i = 0; i < sgLayout.size(); i++) { - sgLayoutDim[i] = - arith::ConstantIndexOp::create(rewriter, loc, sgLayout[i]); - sgDataDim[i] = arith::ConstantIndexOp::create(rewriter, loc, sgShape[i]); - } - int64_t startOfRange = -1, endOfRange = -1; bool sgIdRangeSpecified = isSgIdRangeSpecified(op, startOfRange, endOfRange); - Value adjustedSgId = linearSgId; if (sgIdRangeSpecified) { int64_t sgCount = endOfRange - startOfRange; if (computeProduct(sgLayout) != sgCount) return rewriter.notifyMatchFailure( op, "sg_layout size must match the sg_id_range"); - // Subtract startOfRange from the original subgroup id to get the adjusted - // sg id + // Subtract startOfRange from the original subgroup id to get + // the adjusted sg id Value startOfRangeVal = - arith::ConstantIndexOp::create(rewriter, loc, startOfRange); - adjustedSgId = + rewriter.create<arith::ConstantIndexOp>(loc, startOfRange); + linearSgId = rewriter.createOrFold<index::SubOp>(loc, linearSgId, startOfRangeVal); } - auto deLinearizeSgId = - affine::delinearizeIndex(rewriter, loc, adjustedSgId, sgLayoutDim); - if (failed(deLinearizeSgId)) + auto maybeTdescOffsets = + layout.getOffsets(rewriter, loc, linearSgId, wgShape); + if (failed(maybeTdescOffsets)) return failure(); - SmallVector<Value> sgIds = *deLinearizeSgId; - - // Calculate distribution unit shape and local offsets for subgroup - SmallVector<int64_t> distUnitShape(sgLayout.size()); - SmallVector<Value> localOffset(sgLayout.size()); - for (size_t i = 0; i < sgLayout.size(); i++) { - distUnitShape[i] = std::min(sgLayout[i] * sgShape[i], wgShape[i]); - localOffset[i] = - rewriter.createOrFold<index::MulOp>(loc, sgIds[i], sgDataDim[i]); - } - - SmallVector<OpFoldResult> originalOffsets = op.getMixedOffsets(); + SmallVector<int64_t> sgShape = getSgShapeAndCount(wgShape, layout).first; xegpu::TensorDescType newTdescTy = xegpu::TensorDescType::get(ctx, sgShape, elemTy, tdescTy.getEncoding(), layout.dropSgLayoutAndData()); + SmallVector<Value> newCreateNdOps; - for (SmallVector<int64_t> distUnitBaseAddr : - StaticTileOffsetRange(wgShape, distUnitShape)) { - SmallVector<OpFoldResult> globalOffsets = - calculateGlobalOffsets(rewriter, loc, originalOffsets, localOffset, - distUnitBaseAddr, distUnitShape); - - auto newCreateNdOp = xegpu::CreateNdDescOp::create( - rewriter, loc, newTdescTy, op.getSource(), globalOffsets, + SmallVector<OpFoldResult> wgOffsets = op.getMixedOffsets(); + + for (auto tdescOffsets : *maybeTdescOffsets) { + SmallVector<OpFoldResult> sgOffsets; + size_t rank = tdescOffsets.size(); + for (size_t i = 0; i < rank; i++) { + size_t idx = wgOffsets.size() - rank + i; + Value add = rewriter.createOrFold<index::AddOp>( + loc, tdescOffsets[i], + getValueOrCreateConstantIndexOp(rewriter, loc, wgOffsets[idx])); + sgOffsets.push_back(add); + } + + auto newOp = xegpu::CreateNdDescOp::create( + rewriter, loc, newTdescTy, op.getSource(), sgOffsets, op.getMixedSizes(), op.getMixedStrides()); - newCreateNdOps.push_back(newCreateNdOp); + newCreateNdOps.push_back(newOp); } - rewriter.replaceOpWithMultiple(op, {newCreateNdOps}); return success(); } diff --git a/mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp b/mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp index c967e86..d8c54ec 100644 --- a/mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp +++ b/mlir/lib/Target/SPIRV/Deserialization/Deserializer.cpp @@ -1560,7 +1560,19 @@ spirv::Deserializer::processConstantComposite(ArrayRef<uint32_t> operands) { } auto resultID = operands[1]; - if (auto shapedType = dyn_cast<ShapedType>(resultType)) { + if (auto tensorType = dyn_cast<TensorArmType>(resultType)) { + SmallVector<Attribute> flattenedElems; + for (Attribute element : elements) { + if (auto denseElemAttr = dyn_cast<DenseElementsAttr>(element)) { + for (auto value : denseElemAttr.getValues<Attribute>()) + flattenedElems.push_back(value); + } else { + flattenedElems.push_back(element); + } + } + auto attr = DenseElementsAttr::get(tensorType, flattenedElems); + constantMap.try_emplace(resultID, attr, tensorType); + } else if (auto shapedType = dyn_cast<ShapedType>(resultType)) { auto attr = DenseElementsAttr::get(shapedType, elements); // For normal constants, we just record the attribute (and its type) for // later materialization at use sites. diff --git a/mlir/lib/Target/SPIRV/Serialization/Serializer.cpp b/mlir/lib/Target/SPIRV/Serialization/Serializer.cpp index c049574..7c007de 100644 --- a/mlir/lib/Target/SPIRV/Serialization/Serializer.cpp +++ b/mlir/lib/Target/SPIRV/Serialization/Serializer.cpp @@ -956,6 +956,11 @@ Serializer::prepareDenseElementsConstant(Location loc, Type constType, uint32_t resultID = getNextID(); SmallVector<uint32_t, 4> operands = {typeID, resultID}; auto elementType = cast<spirv::CompositeType>(constType).getElementType(0); + if (auto tensorArmType = dyn_cast<spirv::TensorArmType>(constType)) { + ArrayRef<int64_t> innerShape = tensorArmType.getShape().drop_front(); + if (!innerShape.empty()) + elementType = spirv::TensorArmType::get(innerShape, elementType); + } // "If the Result Type is a cooperative matrix type, then there must be only // one Constituent, with scalar type matching the cooperative matrix Component @@ -979,30 +984,10 @@ Serializer::prepareDenseElementsConstant(Location loc, Type constType, } else { return 0; } - } else if (isa<spirv::TensorArmType>(constType)) { - if (isZeroValue(valueAttr)) { - encodeInstructionInto(typesGlobalValues, spirv::Opcode::OpConstantNull, - {typeID, resultID}); - return resultID; - } - numberOfConstituents = shapedType.getNumElements(); - operands.reserve(numberOfConstituents + 2); - for (int i = 0; i < numberOfConstituents; ++i) { - uint32_t elementID = 0; - if (auto attr = dyn_cast<DenseIntElementsAttr>(valueAttr)) { - elementID = - elementType.isInteger(1) - ? prepareConstantBool(loc, attr.getValues<BoolAttr>()[i]) - : prepareConstantInt(loc, attr.getValues<IntegerAttr>()[i]); - } - if (auto attr = dyn_cast<DenseFPElementsAttr>(valueAttr)) { - elementID = prepareConstantFp(loc, attr.getValues<FloatAttr>()[i]); - } - if (!elementID) { - return 0; - } - operands.push_back(elementID); - } + } else if (isa<spirv::TensorArmType>(constType) && isZeroValue(valueAttr)) { + encodeInstructionInto(typesGlobalValues, spirv::Opcode::OpConstantNull, + {typeID, resultID}); + return resultID; } else { operands.reserve(numberOfConstituents + 2); for (int i = 0; i < numberOfConstituents; ++i) { diff --git a/mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir b/mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir index 580b09d..e505767 100644 --- a/mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir +++ b/mlir/test/Conversion/NVVMToLLVM/nvvm-to-llvm.mlir @@ -681,3 +681,17 @@ llvm.func @ex2(%input : f32, %pred : i1) { %1 = nvvm.inline_ptx "ex2.approx.ftz.f32 $0, $1;" (%input), predicate = %pred : f32, i1 -> f32 llvm.return } + +// ----- + +// CHECK-LABEL: @nvvm_pmevent +llvm.func @nvvm_pmevent() { + // CHECK: %[[S0:.+]] = llvm.mlir.constant(10 : i32) : i32 + // CHECK: llvm.inline_asm has_side_effects asm_dialect = att "pmevent $0;", "n" %[[S0]] : (i32) -> () + + nvvm.pmevent id = 10 + // CHECK: %[[S1:.+]] = llvm.mlir.constant(4 : i32) : i32 + // CHECK: llvm.inline_asm has_side_effects asm_dialect = att "pmevent $0;", "n" %[[S1]] : (i32) -> () + nvvm.pmevent id = 4 + llvm.return +} diff --git a/mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir b/mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir index f741876..9a3dcf0 100644 --- a/mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir +++ b/mlir/test/Dialect/Linalg/transform-op-pad-tiling-interface.mlir @@ -14,11 +14,11 @@ module attributes {transform.with_named_sequence} { : (!transform.any_op) -> !transform.any_op // Tile to 5 then pad to 8 - %fill_l1, %loops_l1 = transform.structured.tile_using_for %fill tile_sizes [5] + %fill_l1, %loops_l1 = transform.structured.tile_using_for %fill tile_sizes [5] : (!transform.any_op) -> (!transform.any_op, !transform.any_op) %fill_padded, %_ = transform.structured.pad_tiling_interface %fill_l1 to padding_sizes [8] { - padding_values=[0.0 : f32, 0.0 : f32] + padding_values= [#ub.poison, 0.0 : f32] } : (!transform.any_op) -> (!transform.any_op, !transform.any_op) transform.yield @@ -33,9 +33,9 @@ func.func @pad_lhs( -> tensor<24x25xf32> { // CHECK: scf.for %{{.*}} -> (tensor<24x25xf32>) - // CHECK: tensor.pad %{{.*}} + // CHECK: tensor.pad %{{.*}} // CHECK: : tensor<?x12xf32> to tensor<8x12xf32> - // CHECK: tensor.pad %{{.*}} + // CHECK: tensor.pad %{{.*}} // CHECK: : tensor<?x25xf32> to tensor<8x25xf32> // CHECK: linalg.matmul ins(%{{.*}}, %{{.*}} : tensor<8x12xf32>, tensor<12x25xf32>) outs(%{{.*}} : tensor<8x25xf32>) -> tensor<8x25xf32> // CHECK: tensor.extract_slice %{{.*}}[0, 0] [%{{.*}}, 25] [1, 1] @@ -92,7 +92,7 @@ module { %padded, %pad = transform.structured.pad_tiling_interface %0 to padding_sizes [8, 0, 14] { padding_values = [0.000000e+00 : f32, 0.000000e+00 : f32, 0.000000e+00 : f32] } : (!transform.any_op) -> (!transform.any_op, !transform.any_op) - transform.yield + transform.yield } } } @@ -147,7 +147,7 @@ module { %padded, %pad = transform.structured.pad_tiling_interface %0 to padding_sizes [8, 0, 14] { padding_values = [0.000000e+00 : f32, 0.000000e+00 : f32, 0.000000e+00 : f32] } : (!transform.any_op) -> (!transform.any_op, !transform.any_op) - transform.yield + transform.yield } } } diff --git a/mlir/test/Dialect/Vector/canonicalize.mlir b/mlir/test/Dialect/Vector/canonicalize.mlir index f86fb38..4a7176e 100644 --- a/mlir/test/Dialect/Vector/canonicalize.mlir +++ b/mlir/test/Dialect/Vector/canonicalize.mlir @@ -1168,6 +1168,106 @@ func.func @canonicalize_broadcast_shapecast_both_possible(%arg0: vector<1xf32>) // ----- +// CHECK-LABEL: func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim +// CHECK-NOT: vector.shape_cast +// CHECK: vector.broadcast {{.+}} : vector<2xf32> to vector<32x2xf32> +func.func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim(%arg0 : vector<2xf32>) -> vector<32x2xf32> { + %0 = vector.shape_cast %arg0 : vector<2xf32> to vector<1x2xf32> + %1 = vector.broadcast %0 : vector<1x2xf32> to vector<32x2xf32> + return %1 : vector<32x2xf32> +} + +// ----- + +// CHECK-LABEL: func.func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim2( +// CHECK-SAME: %[[ARG0:.*]]: vector<2x1xf32>) -> vector<32x2x1xf32> { +// CHECK: %[[VAL_0:.*]] = vector.broadcast %[[ARG0]] : vector<2x1xf32> to vector<32x2x1xf32> +// CHECK: return %[[VAL_0]] : vector<32x2x1xf32> +// CHECK: } +func.func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim2(%arg0 : vector<2x1xf32>) -> vector<32x2x1xf32> { + %0 = vector.shape_cast %arg0 : vector<2x1xf32> to vector<1x2x1xf32> + %1 = vector.broadcast %0 : vector<1x2x1xf32> to vector<32x2x1xf32> + return %1 : vector<32x2x1xf32> +} + +// ----- + +// CHECK-LABEL: func.func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim3( +// CHECK-SAME: %[[ARG0:.*]]: vector<2x1xf32>) -> vector<32x2x4xf32> { +// CHECK: %[[VAL_0:.*]] = vector.broadcast %[[ARG0]] : vector<2x1xf32> to vector<32x2x4xf32> +// CHECK: return %[[VAL_0]] : vector<32x2x4xf32> +// CHECK: } +func.func @canonicalize_shapecast_broadcast_to_broadcast_prepend_dim3(%arg0 : vector<2x1xf32>) -> vector<32x2x4xf32> { + %0 = vector.shape_cast %arg0 : vector<2x1xf32> to vector<1x2x1xf32> + %1 = vector.broadcast %0 : vector<1x2x1xf32> to vector<32x2x4xf32> + return %1 : vector<32x2x4xf32> +} + +// ----- + +// CHECK-LABEL: func.func @canonicalize_shapecast_broadcast_to_broadcast_remove_leading_dim( +// CHECK-SAME: %[[ARG0:.*]]: vector<1x2xf32>) -> vector<32x2xf32> { +// CHECK: %[[VAL_0:.*]] = vector.broadcast %[[ARG0]] : vector<1x2xf32> to vector<32x2xf32> +// CHECK: return %[[VAL_0]] : vector<32x2xf32> +// CHECK: } +func.func @canonicalize_shapecast_broadcast_to_broadcast_remove_leading_dim(%arg0 : vector<1x2xf32>) -> vector<32x2xf32> { + %0 = vector.shape_cast %arg0 : vector<1x2xf32> to vector<2xf32> + %1 = vector.broadcast %0 : vector<2xf32> to vector<32x2xf32> + return %1 : vector<32x2xf32> +} + +// ----- + +// CHECK-LABEL: func @negative_canonicalize_shapecast_broadcast_invalid_shape +// CHECK: vector.shape_cast {{.+}} : vector<64xf32> to vector<4x16xf32> +// CHECK: vector.broadcast {{.+}} : vector<4x16xf32> to vector<2x4x16xf32> +func.func @negative_canonicalize_shapecast_broadcast_invalid_shape(%arg0 : vector<64xf32>) -> vector<2x4x16xf32> { + %0 = vector.shape_cast %arg0 : vector<64xf32> to vector<4x16xf32> + %1 = vector.broadcast %0 : vector<4x16xf32> to vector<2x4x16xf32> + return %1 : vector<2x4x16xf32> +} + +// ----- + +// CHECK-LABEL: func @negative_canonicalize_shapecast_broadcast_invalid_broadcasted_dims +// CHECK: vector.shape_cast {{.+}} : vector<2x1xf32> to vector<1x2xf32> +// CHECK: vector.broadcast {{.+}} : vector<1x2xf32> to vector<2x2xf32> +func.func @negative_canonicalize_shapecast_broadcast_invalid_broadcasted_dims(%arg0 : vector<2x1xf32>) -> vector<2x2xf32> { + %0 = vector.shape_cast %arg0 : vector<2x1xf32> to vector<1x2xf32> + %1 = vector.broadcast %0 : vector<1x2xf32> to vector<2x2xf32> + return %1 : vector<2x2xf32> +} + +// ----- + +// CHECK-LABEL: func.func @negative_canonicalize_shapecast_broadcast_to_broadcast_append_dim( +// CHECK-SAME: %[[ARG0:.*]]: vector<2xf32>) -> vector<2x4xf32> { +// CHECK: %[[VAL_0:.*]] = vector.shape_cast %[[ARG0]] : vector<2xf32> to vector<2x1xf32> +// CHECK: %[[VAL_1:.*]] = vector.broadcast %[[VAL_0]] : vector<2x1xf32> to vector<2x4xf32> +// CHECK: return %[[VAL_1]] : vector<2x4xf32> +// CHECK: } +func.func @negative_canonicalize_shapecast_broadcast_to_broadcast_append_dim(%arg0 : vector<2xf32>) -> vector<2x4xf32> { + %0 = vector.shape_cast %arg0 : vector<2xf32> to vector<2x1xf32> + %1 = vector.broadcast %0 : vector<2x1xf32> to vector<2x4xf32> + return %1 : vector<2x4xf32> +} + +// ----- + +// CHECK-LABEL: func.func @negative_canonicalize_shapecast_broadcast_to_broadcast_remove_trailing_dim( +// CHECK-SAME: %[[ARG0:.*]]: vector<2x1xf32>) -> vector<32x2xf32> { +// CHECK: %[[VAL_0:.*]] = vector.shape_cast %[[ARG0]] : vector<2x1xf32> to vector<2xf32> +// CHECK: %[[VAL_1:.*]] = vector.broadcast %[[VAL_0]] : vector<2xf32> to vector<32x2xf32> +// CHECK: return %[[VAL_1]] : vector<32x2xf32> +// CHECK: } +func.func @negative_canonicalize_shapecast_broadcast_to_broadcast_remove_trailing_dim(%arg0 : vector<2x1xf32>) -> vector<32x2xf32> { + %0 = vector.shape_cast %arg0 : vector<2x1xf32> to vector<2xf32> + %1 = vector.broadcast %0 : vector<2xf32> to vector<32x2xf32> + return %1 : vector<32x2xf32> +} + +// ----- + // CHECK-LABEL: fold_vector_transfer_masks func.func @fold_vector_transfer_masks(%A: memref<?x?xf32>) -> (vector<4x8xf32>, vector<4x[4]xf32>) { // CHECK: %[[C0:.+]] = arith.constant 0 : index diff --git a/mlir/test/Dialect/XeGPU/invalid.mlir b/mlir/test/Dialect/XeGPU/invalid.mlir index dff3ffa..44e15dd 100644 --- a/mlir/test/Dialect/XeGPU/invalid.mlir +++ b/mlir/test/Dialect/XeGPU/invalid.mlir @@ -52,14 +52,14 @@ func.func @create_nd_tdesc_7(%src: memref<128x128xf32>) { // ----- func.func @create_nd_tdesc_8(%src: ui64) { - // expected-error@+1 {{'xegpu.create_nd_tdesc' op Expecting strides and shape to be present for integer source}} + // expected-error@+1 {{'xegpu.create_nd_tdesc' op expecting strides and shape to be present for integer source}} %1 = xegpu.create_nd_tdesc %src : ui64-> !xegpu.tensor_desc<128x128xf32> return } // ----- func.func @create_nd_tdesc_9(%src: ui64) { - // expected-error@+1 {{expected mixed offsets rank to match mixed sizes rank}} + // expected-error@+1 {{expecting strides and shape to be present for integer source}} %1 = xegpu.create_nd_tdesc %src[0, 0] : ui64-> !xegpu.tensor_desc<128x128xf32> return } @@ -149,7 +149,7 @@ func.func @subgroup_load_nd_offset_2(%src: memref<4x8x16xf16>, %x : index) { } // ----- -func.func @subgroup_load_nd_offset_3(%src: memref<4x8x16xf16>, %x : index) { +func.func @subgroup_load_nd_offset_3(%src: memref<4x8x16xf16>, %x : index) { %3 = xegpu.create_nd_tdesc %src: memref<4x8x16xf16> -> !xegpu.tensor_desc<8x16xf16> %5 = xegpu.load_nd %3[0, 0] : !xegpu.tensor_desc<8x16xf16> -> vector<8x16xf16> // expected-error@+1 {{Mismatched ranks between offsets and tensor descriptor}} @@ -418,7 +418,7 @@ func.func @store_scatter_offset_wi_1(%src: memref<?xf16>) { %offsets = arith.constant dense<[0]> : vector<1xindex> %mask = arith.constant dense<1>: vector<1xi1> // expected-error@+1 {{value elements must match chunk size}} - xegpu.store %val, %src[%offsets], %mask + xegpu.store %val, %src[%offsets], %mask : vector<4xf16>, memref<?xf16>, vector<1xindex>, vector<1xi1> return } @@ -429,7 +429,7 @@ func.func @store_scatter_offset_wi_2(%src: memref<4x4xf16>) { %offsets = arith.constant dense<[0]> : vector<1xindex> %mask = arith.constant dense<1>: vector<1xi1> // expected-error@+1 {{Expecting the dest is a 1D memref or pointer}} - xegpu.store %val, %src[%offsets], %mask + xegpu.store %val, %src[%offsets], %mask : vector<4xf16>, memref<4x4xf16>, vector<1xindex>, vector<1xi1> return } @@ -743,3 +743,22 @@ func.func @tensor_desc_invalid_sg_data(%src: ui64, %offsets: vector<16xindex>) { #xegpu.layout<lane_layout = [8, 1], lane_data = [1, 2], order = [0, 1, 2]>> return } + +// ----- +#l = #xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]> +// expected-error@+1 {{repeated dim (2) in slice attribute}} +#s = #xegpu.slice<#l, dims = [2, 2]> +func.func @slice_attr_repeat_dim() { + %offsets = arith.constant {layout_result_0 = #s} dense<0.8> : vector<16x8xindex> + return +} + +// ----- +#l = #xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]> +// expected-error@+1 {{invalid dim (3) in slice attribute}} +#s = #xegpu.slice<#l, dims = [3]> +func.func @slice_attr_repeat_dim() { + %offsets = arith.constant {layout_result_0 = #s} dense<0.8> : vector<16x8xindex> + return +} + diff --git a/mlir/test/Dialect/XeGPU/layout.mlir b/mlir/test/Dialect/XeGPU/layout.mlir index 017dacc..e4b4e22 100644 --- a/mlir/test/Dialect/XeGPU/layout.mlir +++ b/mlir/test/Dialect/XeGPU/layout.mlir @@ -50,4 +50,27 @@ gpu.func @convert_layout_wg(%a: vector<32x64xf16>) { gpu.return } +gpu.func @slice_attr() { + //CHECK: arith.constant {layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]>, dims = [2]>} dense<8> : vector<16x8xindex> + %cst = arith.constant {layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]>, dims = [2]>} dense<8> : vector<16x8xindex> + gpu.return +} + +gpu.func @nested_slice_attr() { + //CHECK: arith.constant {layout_result_0 = #xegpu.slice<#xegpu.slice<#xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]>, dims = [2]>, dims = [1]>} dense<8> : vector<16xindex> + %cst = arith.constant {layout_result_0 = #xegpu.slice<#xegpu.slice<#xegpu.layout<sg_layout = [16, 1, 1], sg_data = [1, 8, 2]>, dims = [2]>, dims = [1]>} dense<8> : vector<16xindex> + gpu.return +} + +gpu.func @softmax_dim_0(%arg0: vector<256x128xf32>) -> vector<256x128xf32> { + %cst = arith.constant dense<0.000000e+00> : vector<128xf32> + %0 = math.exp %arg0 {layout_result_0 = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>} : vector<256x128xf32> + //CHECK: vector.multi_reduction <add>, {{.*}} {layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>, dims = [0]>} [0] : vector<256x128xf32> to vector<128xf32> + %1 = vector.multi_reduction <add>, %0, %cst {layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>, dims = [0]>} [0] : vector<256x128xf32> to vector<128xf32> + //CHECK: vector.broadcast {{.*}} {layout_result_0 = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>} : vector<128xf32> to vector<256x128xf32> + %2 = vector.broadcast %1 {layout_result_0 = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>} : vector<128xf32> to vector<256x128xf32> + %3 = arith.divf %0, %2 {layout_result_0 = #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32]>} : vector<256x128xf32> + gpu.return %3 : vector<256x128xf32> +} + } diff --git a/mlir/test/Dialect/XeGPU/ops.mlir b/mlir/test/Dialect/XeGPU/ops.mlir index 6be2371..67c00f5 100644 --- a/mlir/test/Dialect/XeGPU/ops.mlir +++ b/mlir/test/Dialect/XeGPU/ops.mlir @@ -62,28 +62,28 @@ gpu.func @create_nd_tdesc_7(%src: memref<8x24x32x48x64xf32>) { } -// CHECK: gpu.func @test_create_nd_tdesc_7(%[[arg0:.*]]: ui64, %[[arg1:.*]]: index, %[[arg2:.*]]: index, %[[arg3:.*]]: index, %[[arg4:.*]]: index, %[[arg5:.*]]: memref<24x32xf32>) +// CHECK: gpu.func @test_create_nd_tdesc_7(%[[arg0:.*]]: ui64, %[[arg1:.*]]: index, %[[arg2:.*]]: index, %[[arg3:.*]]: index, %[[arg4:.*]]: index, %[[arg5:.*]]: memref<24x32xf32>) gpu.func @test_create_nd_tdesc_7(%src: ui64, %w : index, %h : index, %x : index, %y : index, %src2: memref<24x32xf32>) { //CHECK: %[[C:.*]] = arith.constant 1 : index %c1 = arith.constant 1 : index - - // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %[[arg5]][0, 0] : memref<24x32xf32> -> !xegpu.tensor_desc<8x16xf32> + + // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %[[arg5]] : memref<24x32xf32> -> !xegpu.tensor_desc<8x16xf32> %3 = xegpu.create_nd_tdesc %src2 : memref<24x32xf32> -> !xegpu.tensor_desc<8x16xf32> - + gpu.return } -// CHECK: gpu.func @test_create_nd_tdesc_8(%[[arg0:.*]]: ui64, %[[arg1:.*]]: index, %[[arg2:.*]]: index, %[[arg3:.*]]: index, %[[arg4:.*]]: index) +// CHECK: gpu.func @test_create_nd_tdesc_8(%[[arg0:.*]]: ui64, %[[arg1:.*]]: index, %[[arg2:.*]]: index, %[[arg3:.*]]: index, %[[arg4:.*]]: index) gpu.func @test_create_nd_tdesc_8(%src: ui64, %w : index, %h : index, %x : index, %y : index) { - - %c1 = arith.constant 1 : index - // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %arg0[0, 0], shape : [%arg2, %arg1], strides : [%arg1, %c1] : ui64 -> !xegpu.tensor_desc<8x16xf32> + + %c1 = arith.constant 1 : index + // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %arg0, shape : [%arg2, %arg1], strides : [%arg1, %c1] : ui64 -> !xegpu.tensor_desc<8x16xf32> %2 = xegpu.create_nd_tdesc %src, shape : [%h, %w], strides : [%w, %c1] : ui64 -> !xegpu.tensor_desc<8x16xf32> - + gpu.return } -// CHECK-LABEL: func @test_create_nd_tdesc_9({{.*}}) +// CHECK-LABEL: func @test_create_nd_tdesc_9({{.*}}) gpu.func @test_create_nd_tdesc_9(%src: memref<?x?xf16>, %w : index, %h : index, %x : index, %y : index) { @@ -94,10 +94,10 @@ gpu.func @test_create_nd_tdesc_9(%src: memref<?x?xf16>, %w : index, %h : index, gpu.return } -// CHECK-LABEL: func @test_create_nd_tdesc_10({{.*}}) -gpu.func @test_create_nd_tdesc_10(%src: memref<?x?xf16>, %w : index, %h : index, %x : index, %y : index) { +// CHECK-LABEL: func @test_create_nd_tdesc_10({{.*}}) +gpu.func @test_create_nd_tdesc_10(%src: memref<?x?xf16>, %w : index, %h : index, %x : index, %y : index) { %c1 = arith.constant 1 : index - // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %arg0[0, 0], shape : [%arg2, %arg1], strides : [%arg1, %c1] : memref<?x?xf16> -> !xegpu.tensor_desc<8x16xf16> + // CHECK: %[[REG:.*]] = xegpu.create_nd_tdesc %arg0, shape : [%arg2, %arg1], strides : [%arg1, %c1] : memref<?x?xf16> -> !xegpu.tensor_desc<8x16xf16> %2 = xegpu.create_nd_tdesc %src, shape:[%h, %w], strides:[%w, %c1] : memref<?x?xf16> -> !xegpu.tensor_desc<8x16xf16> gpu.return @@ -123,7 +123,7 @@ gpu.func @prefetch_nd_2(%src: memref<48x64xf16>) { // CHECK: gpu.func @prefetch_nd_offset_1(%[[arg0:.*]]: memref<48x64xf16>, %arg1: index, %arg2: index) { gpu.func @prefetch_nd_offset_1(%src: memref<48x64xf16>, %x : index, %y : index) { - // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %[[arg0]][0, 0] : memref<48x64xf16> -> !xegpu.tensor_desc<8x16xf16> + // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %[[arg0]] : memref<48x64xf16> -> !xegpu.tensor_desc<8x16xf16> %1 = xegpu.create_nd_tdesc %src : memref<48x64xf16> -> !xegpu.tensor_desc<8x16xf16> // CHECK: xegpu.prefetch_nd %[[R0]][%arg1, %arg2] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>}> : !xegpu.tensor_desc<8x16xf16> xegpu.prefetch_nd %1[%x, %y] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>}>: !xegpu.tensor_desc<8x16xf16> @@ -271,7 +271,7 @@ gpu.func @subgroup_load_nd_8(%src: memref<24x32xf32>) { // CHECK: func @subgroup_load_nd_offset_1(%[[arg0:.*]]: memref<24x32xf32>, %arg1: index, %arg2: index) { gpu.func @subgroup_load_nd_offset_1(%src: memref<24x32xf32>, %x : index, %y : index) { - // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0[0, 0] : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> + // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0 : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> %1 = xegpu.create_nd_tdesc %src : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> // CHECK: %[[R1:.*]] = xegpu.load_nd %[[R0]][%arg1, %arg2] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8x16xf32> %2 = xegpu.load_nd %1[%x, %y] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8x16xf32> @@ -290,7 +290,7 @@ gpu.func @simt_load_nd_8(%src: memref<24x32xf32>) { // CHECK: func @simt_load_nd_offset_1(%[[arg0:.*]]: memref<24x32xf32>) { gpu.func @simt_load_nd_offset_1(%src: memref<24x32xf32>) { - // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0[0, 0] : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> + // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0 : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> %1 = xegpu.create_nd_tdesc %src : memref<24x32xf32> -> !xegpu.tensor_desc<16x8xf32> // CHECK: %[[R1:.*]] = xegpu.load_nd %[[R0]][0, 0] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8xf32> %2 = xegpu.load_nd %1[0, 0] <{l1_hint = #xegpu.cache_hint<cached>, l2_hint = #xegpu.cache_hint<uncached>, transpose = array<i64: 1, 0>}> : !xegpu.tensor_desc<16x8xf32> -> vector<8xf32> @@ -323,7 +323,7 @@ gpu.func @simt_store_nd(%src: memref<24x32xf16>) { gpu.func @subgroup_store_nd_2(%dst: memref<24x32xf16>, %x : index) { // CHECK: %[[C:.*]] = arith.constant dense<1.000000e+00> : vector<32xf16> %1 = arith.constant dense<1.0>: vector<32xf16> - // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %[[arg0]][0, 0] : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> + // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %[[arg0]] : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> %2 = xegpu.create_nd_tdesc %dst : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> // CHECK: xegpu.store_nd %[[C]], %[[R0]][%arg1] <{l1_hint = #xegpu.cache_hint<write_back>, l2_hint = #xegpu.cache_hint<uncached>}> : vector<32xf16>, !xegpu.tensor_desc<32xf16> xegpu.store_nd %1, %2[%x] <{l1_hint = #xegpu.cache_hint<write_back>, l2_hint = #xegpu.cache_hint<uncached>}>: vector<32xf16>, !xegpu.tensor_desc<32xf16> @@ -356,7 +356,7 @@ gpu.func @simt_store_nd_2(%src: memref<24x32xf16>) { gpu.func @simt_store_nd_offset_1(%src: memref<24x32xf16>) { // CHECK: %[[C:.*]] = arith.constant dense<1.000000e+00> : vector<2xf16> %1 = arith.constant dense<1.0>: vector<2xf16> - // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0[0, 0] : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> + // CHECK: %[[R0:.*]] = xegpu.create_nd_tdesc %arg0 : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> %2 = xegpu.create_nd_tdesc %src : memref<24x32xf16> -> !xegpu.tensor_desc<32xf16> // CHECK: xegpu.store_nd %[[C]], %[[R0]][0] <{l1_hint = #xegpu.cache_hint<write_back>, l2_hint = #xegpu.cache_hint<uncached>}> : vector<2xf16>, !xegpu.tensor_desc<32xf16> xegpu.store_nd %1, %2[0] <{l1_hint = #xegpu.cache_hint<write_back>, l2_hint = #xegpu.cache_hint<uncached>}>: vector<2xf16>, !xegpu.tensor_desc<32xf16> diff --git a/mlir/test/Dialect/XeGPU/xegpu-attr-interface.mlir b/mlir/test/Dialect/XeGPU/xegpu-attr-interface.mlir new file mode 100644 index 0000000..547c735 --- /dev/null +++ b/mlir/test/Dialect/XeGPU/xegpu-attr-interface.mlir @@ -0,0 +1,37 @@ +// RUN: mlir-opt --test-xegpu-layout-interface --cse -split-input-file %s | FileCheck %s + +//CHECk: #map = affine_map<()[s0] -> (s0 floordiv 8)> +gpu.module @test { + gpu.func @slice_attr() -> vector<128xindex> { + //CHECK: [[sgId:%.+]] = gpu.subgroup_id : index + //CHECK: [[IDY:%.+]] = affine.apply #map()[[[sgId]]] + //CHECK: [[c32:%.+]] = arith.constant 32 : index + //CHECK: [[LOCALY:%.+]] = index.mul [[IDY]], [[c32]] + //CHECK: [[c0:%.+]] = arith.constant 0 : index + //CHECK: [[Y:%.+]] = arith.addi [[LOCALY]], [[c0]] : index + //CHECK: [[c128:%.+]] = arith.constant 128 : index + //CHECK: [[MODY:%.+]] = index.remu [[Y]], [[c128]] + //CHECK: [[BASE:%.+]] = vector.step : vector<32xindex> + //CHECK: [[CAST:%.+]] = vector.broadcast [[MODY]] : index to vector<32xindex> + //CHECK: [[ADD:%.+]] = arith.addi [[BASE]], [[CAST]] : vector<32xindex> + %step = vector.step {layout_result_0 = #xegpu.slice<#xegpu.layout<sg_layout = [4, 8], sg_data = [32, 32]>, dims = [1]>}: vector<128xindex> + gpu.return %step : vector<128xindex> + } + + gpu.func @nested_slice_attr() -> vector<128xindex> { + //CHECK: [[sgId:%.+]] = gpu.subgroup_id : index + //CHECK: [[IDY:%.+]] = affine.apply #map()[[[sgId]]] + //CHECK: [[c32:%.+]] = arith.constant 32 : index + //CHECK: [[LOCALY:%.+]] = index.mul [[IDY]], [[c32]] + //CHECK: [[c0:%.+]] = arith.constant 0 : index + //CHECK: [[Y:%.+]] = arith.addi [[LOCALY]], [[c0]] : index + //CHECK: [[c128:%.+]] = arith.constant 128 : index + //CHECK: [[MODY:%.+]] = index.remu [[Y]], [[c128]] + //CHECK: [[BASE:%.+]] = vector.step : vector<32xindex> + //CHECK: [[CAST:%.+]] = vector.broadcast [[MODY]] : index to vector<32xindex> + //CHECK: [[ADD:%.+]] = arith.addi [[BASE]], [[CAST]] : vector<32xindex> + %0 = vector.step {layout_result_0 = #xegpu.slice<#xegpu.slice<#xegpu.layout<sg_layout = [4, 8, 1], sg_data = [32, 32, 1]>, dims = [2]>, dims = [1]>} : vector<128xindex> + gpu.return %0 : vector<128xindex> + } + +}
\ No newline at end of file diff --git a/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir b/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir index 628a485..e5cc65e 100644 --- a/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir +++ b/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg-rr.mlir @@ -1,5 +1,8 @@ // RUN: mlir-opt --xegpu-wg-to-sg-distribute -split-input-file %s | FileCheck %s +#map = affine_map<()[s0] -> (s0 floordiv 4)> +#map1 = affine_map<()[s0] -> (s0 mod 4)> + gpu.module @test_round_robin_assignment { // CHECK-LABEL: create_nd_tdesc // CHECK-SAME: %[[ARG_0:.*]]: memref<256x128xf32> @@ -12,6 +15,30 @@ gpu.module @test_round_robin_assignment { gpu.return } + // CHECK-LABEL: create_nd_tdesc_with_shared_data + // CHECK-SAME: [[ARG_0:%.*]]: memref<256x128xf32> + gpu.func @create_nd_tdesc_with_shared_data(%src: memref<256x128xf32>) { + //CHECK: [[sgId:%.+]] = gpu.subgroup_id : index + //CHECK: [[IdY:%.+]] = affine.apply #map()[[[sgId]]] + //CHECK: [[IdX:%.+]] = affine.apply #map1()[[[sgId]]] + //CHECK: [[C16:%.+]] = arith.constant 16 : index + //CHECK: [[LY:%.+]] = index.mul [[IdY]], [[C16]] + //CHECK: [[C64:%.+]] = arith.constant 64 : index + //CHECK: [[LX:%.+]] = index.mul [[IdX]], [[C64]] + //CHECK: [[C0:%.+]] = arith.constant 0 : index + //CHECK: [[C0_1:%.+]] = arith.constant 0 : index + //CHECK: [[ADDY:%.+]] = arith.addi [[LY]], [[C0]] : index + //CHECK: [[ADDX:%.+]] = arith.addi [[LX]], [[C0_1]] : index + //CHECK: [[C128:%.+]] = arith.constant 128 : index + //CHECK: [[offY:%.+]] = index.remu [[ADDY]], [[C128]] + //CHECK: [[C64_2:%.+]] = arith.constant 64 : index + //CHECK: [[offX:%.+]] = index.remu [[ADDX]], [[C64_2]] + //CHECK: xegpu.create_nd_tdesc [[ARG_0]][[[offY]], [[offX]]] : memref<256x128xf32> -> !xegpu.tensor_desc<16x64xf32> + %tdesc = xegpu.create_nd_tdesc %src[0, 0] : memref<256x128xf32> + -> !xegpu.tensor_desc<128x64xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [16, 64]>> + gpu.return + } + // CHECK-LABEL: load_nd_tdesc // CHECK-SAME: %[[ARG_0:.*]]: memref<256x128xf32> gpu.func @load_nd_tdesc(%src: memref<256x128xf32>) { diff --git a/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir b/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir index d4b0037..180ba8a 100644 --- a/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir +++ b/mlir/test/Dialect/XeGPU/xegpu-wg-to-sg.mlir @@ -4,34 +4,26 @@ //CHECK: #map1 = affine_map<()[s0] -> (s0 mod 4)> gpu.module @test_1_1_assignment { // CHECK-LABEL: create_nd_tdesc - // CHECK-SAME: %[[ARG_0:.*]]: memref<256x128xf32> + // CHECK-SAME: [[ARG_0:%.*]]: memref<256x128xf32> gpu.func @create_nd_tdesc(%src: memref<256x128xf32>) { - // CHECK: %[[SGID:.*]] = gpu.subgroup_id - // CHECK: %[[C8:.*]] = arith.constant 8 : index - // CHECK: %[[C32:.*]] = arith.constant 32 : index - // CHECK: %[[C4:.*]] = arith.constant 4 : index - // CHECK: %[[C32_0:.*]] = arith.constant 32 : index - // CHECK: %[[C4_1:.*]] = arith.constant 4 : index - // CHECK: %[[DIV:.*]] = affine.apply #map()[%[[SGID]]] - // CHECK: %[[REM:.*]] = affine.apply #map1()[%[[SGID]]] - // CHECK: %[[MUL1:.*]] = index.mul %[[DIV]], %[[C32]] - // CHECK: %[[MUL2:.*]] = index.mul %[[REM]], %[[C32_0]] - // CHECK: %[[C0:.*]] = arith.constant 0 : index - // CHECK: %[[C256:.*]] = arith.constant 256 : index - // CHECK: %[[MOD:.*]] = index.remu %[[MUL1]], %[[C256]] - // CHECK: %[[C0_2:.*]] = arith.constant 0 : index - // CHECK: %[[ADD1:.*]] = index.add %[[MOD]], %[[C0_2]] - // CHECK: %[[C0_3:.*]] = arith.constant 0 : index - // CHECK: %[[C128:.*]] = arith.constant 128 : index - // CHECK: %[[MOD1:.*]] = index.remu %[[MUL2]], %[[C128]] - // CHECK: %[[C0_4:.*]] = arith.constant 0 : index - // CHECK: %[[ADD2:.*]] = index.add %[[MOD1]], %[[C0_4]] - // CHECK: %[[TDESC:.*]] = xegpu.create_nd_tdesc %[[ARG_0]][%[[ADD1]], %[[ADD2]]] : memref<256x128xf32> - // CHECK-SAME: -> !xegpu.tensor_desc<32x32xf32, #xegpu.layout<lane_layout = [1, 16], lane_data = [1, 1]>> - // CHECK: gpu.return - %tdesc = xegpu.create_nd_tdesc %src[0, 0] : memref<256x128xf32> - -> !xegpu.tensor_desc<256x128xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32], lane_layout = [1, 16], lane_data = [1, 1]>> - gpu.return + //CHECK: [[SGID:%.+]] = gpu.subgroup_id : index + //CHECK: [[SGIDY:%.+]] = affine.apply #map()[[[SGID]]] + //CHECK: [[SGIDX:%.+]] = affine.apply #map1()[[[SGID]]] + //CHECK: [[C32:%.+]] = arith.constant 32 : index + //CHECK: [[LY:%.+]] = index.mul [[SGIDY]], [[C32]] + //CHECK: [[LX:%.+]] = index.mul [[SGIDX]], [[C32]] + //CHECK: [[C0:%.+]] = arith.constant 0 : index + //CHECK: [[C0_1:%.+]] = arith.constant 0 : index + //CHECK: [[UY:%.+]] = arith.addi [[LY]], [[C0]] : index + //CHECK: [[UX:%.+]] = arith.addi [[LX]], [[C0_1]] : index + //CHECK: [[C256:%.+]] = arith.constant 256 : index + //CHECK: [[Y:%.+]] = index.remu [[UY]], [[C256]] + //CHECK: [[C128:%.+]] = arith.constant 128 : index + //CHECK: [[X:%.+]] = index.remu [[UX]], [[C128]] + //CHECK: [[TDESC:%.+]] = xegpu.create_nd_tdesc [[ARG_0]][[[Y]], [[X]]] : memref<256x128xf32> -> !xegpu.tensor_desc<32x32xf32, #xegpu.layout<lane_layout = [1, 16], lane_data = [1, 1]>> + %tdesc = xegpu.create_nd_tdesc %src[0, 0] : memref<256x128xf32> + -> !xegpu.tensor_desc<256x128xf32, #xegpu.layout<sg_layout = [8, 4], sg_data = [32, 32], lane_layout = [1, 16], lane_data = [1, 1]>> + gpu.return } // CHECK-LABEL: load_nd_tdesc @@ -347,7 +339,7 @@ gpu.func @dpas_no_sg_data(%a: memref<128x128xf16>, %b: memref<128x128xf16>) { // CHECK-LABEL: @subgroup_id_range_nested_if gpu.func @subgroup_id_range_nested_if(%src: memref<256x128xf32>, %src1: memref<128x64xf32>) { %sg_id = gpu.subgroup_id : index - %c1 = arith.constant 1 : i1 + %c1 = arith.constant 1 : i1 %c3 = arith.constant 3 : index %c32 = arith.constant 32 : index %tdesc = xegpu.create_nd_tdesc %src[0, 0] : memref<256x128xf32> diff --git a/mlir/test/Target/LLVMIR/nvvmir-invalid.mlir b/mlir/test/Target/LLVMIR/nvvmir-invalid.mlir index 85478cc..991222c 100644 --- a/mlir/test/Target/LLVMIR/nvvmir-invalid.mlir +++ b/mlir/test/Target/LLVMIR/nvvmir-invalid.mlir @@ -1,5 +1,24 @@ // RUN: mlir-translate -verify-diagnostics -split-input-file -mlir-to-llvmir %s +llvm.func @pmevent_no_id() { + // expected-error @below {{either `id` or `mask` must be set}} + nvvm.pmevent +} + +// ----- + +llvm.func @pmevent_bigger15() { + // expected-error @below {{`id` must be between 0 and 15}} + nvvm.pmevent id = 141 +} + +// ----- + +llvm.func @pmevent_many_ids() { + // expected-error @below {{`id` and `mask` cannot be set at the same time}} + nvvm.pmevent id = 1 mask = 1 +} + // ----- llvm.func @kernel_func(%numberOfThreads : i32) { diff --git a/mlir/test/Target/LLVMIR/nvvmir.mlir b/mlir/test/Target/LLVMIR/nvvmir.mlir index 5c2cfa4..b1800e8 100644 --- a/mlir/test/Target/LLVMIR/nvvmir.mlir +++ b/mlir/test/Target/LLVMIR/nvvmir.mlir @@ -918,3 +918,14 @@ llvm.func @nvvm_dot_accumulate_2way(%a: vector<2xi16>, %b: vector<4xi8>, %c: i32 %7 = nvvm.dot.accumulate.2way %a <signed>, %b <signed>, %c {b_hi = true}: vector<2xi16>, vector<4xi8> llvm.return } + +// ----- + +// CHECK-LABEL: @nvvm_pmevent +llvm.func @nvvm_pmevent() { + // CHECK: call void @llvm.nvvm.pm.event.mask(i16 15000) + nvvm.pmevent mask = 15000 + // CHECK: call void @llvm.nvvm.pm.event.mask(i16 4) + nvvm.pmevent mask = 4 + llvm.return +} diff --git a/mlir/test/Target/SPIRV/arm-tensor-constant.mlir b/mlir/test/Target/SPIRV/arm-tensor-constant.mlir index 275e586..7fb8af1 100644 --- a/mlir/test/Target/SPIRV/arm-tensor-constant.mlir +++ b/mlir/test/Target/SPIRV/arm-tensor-constant.mlir @@ -1,17 +1,36 @@ // RUN: mlir-translate --no-implicit-module --test-spirv-roundtrip %s | FileCheck %s -// DISABLED: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv %s | spirv-val %} - -// FIXME(#152012): Fix arm tensor constant validation errors and reenable spirv-val tests. +// RUN: %if spirv-tools %{ mlir-translate --no-implicit-module --serialize-spirv %s | spirv-val %} spirv.module Logical Vulkan requires #spirv.vce<v1.3, [VulkanMemoryModel, Shader, TensorsARM, Linkage], [SPV_KHR_vulkan_memory_model, SPV_ARM_tensors]> { - // CHECK-LABEL: @arm_tensor_of_i32 - spirv.func @arm_tensor_of_i32() -> (!spirv.arm.tensor<2x3xi32>) "None" { + // CHECK-LABEL: @rank_1_arm_tensor_of_i32 + spirv.func @rank_1_arm_tensor_of_i32() -> (!spirv.arm.tensor<3xi32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<[1, 2, 3]> : !spirv.arm.tensor<3xi32> + %0 = spirv.Constant dense<[1, 2, 3]> : !spirv.arm.tensor<3xi32> + spirv.ReturnValue %0 : !spirv.arm.tensor<3xi32> + } + + // CHECK-LABEL: @rank_2_arm_tensor_of_i32 + spirv.func @rank_2_arm_tensor_of_i32() -> (!spirv.arm.tensor<2x3xi32>) "None" { // CHECK: {{%.*}} = spirv.Constant dense<{{\[}}[1, 2, 3], [4, 5, 6]]> : !spirv.arm.tensor<2x3xi32> %0 = spirv.Constant dense<[[1, 2, 3], [4, 5, 6]]> : !spirv.arm.tensor<2x3xi32> spirv.ReturnValue %0 : !spirv.arm.tensor<2x3xi32> } + // CHECK-LABEL: @rank_3_arm_tensor_of_i32 + spirv.func @rank_3_arm_tensor_of_i32() -> (!spirv.arm.tensor<2x2x3xi32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<{{\[}}{{\[}}[1, 2, 3], [4, 5, 6]], {{\[}}[7, 8, 9], [10, 11, 12]]]> : !spirv.arm.tensor<2x2x3xi32> + %0 = spirv.Constant dense<[[[1, 2, 3], [4, 5, 6]], [[7, 8, 9], [10, 11, 12]]]> : !spirv.arm.tensor<2x2x3xi32> + spirv.ReturnValue %0 : !spirv.arm.tensor<2x2x3xi32> + } + + // CHECK-LABEL: @rank_4_arm_tensor_of_i32 + spirv.func @rank_4_arm_tensor_of_i32() -> (!spirv.arm.tensor<2x3x4x5xi32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<5> : !spirv.arm.tensor<2x3x4x5xi32> + %0 = spirv.Constant dense<5> : !spirv.arm.tensor<2x3x4x5xi32> + spirv.ReturnValue %0 : !spirv.arm.tensor<2x3x4x5xi32> + } + // CHECK-LABEL: @splat_arm_tensor_of_i32 spirv.func @splat_arm_tensor_of_i32() -> (!spirv.arm.tensor<2x3xi32>) "None" { // CHECK: {{%.*}} = spirv.Constant dense<2> : !spirv.arm.tensor<2x3xi32> @@ -19,13 +38,34 @@ spirv.module Logical Vulkan requires #spirv.vce<v1.3, spirv.ReturnValue %0 : !spirv.arm.tensor<2x3xi32> } - // CHECK-LABEL: @arm_tensor_of_f32 - spirv.func @arm_tensor_of_f32() -> (!spirv.arm.tensor<2x3xf32>) "None" { + // CHECK-LABEL: @rank_1_arm_tensor_of_f32 + spirv.func @rank_1_arm_tensor_of_f32() -> (!spirv.arm.tensor<3xf32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<[1.000000e+00, 2.000000e+00, 3.000000e+00]> : !spirv.arm.tensor<3xf32> + %0 = spirv.Constant dense<[1.0, 2.0, 3.0]> : !spirv.arm.tensor<3xf32> + spirv.ReturnValue %0 : !spirv.arm.tensor<3xf32> + } + + // CHECK-LABEL: @rank_2_arm_tensor_of_f32 + spirv.func @rank_2_arm_tensor_of_f32() -> (!spirv.arm.tensor<2x3xf32>) "None" { // CHECK: {{%.*}} = spirv.Constant dense<{{\[}}[1.000000e+00, 2.000000e+00, 3.000000e+00], [4.000000e+00, 5.000000e+00, 6.000000e+00]]> : !spirv.arm.tensor<2x3xf32> - %0 = spirv.Constant dense<[[1.0, 2.0, 3.0], [4.0, 5.0, 6.0]]>: !spirv.arm.tensor<2x3xf32> + %0 = spirv.Constant dense<[[1.0, 2.0, 3.0], [4.0, 5.0, 6.0]]> : !spirv.arm.tensor<2x3xf32> spirv.ReturnValue %0 : !spirv.arm.tensor<2x3xf32> } + // CHECK-LABEL: @rank_3_arm_tensor_of_f32 + spirv.func @rank_3_arm_tensor_of_f32() -> (!spirv.arm.tensor<2x2x3xf32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<{{\[}}{{\[}}[1.000000e+00, 2.000000e+00, 3.000000e+00], [4.000000e+00, 5.000000e+00, 6.000000e+00]], {{\[}}[7.000000e+00, 8.000000e+00, 9.000000e+00], [1.000000e+01, 1.100000e+01, 1.200000e+01]]]> : !spirv.arm.tensor<2x2x3xf32> + %0 = spirv.Constant dense<[[[1.0, 2.0, 3.0], [4.0, 5.0, 6.0]], [[7.0, 8.0, 9.0], [10.0, 11.0, 12.0]]]> : !spirv.arm.tensor<2x2x3xf32> + spirv.ReturnValue %0 : !spirv.arm.tensor<2x2x3xf32> + } + + // CHECK-LABEL: @rank_4_arm_tensor_of_f32 + spirv.func @rank_4_arm_tensor_of_f32() -> (!spirv.arm.tensor<2x3x4x5xf32>) "None" { + // CHECK: {{%.*}} = spirv.Constant dense<5.000000e+00> : !spirv.arm.tensor<2x3x4x5xf32> + %0 = spirv.Constant dense<5.0> : !spirv.arm.tensor<2x3x4x5xf32> + spirv.ReturnValue %0 : !spirv.arm.tensor<2x3x4x5xf32> + } + // CHECK-LABEL: @splat_arm_tensor_of_f32 spirv.func @splat_arm_tensor_of_f32() -> (!spirv.arm.tensor<2x3xf32>) "None" { // CHECK: {{%.*}} = spirv.Constant dense<2.000000e+00> : !spirv.arm.tensor<2x3xf32> diff --git a/mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp b/mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp index c6245b6..3bea8ef 100644 --- a/mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp +++ b/mlir/test/lib/Dialect/XeGPU/TestXeGPUTransforms.cpp @@ -7,11 +7,14 @@ //===----------------------------------------------------------------------===// #include "mlir/Dialect/GPU/IR/GPUDialect.h" +#include "mlir/Dialect/Index/IR/IndexDialect.h" #include "mlir/Dialect/Vector/Transforms/VectorTransforms.h" #include "mlir/Dialect/XeGPU/IR/XeGPU.h" #include "mlir/Dialect/XeGPU/Transforms/Transforms.h" +#include "mlir/Dialect/XeGPU/Utils/XeGPUUtils.h" #include "mlir/Pass/Pass.h" #include "mlir/Pass/PassManager.h" +#include "mlir/Transforms/DialectConversion.h" #include "mlir/Transforms/GreedyPatternRewriteDriver.h" using namespace mlir; @@ -147,12 +150,118 @@ struct TestXeGPUUnrollingPatterns } }; +#undef DEBUG_TYPE +#define DEBUG_TYPE "test-xegpu-layout-interface" +#define DBGS() (llvm::dbgs() << "[" DEBUG_TYPE "]: ") +#define LDBG(X) LLVM_DEBUG(DBGS() << X << "\n") + +// Test pattern for distributing vector::StepOp from workgroup to subgroup. +// Validates LayoutTrait interfaces for offset computation abstraction between +// LayoutAttr and SliceAttr. +class TestStepOpPattern : public OpConversionPattern<vector::StepOp> { + using OpConversionPattern<vector::StepOp>::OpConversionPattern; + + LogicalResult + matchAndRewrite(vector::StepOp op, OneToNOpAdaptor adaptor, + ConversionPatternRewriter &rewriter) const override { + + auto layoutName = xegpu::getLayoutName(op->getResult(0)); + auto sliceAttr = op->getAttrOfType<xegpu::SliceAttr>(layoutName); + if (!sliceAttr || sliceAttr.getRank() != 1) + return failure(); + + std::optional<SmallVector<int64_t>> sgShape = sliceAttr.getSgDataAsInt(); + if (!sgShape) + return failure(); + + Location loc = op.getLoc(); + VectorType type = op.getResult().getType(); + auto wgShape = type.getShape(); + + Value sgId = + gpu::SubgroupIdOp::create(rewriter, loc, /*upper_bound=*/nullptr); + auto maybeOffsets = sliceAttr.getOffsets(rewriter, loc, sgId, wgShape); + if (failed(maybeOffsets)) + return failure(); + + VectorType newTy = type.cloneWith(*sgShape, type.getElementType()); + Value base = vector::StepOp::create(rewriter, loc, newTy); + SmallVector<Value> newOps; + for (auto offsets : *maybeOffsets) { + Value bcast = + vector::BroadcastOp::create(rewriter, loc, newTy, offsets[0]); + Value add = arith::AddIOp::create(rewriter, loc, base, bcast); + newOps.push_back(add); + } + rewriter.replaceOpWithMultiple(op, {newOps}); + return success(); + } +}; + +struct TestXeGPULayoutInterface + : public PassWrapper<TestXeGPULayoutInterface, + OperationPass<gpu::GPUModuleOp>> { + MLIR_DEFINE_EXPLICIT_INTERNAL_INLINE_TYPE_ID(TestXeGPULayoutInterface) + + StringRef getArgument() const final { return "test-xegpu-layout-interface"; } + + StringRef getDescription() const final { + return "Test the implementation of XeGPU Layout interfaces"; + } + + void getDependentDialects(::mlir::DialectRegistry ®istry) const override { + registry.insert<arith::ArithDialect>(); + registry.insert<memref::MemRefDialect>(); + registry.insert<xegpu::XeGPUDialect>(); + registry.insert<vector::VectorDialect>(); + registry.insert<index::IndexDialect>(); + } + + TestXeGPULayoutInterface() = default; + TestXeGPULayoutInterface(const TestXeGPULayoutInterface &pass) + : PassWrapper(pass) {} + + void runOnOperation() override { + MLIRContext *ctx = &getContext(); + + TypeConverter typeConverter; + auto materializeCast = [&](mlir::OpBuilder &builder, mlir::Type type, + mlir::ValueRange inputs, + mlir::Location loc) -> mlir::Value { + return builder.create<UnrealizedConversionCastOp>(loc, type, inputs) + .getResult(0); + }; + typeConverter.addSourceMaterialization(materializeCast); + typeConverter.addTargetMaterialization(materializeCast); + + RewritePatternSet patterns(ctx); + patterns.add<TestStepOpPattern>(typeConverter, ctx); + + ConversionTarget target(*ctx); + auto isLegal = [&](xegpu::SliceAttr layout) -> bool { + return !layout || !layout.isWgLayout(); + }; + + target.addDynamicallyLegalOp<vector::StepOp>( + [&](vector::StepOp op) -> bool { + auto layoutName = xegpu::getLayoutName(op->getResult(0)); + auto sliceAttr = op->getAttrOfType<xegpu::SliceAttr>(layoutName); + return isLegal(sliceAttr); + }); + + target.markUnknownOpDynamicallyLegal([](Operation *op) { return true; }); + + (void)applyPartialConversion(getOperation(), target, std::move(patterns)); + } +}; + } // namespace namespace mlir { namespace test { void registerTestXeGPULowerings() { PassRegistration<TestXeGPUUnrollingPatterns>(); + PassRegistration<TestXeGPULayoutInterface>(); } } // namespace test } // namespace mlir diff --git a/utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel b/utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel index ab6b5ef..518f723 100644 --- a/utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/clang/unittests/BUILD.bazel @@ -682,7 +682,7 @@ cc_test( args = [ # TODO: some tests fail with: "JIT session error: Symbols not found: # [ _ZnwmPv26__clang_Interpreter_NewTag, __clang_Interpreter_SetValueWithAlloc ] - "--gtest_filter=-InterpreterTest.*", + "--gtest_filter=-InterpreterTest.*:InterpreterTestBase.*", ], deps = [ "//clang:ast", diff --git a/utils/bazel/llvm-project-overlay/libc/BUILD.bazel b/utils/bazel/llvm-project-overlay/libc/BUILD.bazel index 6a9bd09..63c2a80 100644 --- a/utils/bazel/llvm-project-overlay/libc/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/libc/BUILD.bazel @@ -2414,6 +2414,18 @@ libc_support_library( ) libc_support_library( + name = "__support_math_cbrtf", + hdrs = ["src/__support/math/cbrtf.h"], + deps = [ + ":__support_fputil_double_double", + ":__support_fputil_polyeval", + ":__support_fputil_fenv_impl", + ":__support_fputil_dyadic_float", + ":__support_integer_literals", + ], +) + +libc_support_library( name = "__support_math_erff", hdrs = ["src/__support/math/erff.h"], deps = [ @@ -3089,7 +3101,7 @@ libc_math_function( libc_math_function( name = "cbrtf", additional_deps = [ - ":__support_fputil_polyeval", + ":__support_math_cbrtf", ], ) diff --git a/utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel b/utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel index ff93eb5..dc934a4 100644 --- a/utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/libc/utils/MPFRWrapper/BUILD.bazel @@ -77,6 +77,7 @@ libc_test_library( "//libc:__support_cpp_string_view", "//libc:__support_cpp_stringstream", "//libc:__support_cpp_type_traits", + "//libc:__support_fputil_bfloat16", "//libc:__support_fputil_cast", "//libc:__support_fputil_fp_bits", "//libc:__support_fputil_fpbits_str", diff --git a/utils/bazel/llvm-project-overlay/llvm/config.bzl b/utils/bazel/llvm-project-overlay/llvm/config.bzl index 2309175..3e9c032 100644 --- a/utils/bazel/llvm-project-overlay/llvm/config.bzl +++ b/utils/bazel/llvm-project-overlay/llvm/config.bzl @@ -113,7 +113,6 @@ llvm_config_defines = os_defines + builtin_thread_pointer + select({ "LLVM_VERSION_PATCH={}".format(LLVM_VERSION_PATCH), r'LLVM_VERSION_STRING=\"{}\"'.format(PACKAGE_VERSION), # Set globally in HandleLLVMOptions.cmake - "EXPERIMENTAL_KEY_INSTRUCTIONS", # These shouldn't be needed by the C++11 standard, but are for some # platforms (e.g. glibc < 2.18. See # https://sourceware.org/bugzilla/show_bug.cgi?id=15366). These are also diff --git a/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel b/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel index 7689300..49694a2 100644 --- a/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/mlir/BUILD.bazel @@ -3541,14 +3541,13 @@ cc_library( ":InferTypeOpInterface", ":Support", ":WasmSSAIncGen", + ":WasmSSAInterfacesIncGen", ":WasmSSAOpsIncGen", ":WasmSSATypesIncGen", - ":WasmSSAInterfacesIncGen", "//llvm:Support", ], ) - ##---------------------------------------------------------------------------## # XeGPU dialect. ##---------------------------------------------------------------------------## @@ -3632,21 +3631,35 @@ gentbl_cc_library( deps = [":XeGPUAttrTdFiles"], ) +gentbl_cc_library( + name = "XeGPUAttrInterfaceIncGen", + tbl_outs = { + "include/mlir/Dialect/XeGPU/IR/XeGPUAttrInterface.h.inc": ["-gen-attr-interface-decls"], + "include/mlir/Dialect/XeGPU/IR/XeGPUAttrInterface.cpp.inc": ["-gen-attr-interface-defs"], + }, + tblgen = ":mlir-tblgen", + td_file = "include/mlir/Dialect/XeGPU/IR/XeGPUAttrs.td", + deps = [":XeGPUAttrTdFiles"], +) + cc_library( name = "XeGPUDialect", srcs = glob(["lib/Dialect/XeGPU/IR/*.cpp"]), hdrs = glob(["include/mlir/Dialect/XeGPU/IR/*.h"]), includes = ["include"], deps = [ + ":AffineUtils", ":ArithDialect", ":ArithUtils", ":BytecodeOpInterface", ":DialectUtils", ":IR", + ":IndexDialect", ":ShapedOpInterfaces", ":SideEffectInterfaces", ":VectorDialect", ":ViewLikeInterface", + ":XeGPUAttrInterfaceIncGen", ":XeGPUEnumsIncGen", ":XeGPUIncGen", "//llvm:Support", @@ -10683,6 +10696,7 @@ cc_library( ":AsmParser", ":BufferizationDialect", ":BufferizationTransforms", + ":CommonFolders", ":DialectUtils", ":FuncDialect", ":FunctionInterfaces", @@ -10706,6 +10720,7 @@ cc_library( ":TransformDialectInterfaces", ":TransformDialectUtils", ":TransformUtils", + ":UBDialect", ":VectorDialect", ":VectorTransforms", "//llvm:Support", @@ -10818,6 +10833,7 @@ cc_library( ":TensorUtils", ":TilingInterface", ":TransformUtils", + ":UBDialect", ":ValueBoundsOpInterface", ":VectorDialect", ":VectorToSCF", diff --git a/utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel b/utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel index d95a37f..27b1dbb 100644 --- a/utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel +++ b/utils/bazel/llvm-project-overlay/mlir/test/BUILD.bazel @@ -1204,11 +1204,13 @@ cc_library( deps = [ "//mlir:GPUDialect", "//mlir:IR", + "//mlir:IndexDialect", "//mlir:MemRefDialect", "//mlir:Pass", "//mlir:TransformUtils", "//mlir:VectorTransforms", "//mlir:XeGPUDialect", "//mlir:XeGPUTransforms", + "//mlir:XeGPUUtils", ], ) diff --git a/utils/bazel/third_party_build/zlib-ng.BUILD b/utils/bazel/third_party_build/zlib-ng.BUILD index 055261a..2a10720 100644 --- a/utils/bazel/third_party_build/zlib-ng.BUILD +++ b/utils/bazel/third_party_build/zlib-ng.BUILD @@ -2,7 +2,7 @@ # See https://llvm.org/LICENSE.txt for license information. # SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception load("@bazel_skylib//rules:common_settings.bzl", "bool_flag") -load("@bazel_skylib//rules:expand_template.bzl", "expand_template") +load("@bazel_skylib//rules:copy_file.bzl", "copy_file") package( default_visibility = ["//visibility:public"], @@ -20,12 +20,12 @@ config_setting( flag_values = {":llvm_enable_zlib": "true"}, ) -genrule( +copy_file( # The input template is identical to the CMake output. name = "zconf_gen", - srcs = ["zconf.h.in"], - outs = ["zconf.h"], - cmd = "cp $(SRCS) $(OUTS)", + src = "zconf.h.in", + out = "zconf.h", + allow_symlink = True, ) cc_library( |