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| author | Fangrui Song <i@maskray.me> | 2026-02-21 16:42:09 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2026-02-22 00:42:09 +0000 |
| commit | c04b00de750801238bc85f11874c66a41b61b2c5 (patch) | |
| tree | 9c32c8ae6043cf5c668b96d6bde60320b8855a47 /offload/test/Inputs | |
| parent | f912679b761bdd3d8ab3a1042d3ea848a663e201 (diff) | |
| download | llvm-main.zip llvm-main.tar.gz llvm-main.tar.bz2 | |
Implement ARM::scanSectionImpl, following the pattern established for
AArch64 and other targets. This merges the getRelExpr and TLS handling
for SHF_ALLOC sections into the target-specific scanner, enabling
devirtualization and eliminating abstraction overhead.
- Inline relocation classification into scanSectionImpl with a switch
on relocation type, replacing the generic rs.scan() path.
- Use processR_PC/processR_PLT_PC for common PC-relative and PLT
relocations.
- Handle TLS inline: checkTlsLe for TLS LE, handleTlsIe<false> for
TLS IE (no IE-to-LE optimization for ARM), and direct flag/reloc
emission for TLS GD/LD (no GD/LD optimization for ARM).
- Set hasGotOffRel for R_GOTREL/R_GOTONLY_PC relocations.
- Simplify getRelExpr to only handle relocations needed by
relocateNonAlloc and preprocessRelocs.
Diffstat (limited to 'offload/test/Inputs')
0 files changed, 0 insertions, 0 deletions