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| author | Giuseppe Rossini <giuseppe.rossini@amd.com> | 2024-09-03 17:47:08 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-03 17:47:08 +0100 |
| commit | a8e1c6f99abc273677afed5eaaeee2c0296db59f (patch) | |
| tree | 5903e0a58aafaa3b867953f424866599a6580e47 /mlir/test/Conversion | |
| parent | 0b2f2537a5b717539b200bd7fa31cbc24679e96f (diff) | |
| download | llvm-a8e1c6f99abc273677afed5eaaeee2c0296db59f.zip llvm-a8e1c6f99abc273677afed5eaaeee2c0296db59f.tar.gz llvm-a8e1c6f99abc273677afed5eaaeee2c0296db59f.tar.bz2 | |
[MLIR][AMDGPU] Add support for fp8 ops on gfx12 (#106388)
This PR is adding support for `fp8` and `bfp8` on gfx12
Diffstat (limited to 'mlir/test/Conversion')
| -rw-r--r-- | mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir b/mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir new file mode 100644 index 0000000..7b2b524 --- /dev/null +++ b/mlir/test/Conversion/AMDGPUToROCDL/wmma-gfx12.mlir @@ -0,0 +1,9 @@ +// RUN: mlir-opt %s -convert-amdgpu-to-rocdl=chipset=gfx1200 --allow-unregistered-dialect | FileCheck %s +func.func @mfma_to_rocdl(%arg0 : vector<8xf8E4M3FN>, %arg1 : vector<8xf8E5M2>, %arg2 : vector<8xf32>) { + // CHECK: rocdl.wmma.f32.16x16x16.fp8{{.*}}: (vector<2xi32>, vector<2xi32>, vector<8xf32>) -> vector<8xf32> + amdgpu.wmma %arg0 * %arg0 + %arg2: vector<8xf8E4M3FN>, vector<8xf8E4M3FN>, vector<8xf32> + + // CHECK: rocdl.wmma.f32.16x16x16.bf8{{.*}}: (vector<2xi32>, vector<2xi32>, vector<8xf32>) -> vector<8xf32> + amdgpu.wmma %arg1 * %arg1 + %arg2: vector<8xf8E5M2>, vector<8xf8E5M2>, vector<8xf32> + func.return +} |