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author | Liu, Chen3 <chen3.liu@intel.com> | 2022-08-03 14:39:29 +0800 |
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committer | Liu, Chen3 <chen3.liu@intel.com> | 2022-08-03 16:17:51 +0800 |
commit | 5bbb0a831fe514ae27e7f36e828975152e7c17c4 (patch) | |
tree | e77a77f952c8c1fbc863cb9b7cfe53edb5a7973a /llvm | |
parent | b128e057c191a441e3778ffc872ffca943b2e5b1 (diff) | |
download | llvm-5bbb0a831fe514ae27e7f36e828975152e7c17c4.zip llvm-5bbb0a831fe514ae27e7f36e828975152e7c17c4.tar.gz llvm-5bbb0a831fe514ae27e7f36e828975152e7c17c4.tar.bz2 |
[X86] Using `X86MemOperand` instead of `Operand` for `i32mem_TC` and `i64mem_TC`
To fix build fail when X86_GEN_FOLD_TABLES is enabled.
Differential Revision: https://reviews.llvm.org/D131049
Diffstat (limited to 'llvm')
-rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.td | 10 |
1 files changed, 2 insertions, 8 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 4a9a281d..9f2cd2e 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -463,23 +463,17 @@ def ptr_rc_tailcall : PointerLikeRegClass<4>; // Special i32mem for addresses of load folding tail calls. These are not // allowed to use callee-saved registers since they must be scheduled // after callee-saved register are popped. -def i32mem_TC : Operand<i32> { - let PrintMethod = "printdwordmem"; +def i32mem_TC : X86MemOperand<"printdwordmem", X86Mem32AsmOperand, 32> { let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, i32imm, SEGMENT_REG); - let ParserMatchClass = X86Mem32AsmOperand; - let OperandType = "OPERAND_MEMORY"; } // Special i64mem for addresses of load folding tail calls. These are not // allowed to use callee-saved registers since they must be scheduled // after callee-saved register are popped. -def i64mem_TC : Operand<i64> { - let PrintMethod = "printqwordmem"; +def i64mem_TC : X86MemOperand<"printqwordmem", X86Mem64AsmOperand, 64> { let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, i32imm, SEGMENT_REG); - let ParserMatchClass = X86Mem64AsmOperand; - let OperandType = "OPERAND_MEMORY"; } // Special parser to detect 16-bit mode to select 16-bit displacement. |