From 5bbb0a831fe514ae27e7f36e828975152e7c17c4 Mon Sep 17 00:00:00 2001 From: "Liu, Chen3" Date: Wed, 3 Aug 2022 14:39:29 +0800 Subject: [X86] Using `X86MemOperand` instead of `Operand` for `i32mem_TC` and `i64mem_TC` To fix build fail when X86_GEN_FOLD_TABLES is enabled. Differential Revision: https://reviews.llvm.org/D131049 --- llvm/lib/Target/X86/X86InstrInfo.td | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) (limited to 'llvm') diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td index 4a9a281d..9f2cd2e 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.td +++ b/llvm/lib/Target/X86/X86InstrInfo.td @@ -463,23 +463,17 @@ def ptr_rc_tailcall : PointerLikeRegClass<4>; // Special i32mem for addresses of load folding tail calls. These are not // allowed to use callee-saved registers since they must be scheduled // after callee-saved register are popped. -def i32mem_TC : Operand { - let PrintMethod = "printdwordmem"; +def i32mem_TC : X86MemOperand<"printdwordmem", X86Mem32AsmOperand, 32> { let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, i32imm, SEGMENT_REG); - let ParserMatchClass = X86Mem32AsmOperand; - let OperandType = "OPERAND_MEMORY"; } // Special i64mem for addresses of load folding tail calls. These are not // allowed to use callee-saved registers since they must be scheduled // after callee-saved register are popped. -def i64mem_TC : Operand { - let PrintMethod = "printqwordmem"; +def i64mem_TC : X86MemOperand<"printqwordmem", X86Mem64AsmOperand, 64> { let MIOperandInfo = (ops ptr_rc_tailcall, i8imm, ptr_rc_tailcall, i32imm, SEGMENT_REG); - let ParserMatchClass = X86Mem64AsmOperand; - let OperandType = "OPERAND_MEMORY"; } // Special parser to detect 16-bit mode to select 16-bit displacement. -- cgit v1.1