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authorMatt Arsenault <Matthew.Arsenault@amd.com>2020-06-28 10:46:56 -0400
committerMatt Arsenault <Matthew.Arsenault@amd.com>2020-06-29 14:45:20 -0400
commit2790516418f4763b5846cd6dd7760a0986ccfa3c (patch)
tree14f0e34910934026f6d6ed66e6c9dd48e22ce98b /llvm/utils
parent6d01a9419351b8ff63b520fd86148795e0d9f381 (diff)
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X86: Use MOV32r0 pseudo instead of directly emitting xor
This was producing reg = xor undef reg, undef reg. This looks similar to a use of a value to define itself, and I want to disallow undef uses for SSA virtual registers. If this were to use implicit_def, there's no guarantee the two operands end up using the same register (I think no guarantee exists even if the two operands start out as the same register, but this was violated when I switched this to use an explicit implicit_def). The MOV32r0 pseudo evidently exists to handle this case, so use it instead. This was more work than I expected for the 64-bit case, but I didn't see any helper for materializing a 64-bit 0.
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