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| author | Yeting Kuo <46629943+yetingk@users.noreply.github.com> | 2023-11-22 08:22:14 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2023-11-22 08:22:14 +0800 |
| commit | a756a6b97e44d0c446111a3a34afdee0dacadfe7 (patch) | |
| tree | beb6f1c52358f1a317bedeefb6c7e25cc3b3e81d /llvm/utils/UpdateTestChecks/common.py | |
| parent | 60fa8cf2c3253cc1e1ade7eede395e460da9882c (diff) | |
| download | llvm-a756a6b97e44d0c446111a3a34afdee0dacadfe7.zip llvm-a756a6b97e44d0c446111a3a34afdee0dacadfe7.tar.gz llvm-a756a6b97e44d0c446111a3a34afdee0dacadfe7.tar.bz2 | |
[TargetLowering][RISCV] Introduce shouldFoldSelectWithSingleBitTest and RISC-V implement. (#72978)
DAGCombiner folds (select_cc seteq (and x, y), 0, 0, A) to (and (sra
(shl x)) A) where y has a single bit set. Previously, DAGCombiner relies
on `shouldAvoidTransformToShift` to decide when to do the combine, but
`shouldAvoidTransformToShift` is only about shift cost. This patch
introuduces a specific hook to decide when to do the combine and disable
the combine when Zicond enabled and AndMask <= 1024.
Diffstat (limited to 'llvm/utils/UpdateTestChecks/common.py')
0 files changed, 0 insertions, 0 deletions