diff options
| author | Freddy Ye <freddy.ye@intel.com> | 2024-08-29 18:22:26 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-29 18:22:26 +0800 |
| commit | 36b7c30b292f853c09b80f8bc2c5f233f68c9e7b (patch) | |
| tree | 9d1ca81025aa002f890342a682e3cd79639ffb7d /llvm/utils/TableGen/X86DisassemblerTables.cpp | |
| parent | fcb3a0485857c749d04ea234a8c3d629c62ab211 (diff) | |
| download | llvm-36b7c30b292f853c09b80f8bc2c5f233f68c9e7b.zip llvm-36b7c30b292f853c09b80f8bc2c5f233f68c9e7b.tar.gz llvm-36b7c30b292f853c09b80f8bc2c5f233f68c9e7b.tar.bz2 | |
[X86, MC] Recognize OSIZE=64b when EVEX.W = 1, EVEX.pp = 01 (#103816)
In the legacy space, if both the 66 prefix and REX.W=1 are present, the
REX.W=1 takes precedence and makes OSIZE=64b. EVEX map 4 inherits this
convention, with EVEX.pp=01 and EVEX.W playing the roles of the 66
prefix and REX.W. So if EVEX.pp=00, the OSIZE can only be 64b or 32b,
depending on whether EVEX.W=1 or not. But if EVEX.pp=01, then OSIZE is
either 64b or 16b depending on whether EVEX.W=1 or not.
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
| -rw-r--r-- | llvm/utils/TableGen/X86DisassemblerTables.cpp | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index 21c5e32..294923b 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -268,6 +268,7 @@ static inline bool inheritsFrom(InstructionContext child, (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ)); case IC_EVEX_W: return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) || + inheritsFrom(child, IC_EVEX_W_OPSIZE) || (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W)); case IC_EVEX_W_XS: return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) || @@ -454,6 +455,7 @@ static inline bool inheritsFrom(InstructionContext child, (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B)); case IC_EVEX_W_B: return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) || + inheritsFrom(child, IC_EVEX_W_OPSIZE_B) || (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B)); case IC_EVEX_W_XS_B: return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) || |