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author | XinWang10 <108658776+XinWang10@users.noreply.github.com> | 2023-12-15 16:03:17 +0800 |
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committer | GitHub <noreply@github.com> | 2023-12-15 16:03:17 +0800 |
commit | 295415e720209a368b74390fa933c83290e002d3 (patch) | |
tree | 7e08f7862a22ebc453e244b7b63927399535c17d /llvm/utils/TableGen/X86DisassemblerTables.cpp | |
parent | c1a6974d6b3dc7be2178d8db9f8fc6c2cc9230f2 (diff) | |
download | llvm-295415e720209a368b74390fa933c83290e002d3.zip llvm-295415e720209a368b74390fa933c83290e002d3.tar.gz llvm-295415e720209a368b74390fa933c83290e002d3.tar.bz2 |
[X86][MC] Support Enc/Dec for EGPR for promoted MOVDIR instruction (#74713)
R16-R31 was added into GPRs in
https://github.com/llvm/llvm-project/pull/70958,
This patch supports the encoding/decoding for promoted MOVDIR
instruction in EVEX space.
RFC:
https://discourse.llvm.org/t/rfc-design-for-apx-feature-egpr-and-ndd-support/73031/4
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
-rw-r--r-- | llvm/utils/TableGen/X86DisassemblerTables.cpp | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index 959e0fd..06e7ec3 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -213,6 +213,8 @@ static inline bool inheritsFrom(InstructionContext child, (WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) || (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) || (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE)); + case IC_EVEX_OPSIZE_ADSIZE: + return false; case IC_EVEX_K: return (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L_W_K)) || (VEX_LIG && WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) || @@ -885,7 +887,9 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { for (unsigned index = 0; index < ATTR_max; ++index) { o.indent(i * 2); - if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { + if ((index & ATTR_EVEX) && (index & ATTR_OPSIZE) && (index & ATTR_ADSIZE)) + o << "IC_EVEX_OPSIZE_ADSIZE"; + else if ((index & ATTR_EVEX) || (index & ATTR_VEX) || (index & ATTR_VEXL)) { if (index & ATTR_EVEX) o << "IC_EVEX"; else @@ -906,7 +910,7 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { else if (index & ATTR_XS) o << "_XS"; - if ((index & ATTR_EVEX)) { + if (index & ATTR_EVEX) { if (index & ATTR_EVEXKZ) o << "_KZ"; else if (index & ATTR_EVEXK) |