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| author | Phoebe Wang <phoebe.wang@intel.com> | 2024-08-02 12:10:50 +0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-02 12:10:50 +0800 |
| commit | 10bad2c8d7be1bbb726c536dd306da3cae2247b4 (patch) | |
| tree | 4dcf574e2cda0a0a58205d11342b092878d2e6e1 /llvm/utils/TableGen/X86DisassemblerTables.cpp | |
| parent | 96e6255e8b8b4e9e7bf0846df94dddcb79ced6f5 (diff) | |
| download | llvm-10bad2c8d7be1bbb726c536dd306da3cae2247b4.zip llvm-10bad2c8d7be1bbb726c536dd306da3cae2247b4.tar.gz llvm-10bad2c8d7be1bbb726c536dd306da3cae2247b4.tar.bz2 | |
[X86][AVX10.2] Support AVX10.2 option and VMPSADBW/VADDP[D,H,S] new instructions (#101452)
Ref.: https://cdrdv2.intel.com/v1/dl/getContent/828965
Diffstat (limited to 'llvm/utils/TableGen/X86DisassemblerTables.cpp')
| -rw-r--r-- | llvm/utils/TableGen/X86DisassemblerTables.cpp | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/llvm/utils/TableGen/X86DisassemblerTables.cpp b/llvm/utils/TableGen/X86DisassemblerTables.cpp index 7d28c48..b0acd4ea 100644 --- a/llvm/utils/TableGen/X86DisassemblerTables.cpp +++ b/llvm/utils/TableGen/X86DisassemblerTables.cpp @@ -575,6 +575,31 @@ static inline bool inheritsFrom(InstructionContext child, case IC_EVEX_W_NF: case IC_EVEX_W_B_NF: return false; + case IC_EVEX_B_U: + case IC_EVEX_XS_B_U: + case IC_EVEX_XD_B_U: + case IC_EVEX_OPSIZE_B_U: + case IC_EVEX_W_B_U: + case IC_EVEX_W_XS_B_U: + case IC_EVEX_W_XD_B_U: + case IC_EVEX_W_OPSIZE_B_U: + case IC_EVEX_K_B_U: + case IC_EVEX_XS_K_B_U: + case IC_EVEX_XD_K_B_U: + case IC_EVEX_OPSIZE_K_B_U: + case IC_EVEX_W_K_B_U: + case IC_EVEX_W_XS_K_B_U: + case IC_EVEX_W_XD_K_B_U: + case IC_EVEX_W_OPSIZE_K_B_U: + case IC_EVEX_KZ_B_U: + case IC_EVEX_XS_KZ_B_U: + case IC_EVEX_XD_KZ_B_U: + case IC_EVEX_OPSIZE_KZ_B_U: + case IC_EVEX_W_KZ_B_U: + case IC_EVEX_W_XS_KZ_B_U: + case IC_EVEX_W_XD_KZ_B_U: + case IC_EVEX_W_OPSIZE_KZ_B_U: + return false; default: errs() << "Unknown instruction class: " << stringForContext((InstructionContext)parent) << "\n"; @@ -926,7 +951,9 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { else o << "IC_VEX"; - if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) + if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU)) + ; // Ignore ATTR_VEXL and ATTR_EVEXL2 under YMM rounding. + else if ((index & ATTR_EVEX) && (index & ATTR_EVEXL2)) o << "_L2"; else if (index & ATTR_VEXL) o << "_L"; @@ -949,6 +976,9 @@ void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const { if (index & ATTR_EVEXB) o << "_B"; + + if ((index & ATTR_EVEXB) && (index & ATTR_EVEXU)) + o << "_U"; } } else if ((index & ATTR_64BIT) && (index & ATTR_REX2)) o << "IC_64BIT_REX2"; |