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author | Craig Topper <craig.topper@sifive.com> | 2025-07-26 00:05:33 -0700 |
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committer | GitHub <noreply@github.com> | 2025-07-26 00:05:33 -0700 |
commit | 1669bd3ae9af0cac4414479d8f1e53e329fa3efb (patch) | |
tree | 7a1d21973bf721a6393f54684a5fce38f6e997bb /llvm/unittests/Testing/ADT/StringMapTest.cpp | |
parent | b22e22ebfa546cc31e166dd5ca4cc808aa057c9b (diff) | |
download | llvm-1669bd3ae9af0cac4414479d8f1e53e329fa3efb.zip llvm-1669bd3ae9af0cac4414479d8f1e53e329fa3efb.tar.gz llvm-1669bd3ae9af0cac4414479d8f1e53e329fa3efb.tar.bz2 |
[RISCV] Accept c.slli/c.srli/c.srli with a 0 immediate as hints. (#150689)
These encodings were previously assigned to c.slli64/srli64/srai64, and
designated as hints for RV32 and RV64. Those mnemonics no longer appear
in the ISA manual after RV128 was removed. The spec now says that
c.slli/c.srli/c.srai with an immediate of 0 is a hint.
This patch updates the assembler to accept this. I've left the old
spelling for backwards compatibility but we disassemble a shift with a
zero immediate. The C_SLLI64_HINT/C_SRLI_HINT/C_SRAI_HINT instructions
are removed and the predicates for C_SLLI/C_SRLI/C_SRAI not accept a 0
immediate.
Fixes #150304
Diffstat (limited to 'llvm/unittests/Testing/ADT/StringMapTest.cpp')
0 files changed, 0 insertions, 0 deletions