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author | Ricardo Jesus <rjj@nvidia.com> | 2025-07-07 11:14:26 +0100 |
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committer | GitHub <noreply@github.com> | 2025-07-07 11:14:26 +0100 |
commit | 84e54515bc4e9dd4938121f4df7cc27bb89a0a43 (patch) | |
tree | b7ffbceb39e8cce3042106c7d7a9e8e547ce869b /llvm/unittests/TargetParser/TargetParserTest.cpp | |
parent | e2aa8781e18a0091146f652935896fb6fb1963f7 (diff) | |
download | llvm-84e54515bc4e9dd4938121f4df7cc27bb89a0a43.zip llvm-84e54515bc4e9dd4938121f4df7cc27bb89a0a43.tar.gz llvm-84e54515bc4e9dd4938121f4df7cc27bb89a0a43.tar.bz2 |
[AArch64] Add support for -mcpu=gb10. (#146515)
This patch adds support for -mcpu=gb10 (NVIDIA GB10). This is a
big.LITTLE cluster of Cortex-X925 and Cortex-A725 cores. The appropriate
MIDR numbers are added to detect them in -mcpu=native.
We did not add an -mcpu=cortex-x925.cortex-a725 option because GB10 does
include the crypto instructions which we want on by default, and the
current convention is to not enable such extensions for Arm Cortex cores
in -mcpu where they are optional in the IP.
Relevant GCC patch:
https://gcc.gnu.org/pipermail/gcc-patches/2025-June/687005.html
Diffstat (limited to 'llvm/unittests/TargetParser/TargetParserTest.cpp')
-rw-r--r-- | llvm/unittests/TargetParser/TargetParserTest.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/unittests/TargetParser/TargetParserTest.cpp b/llvm/unittests/TargetParser/TargetParserTest.cpp index 97ee8dd..1d7ad8a 100644 --- a/llvm/unittests/TargetParser/TargetParserTest.cpp +++ b/llvm/unittests/TargetParser/TargetParserTest.cpp @@ -1164,6 +1164,7 @@ INSTANTIATE_TEST_SUITE_P( AArch64CPUTestParams("a64fx", "armv8.2-a"), AArch64CPUTestParams("fujitsu-monaka", "armv9.3-a"), AArch64CPUTestParams("carmel", "armv8.2-a"), + AArch64CPUTestParams("gb10", "armv9.2-a"), AArch64CPUTestParams("grace", "armv9-a"), AArch64CPUTestParams("olympus", "armv9.2-a"), AArch64CPUTestParams("saphira", "armv8.4-a"), @@ -1260,7 +1261,7 @@ INSTANTIATE_TEST_SUITE_P( AArch64CPUAliasTestParams::PrintToStringParamName); // Note: number of CPUs includes aliases. -static constexpr unsigned NumAArch64CPUArchs = 90; +static constexpr unsigned NumAArch64CPUArchs = 91; TEST(TargetParserTest, testAArch64CPUArchList) { SmallVector<StringRef, NumAArch64CPUArchs> List; |