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authorSiva Chandra Reddy <sivachandra@google.com>2022-06-24 18:08:18 +0000
committerSiva Chandra Reddy <sivachandra@google.com>2022-06-25 04:42:40 +0000
commit66a6c1073a204de5729e0ec82508697aeb08bcf1 (patch)
treea2963f7b92549f624343d682ad2b2a939cb7908d /llvm/unittests/Support/AlignmentTest.cpp
parentf3caa98e495188b03ea7f38ffb40f3955d785553 (diff)
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[libc] Add a cacheline size of arm target.
It is set arbitrarily at 32 now. It can be adjusted as required in future.
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