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| author | Durgadoss R <durgadossr@nvidia.com> | 2025-01-17 19:02:25 +0530 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-01-17 19:02:25 +0530 |
| commit | 6dcb2a09028b25f8a8cfbda486d9b87a42fd3b30 (patch) | |
| tree | f3bdeffb61f2bb5bcf6d5230128cdd339b17ceca /llvm/unittests/ADT/DAGDeltaAlgorithmTest.cpp | |
| parent | f597d346ab6e42cbfe421b153abf7ece6b592f1d (diff) | |
| download | llvm-6dcb2a09028b25f8a8cfbda486d9b87a42fd3b30.zip llvm-6dcb2a09028b25f8a8cfbda486d9b87a42fd3b30.tar.gz llvm-6dcb2a09028b25f8a8cfbda486d9b87a42fd3b30.tar.bz2 | |
[MLIR][NVVM] Add Float to TF32 conversion Op (#123199)
PR #121507 added 'cvt' intrinsics to convert
float to tf32, with the valid set of rounding and
saturation modes. This PR adds an NVVM Dialect Op
for the same.
* lit tests are added to verify the lowering to intrinsics.
* Negative tests are also added to check the error-handling of invalid
combinations.
Signed-off-by: Durgadoss R <durgadossr@nvidia.com>
Diffstat (limited to 'llvm/unittests/ADT/DAGDeltaAlgorithmTest.cpp')
0 files changed, 0 insertions, 0 deletions