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author | Caroline Concatto <caroline.concatto@arm.com> | 2022-11-02 09:36:50 +0000 |
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committer | Caroline Concatto <caroline.concatto@arm.com> | 2022-11-08 09:51:56 +0000 |
commit | 1a917568e7321b4cc36313895cc98408ffa861ec (patch) | |
tree | 436f77aaf7cfdc3e69c6956effb7908c590525f0 /llvm/unittests/ADT/ArrayRefTest.cpp | |
parent | 17813095de1769abb3ab6196115556fce6d81496 (diff) | |
download | llvm-1a917568e7321b4cc36313895cc98408ffa861ec.zip llvm-1a917568e7321b4cc36313895cc98408ffa861ec.tar.gz llvm-1a917568e7321b4cc36313895cc98408ffa861ec.tar.bz2 |
[AArch64]SME2 MOV Instructions
This patch adds the assembly/disassembly for the following instructions:
MOVA (array to vector, four registers): Move four ZA single-vector groups to four vector registers.
(array to vector, two registers): Move two ZA single-vector groups to two vector registers.
(tile to vector, four registers): Move four ZA tile slices to four vector registers.
(tile to vector, single): Move ZA tile slice to vector register.
(tile to vector, two registers): Move two ZA tile slices to two vector registers.
(vector to array, four registers): Move four vector registers to four ZA single-vector groups.
(vector to array, two registers): Move two vector registers to two ZA single-vector groups.
(vector to tile, four registers): Move four vector registers to four ZA tile slices.
(vector to tile, single): Move vector register to ZA tile slice.
(vector to tile, two registers): Move two vector registers to two ZA tile slices.
The reference can be found here:
https://developer.arm.com/documentation/ddi0602/2022-09
It add more sizes for Matrix Operand:
MatrixOp8 and MatrixOp16
two implicit operands uimm0s2range and uimm0s4range.
and uimm1s2range that are immediates
Differential Revision: https://reviews.llvm.org/D136142
Diffstat (limited to 'llvm/unittests/ADT/ArrayRefTest.cpp')
0 files changed, 0 insertions, 0 deletions