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| author | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-21 08:10:16 +0800 |
|---|---|---|
| committer | Luo, Yuanke <yuanke.luo@intel.com> | 2022-06-21 09:18:49 +0800 |
| commit | 44e8a205f4cf747b920726428ee9e35c2ac3d706 (patch) | |
| tree | 0fbfb17694346d6d6da40b8997dd4333ced1f00b /llvm/tools/llvm-objdump/llvm-objdump.cpp | |
| parent | d883a02a7c2bb89000d0685749f062c9206ac40c (diff) | |
| download | llvm-44e8a205f4cf747b920726428ee9e35c2ac3d706.zip llvm-44e8a205f4cf747b920726428ee9e35c2ac3d706.tar.gz llvm-44e8a205f4cf747b920726428ee9e35c2ac3d706.tar.bz2 | |
[fastregalloc] Enhance the heuristics for liveout in self loop.
For below case, virtual register is defined twice in the self loop. We
don't need to spill %0 after the third instruction `%0 = def (tied %0)`,
because it is defined in the second instruction `%0 = def`.
1 bb.1
2 %0 = def
3 %0 = def (tied %0)
4 ...
5 jmp bb.1
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D125079
Diffstat (limited to 'llvm/tools/llvm-objdump/llvm-objdump.cpp')
0 files changed, 0 insertions, 0 deletions