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| author | Alex Bradbury <asb@lowrisc.org> | 2017-09-28 08:26:24 +0000 |
|---|---|---|
| committer | Alex Bradbury <asb@lowrisc.org> | 2017-09-28 08:26:24 +0000 |
| commit | 9d3f12501a4594421a8d07053dd9dbaa652c7418 (patch) | |
| tree | d802b5c35d624cb00ed2c3e7578b4afa6f3195df /llvm/tools/llvm-cov/SourceCoverageViewText.cpp | |
| parent | 07f1e2e2b3880bfc3e470bb111c31028371ab8f3 (diff) | |
| download | llvm-9d3f12501a4594421a8d07053dd9dbaa652c7418.zip llvm-9d3f12501a4594421a8d07053dd9dbaa652c7418.tar.gz llvm-9d3f12501a4594421a8d07053dd9dbaa652c7418.tar.bz2 | |
[RISCV] Add common fixups and relocations
%lo(), %hi(), and %pcrel_hi() are supported and test cases have been added to
ensure the appropriate fixups and relocations are generated. I've added an
instruction format field which is used in RISCVMCCodeEmitter to, for
instance, tell whether it should emit a lo12_i fixup or a lo12_s fixup
(RISC-V has two 12-bit immediate encodings depending on the instruction
type).
Differential Revision: https://reviews.llvm.org/D23568
llvm-svn: 314389
Diffstat (limited to 'llvm/tools/llvm-cov/SourceCoverageViewText.cpp')
0 files changed, 0 insertions, 0 deletions