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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 10:46:40 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2016-08-24 10:46:40 +0000 |
| commit | 6392b8d4ce410eaaba08cdbf6c4e261ba1375c7a (patch) | |
| tree | 92ecb3bf336094ca01ca57fc6e32f28874543c0d /llvm/tools/llvm-cov/SourceCoverageViewText.cpp | |
| parent | 88823468420e652918cbf13f420d885bacd67681 (diff) | |
| download | llvm-6392b8d4ce410eaaba08cdbf6c4e261ba1375c7a.zip llvm-6392b8d4ce410eaaba08cdbf6c4e261ba1375c7a.tar.gz llvm-6392b8d4ce410eaaba08cdbf6c4e261ba1375c7a.tar.bz2 | |
[X86][SSE] Add support for 32-bit element vectors to X86ISD::VZEXT_LOAD
Consecutive load matching (EltsFromConsecutiveLoads) currently uses VZEXT_LOAD (load scalar into lowest element and zero uppers) for vXi64 / vXf64 vectors only.
For vXi32 / vXf32 vectors it instead creates a scalar load, SCALAR_TO_VECTOR and finally VZEXT_MOVL (zero upper vector elements), relying on tablegen patterns to match this into an equivalent of VZEXT_LOAD.
This patch adds the VZEXT_LOAD patterns for vXi32 / vXf32 vectors directly and updates EltsFromConsecutiveLoads to use this.
This has proven necessary to allow us to easily make VZEXT_MOVL a full member of the target shuffle set - without this change the call to combineShuffle (which is the main caller of EltsFromConsecutiveLoads) tended to recursively recreate VZEXT_MOVL nodes......
Differential Revision: https://reviews.llvm.org/D23673
llvm-svn: 279619
Diffstat (limited to 'llvm/tools/llvm-cov/SourceCoverageViewText.cpp')
0 files changed, 0 insertions, 0 deletions