aboutsummaryrefslogtreecommitdiff
path: root/llvm/lib/Target/LoongArch
diff options
context:
space:
mode:
authorhev <wangrui@loongson.cn>2024-07-30 14:22:24 +0800
committerGitHub <noreply@github.com>2024-07-30 14:22:24 +0800
commit3e2631c9c62990467eca3e173f714367d7e7c0dd (patch)
treeb1fd6294c5cd11c8b33665ba9a1a4a79f407c7de /llvm/lib/Target/LoongArch
parent28f9575b41ce5a184baeaab95f5db74fb3ad176f (diff)
downloadllvm-3e2631c9c62990467eca3e173f714367d7e7c0dd.zip
llvm-3e2631c9c62990467eca3e173f714367d7e7c0dd.tar.gz
llvm-3e2631c9c62990467eca3e173f714367d7e7c0dd.tar.bz2
[LoongArch] Optimize codegen for ISD::ROTL (#100344)
The LoongArch rotr.{w,d} instruction ignores the high bits of the shift operand, allowing it to generate more efficient code using the constant zero register.
Diffstat (limited to 'llvm/lib/Target/LoongArch')
-rw-r--r--llvm/lib/Target/LoongArch/LoongArchInstrInfo.td6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
index ef647a4..c78820a 100644
--- a/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
+++ b/llvm/lib/Target/LoongArch/LoongArchInstrInfo.td
@@ -1123,7 +1123,7 @@ def : PatGprGpr<urem, MOD_WU>;
def : PatGprGpr<mul, MUL_W>;
def : PatGprGpr<mulhs, MULH_W>;
def : PatGprGpr<mulhu, MULH_WU>;
-def : PatGprGpr<rotr, ROTR_W>;
+def : PatGprGpr<shiftop<rotr>, ROTR_W>;
def : PatGprImm<rotr, ROTRI_W, uimm5>;
foreach Idx = 1...3 in {
@@ -1146,8 +1146,8 @@ def : PatGprGpr<srem, MOD_D>;
def : PatGprGpr_32<srem, MOD_W>;
def : PatGprGpr<urem, MOD_DU>;
def : PatGprGpr<loongarch_mod_wu, MOD_WU>;
-def : PatGprGpr<rotr, ROTR_D>;
-def : PatGprGpr<loongarch_rotr_w, ROTR_W>;
+def : PatGprGpr<shiftop<rotr>, ROTR_D>;
+def : PatGprGpr<shiftopw<loongarch_rotr_w>, ROTR_W>;
def : PatGprImm<rotr, ROTRI_D, uimm6>;
def : PatGprImm_32<rotr, ROTRI_W, uimm5>;
def : PatGprImm<loongarch_rotr_w, ROTRI_W, uimm5>;