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author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-10-29 12:03:38 +0100 |
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committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2022-10-29 12:03:43 +0100 |
commit | eea6a2782e852ee38a56af8245a27d864b56b592 (patch) | |
tree | 5157d3d9d940b4bbd645b252c7b880f2ffc2f6d5 /llvm/lib/Support | |
parent | 0a0d2f540076d9fee1ee722b5f47cc31be9fa53e (diff) | |
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[X86] WriteFShuffle256 shuffles aren't microcoded in the llvm sense
znver1/2 might have poor throughput for crosslane shuffles but they don't consume 100 cycles of resources
I think there was a misunderstanding between the AMD definition of microcoding (more than 2-3 uops) and LLVM (here be dragons - impossible to approximately model the instruction)
This is more yak shaving to come from D103695 - this time working out why codegen involving broadcasts gives such weird numbers
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