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| author | sstwcw <f0gukp2nk@protonmail.com> | 2022-06-26 01:51:40 +0000 |
|---|---|---|
| committer | sstwcw <f0gukp2nk@protonmail.com> | 2022-06-26 01:52:15 +0000 |
| commit | 9ed2e68c9ae5cf346f938cc095e5448c1ff60f51 (patch) | |
| tree | 64d316e5d991f4238f1658f52d4a3182dd22091c /llvm/lib/Support/Process.cpp | |
| parent | 370bee480139bd37fe8c0c8c03ecd19ed9223f01 (diff) | |
| download | llvm-9ed2e68c9ae5cf346f938cc095e5448c1ff60f51.zip llvm-9ed2e68c9ae5cf346f938cc095e5448c1ff60f51.tar.gz llvm-9ed2e68c9ae5cf346f938cc095e5448c1ff60f51.tar.bz2 | |
[clang-format] Parse Verilog if statements
This patch mainly handles treating `begin` as block openers.
While and for statements will be handled in another patch.
Reviewed By: HazardyKnusperkeks
Differential Revision: https://reviews.llvm.org/D123450
Diffstat (limited to 'llvm/lib/Support/Process.cpp')
0 files changed, 0 insertions, 0 deletions