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| author | Craig Topper <craig.topper@sifive.com> | 2025-08-06 09:09:39 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-06 09:09:39 -0700 |
| commit | e232f05dfd0e2bc0eb060c8a7e6f5c946395358d (patch) | |
| tree | 2914fc44da0f4567dd680bf607f13c86e3f39b24 /llvm/lib/Object | |
| parent | ef9834c5e846f794ddee4c0a530e280da0c8ad67 (diff) | |
| download | llvm-e232f05dfd0e2bc0eb060c8a7e6f5c946395358d.zip llvm-e232f05dfd0e2bc0eb060c8a7e6f5c946395358d.tar.gz llvm-e232f05dfd0e2bc0eb060c8a7e6f5c946395358d.tar.bz2 | |
[RISCV] Add packw+packh isel pattern for unaligned loads on RV64. (#152159)
This is similar to an existing pattern from RV32 with the
simpliflication proposed by #152045. Instead of pack we need to use
packw and we need to know that the upper 32 bits are being ignored since
packw sign extends from bit 31.
The use of allBinOpWUsers prevents tablegen from automatically
reassociating the pattern so we need to do it manually. Tablegen is
still able to commute operands though.
Diffstat (limited to 'llvm/lib/Object')
0 files changed, 0 insertions, 0 deletions