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| author | Min-Yih Hsu <min.hsu@sifive.com> | 2025-08-01 10:13:46 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-08-01 10:13:46 -0700 |
| commit | 401e72c830e4ac7ea334e9e62366bc50f72fbfeb (patch) | |
| tree | 85956e6657d9c3e44c930416f1d4f47100e5cbf9 /llvm/lib/Object | |
| parent | 6c072c06cc59b56f83014450afe82f03666407ad (diff) | |
| download | llvm-401e72c830e4ac7ea334e9e62366bc50f72fbfeb.zip llvm-401e72c830e4ac7ea334e9e62366bc50f72fbfeb.tar.gz llvm-401e72c830e4ac7ea334e9e62366bc50f72fbfeb.tar.bz2 | |
[RISCV] Add intrinsics for strided segment loads with fixed vectors (#151611)
These intrinsics are the strided version of `llvm.riscv.segN.load`
intrinsics.
Diffstat (limited to 'llvm/lib/Object')
0 files changed, 0 insertions, 0 deletions