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| author | Craig Topper <craig.topper@sifive.com> | 2022-12-14 10:30:59 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-12-14 10:38:48 -0800 |
| commit | 3e7dad22f111b9256e79dcb9cdb1c21ff0fd73dc (patch) | |
| tree | aed8b90d8e58d870f53e3741bce8684be4226f45 /llvm/lib/IR/Function.cpp | |
| parent | a0b97a42472497bc07e0a8e00ef64913283e7691 (diff) | |
| download | llvm-3e7dad22f111b9256e79dcb9cdb1c21ff0fd73dc.zip llvm-3e7dad22f111b9256e79dcb9cdb1c21ff0fd73dc.tar.gz llvm-3e7dad22f111b9256e79dcb9cdb1c21ff0fd73dc.tar.bz2 | |
[RISCV] Add a bit to TSFlags to mark SignExtendingOpW instructions for SExtWRemoval.
Instead of switching on the opcode in SExtWRemoval, we can use a
bit in TSFlags. This reduces the amount of code that needs to be
generated to implement the switch. The opcodes are scattered throughout
the opcode enum, so the switch isn't very densely packed.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D139965
Diffstat (limited to 'llvm/lib/IR/Function.cpp')
0 files changed, 0 insertions, 0 deletions