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| author | Brox Chen <guochen2@amd.com> | 2024-11-14 18:22:37 -0500 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-14 18:22:37 -0500 |
| commit | abff8fe2a940212b1c43af2d86a68fc92849f019 (patch) | |
| tree | 09604cee163daafc644be46e7e0b5168f0756c86 /llvm/lib/CodeGen | |
| parent | 0f0e2fe97b6c771b7a70964bf321ad91788e6a22 (diff) | |
| download | llvm-abff8fe2a940212b1c43af2d86a68fc92849f019.zip llvm-abff8fe2a940212b1c43af2d86a68fc92849f019.tar.gz llvm-abff8fe2a940212b1c43af2d86a68fc92849f019.tar.bz2 | |
[AMDGPU][True16][MC] VINTERP instructions supporting true16/fake16 (#113634)
Update VInterp instructions with true16 and fake16 formats.
This patch includes instructions:
v_interp_p10_f16_f32
v_interp_p2_f16_f32
v_interp_p10_rtz_f16_f32
v_interp_p2_rtz_f16_f32
dasm test vinterp-fake16.txt is removed and the testline are merged into
vinterp.txt which handles both true16/fake16 cases
Diffstat (limited to 'llvm/lib/CodeGen')
0 files changed, 0 insertions, 0 deletions