diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-18 20:49:17 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-18 20:49:17 +0000 |
| commit | 215c4f68f6a9930e76ad9051e640255757f2aacb (patch) | |
| tree | 24e1d3ba1bfeed099c265d2ef5778cc9324f7953 /llvm/lib/CodeGen | |
| parent | 4453e4292d5e6f6557bae558ea5784224b65a27e (diff) | |
| download | llvm-215c4f68f6a9930e76ad9051e640255757f2aacb.zip llvm-215c4f68f6a9930e76ad9051e640255757f2aacb.tar.gz llvm-215c4f68f6a9930e76ad9051e640255757f2aacb.tar.bz2 | |
GlobalISel: Verify G_ICMP/G_FCMP vector types
llvm-svn: 351591
Diffstat (limited to 'llvm/lib/CodeGen')
| -rw-r--r-- | llvm/lib/CodeGen/MachineVerifier.cpp | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/CodeGen/MachineVerifier.cpp b/llvm/lib/CodeGen/MachineVerifier.cpp index aae0958..a36c13f 100644 --- a/llvm/lib/CodeGen/MachineVerifier.cpp +++ b/llvm/lib/CodeGen/MachineVerifier.cpp @@ -1187,6 +1187,17 @@ void MachineVerifier::visitMachineInstrBefore(const MachineInstr *MI) { } break; } + case TargetOpcode::G_ICMP: + case TargetOpcode::G_FCMP: { + LLT DstTy = MRI->getType(MI->getOperand(0).getReg()); + LLT SrcTy = MRI->getType(MI->getOperand(2).getReg()); + + if ((DstTy.isVector() != SrcTy.isVector()) || + (DstTy.isVector() && DstTy.getNumElements() != SrcTy.getNumElements())) + report("Generic vector icmp/fcmp must preserve number of lanes", MI); + + break; + } case TargetOpcode::STATEPOINT: if (!MI->getOperand(StatepointOpers::IDPos).isImm() || !MI->getOperand(StatepointOpers::NBytesPos).isImm() || |