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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2021-02-27 14:41:45 -0500 |
|---|---|---|
| committer | maekawatoshiki <konndennsa@gmail.com> | 2021-05-21 23:57:38 +0900 |
| commit | 7521fcd2698740cbb81495de7dfe1a3a4b39b21b (patch) | |
| tree | cb2cdd1f77525b645ac226a6021c4f0b77c82ed7 /llvm/lib/CodeGen/RegAllocBase.cpp | |
| parent | 8dab25954b0acb53731c4aa73e9a7f4f98263030 (diff) | |
| download | llvm-7521fcd2698740cbb81495de7dfe1a3a4b39b21b.zip llvm-7521fcd2698740cbb81495de7dfe1a3a4b39b21b.tar.gz llvm-7521fcd2698740cbb81495de7dfe1a3a4b39b21b.tar.bz2 | |
AMDGPU/GlobalISel: Add subtarget to a test
SelectionDAG forces us to have a weird ABI for 16-bit values without
legal 16-bit operations, but currently GlobalISel bypasses this and
sometimes ends up using the gfx8+ ABI in some contexts. Make sure
we're testing the normal ABI to avoid a test change in a future patch.
Diffstat (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/RegAllocBase.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp index 39787f2..a2e9f21 100644 --- a/llvm/lib/CodeGen/RegAllocBase.cpp +++ b/llvm/lib/CodeGen/RegAllocBase.cpp @@ -35,7 +35,7 @@ using namespace llvm; #define DEBUG_TYPE "regalloc" -STATISTIC(NumNewQueued , "Number of new live ranges queued"); +STATISTIC(NumNewQueued, "Number of new live ranges queued"); // Temporary verification option until we can put verification inside // MachineVerifier. @@ -54,8 +54,7 @@ bool RegAllocBase::VerifyEnabled = false; // Pin the vtable to this file. void RegAllocBase::anchor() {} -void RegAllocBase::init(VirtRegMap &vrm, - LiveIntervals &lis, +void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat) { TRI = &vrm.getTargetRegInfo(); MRI = &vrm.getRegInfo(); |