From 7521fcd2698740cbb81495de7dfe1a3a4b39b21b Mon Sep 17 00:00:00 2001 From: Matt Arsenault Date: Sat, 27 Feb 2021 14:41:45 -0500 Subject: AMDGPU/GlobalISel: Add subtarget to a test SelectionDAG forces us to have a weird ABI for 16-bit values without legal 16-bit operations, but currently GlobalISel bypasses this and sometimes ends up using the gfx8+ ABI in some contexts. Make sure we're testing the normal ABI to avoid a test change in a future patch. --- llvm/lib/CodeGen/RegAllocBase.cpp | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'llvm/lib/CodeGen/RegAllocBase.cpp') diff --git a/llvm/lib/CodeGen/RegAllocBase.cpp b/llvm/lib/CodeGen/RegAllocBase.cpp index 39787f2..a2e9f21 100644 --- a/llvm/lib/CodeGen/RegAllocBase.cpp +++ b/llvm/lib/CodeGen/RegAllocBase.cpp @@ -35,7 +35,7 @@ using namespace llvm; #define DEBUG_TYPE "regalloc" -STATISTIC(NumNewQueued , "Number of new live ranges queued"); +STATISTIC(NumNewQueued, "Number of new live ranges queued"); // Temporary verification option until we can put verification inside // MachineVerifier. @@ -54,8 +54,7 @@ bool RegAllocBase::VerifyEnabled = false; // Pin the vtable to this file. void RegAllocBase::anchor() {} -void RegAllocBase::init(VirtRegMap &vrm, - LiveIntervals &lis, +void RegAllocBase::init(VirtRegMap &vrm, LiveIntervals &lis, LiveRegMatrix &mat) { TRI = &vrm.getTargetRegInfo(); MRI = &vrm.getRegInfo(); -- cgit v1.1