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| author | Princeton Ferro <pferro@nvidia.com> | 2025-07-18 14:11:31 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-07-18 14:11:31 -0700 |
| commit | d63ab5467dcae0492e2f4def336ddbb73ce10dc5 (patch) | |
| tree | 5be859caaee00f136ac6712fe6527c1f200aa09c /llvm/lib/CodeGen/MachineScheduler.cpp | |
| parent | 3be44e25804e776d3ff071740a60ae6d2f3ef4a7 (diff) | |
| download | llvm-d63ab5467dcae0492e2f4def336ddbb73ce10dc5.zip llvm-d63ab5467dcae0492e2f4def336ddbb73ce10dc5.tar.gz llvm-d63ab5467dcae0492e2f4def336ddbb73ce10dc5.tar.bz2 | |
[NVPTX] don't erase CopyToRegs when folding movs into loads (#149393)
We may still need to keep CopyToReg even after folding uses into vector
loads, since the original register may be used in other blocks.
Partially reverts 1fdbe6984976d9e85ab3b1a93e8de434a85c5646
Diffstat (limited to 'llvm/lib/CodeGen/MachineScheduler.cpp')
0 files changed, 0 insertions, 0 deletions