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author | paperchalice <liujunchang97@outlook.com> | 2024-07-10 19:34:48 +0800 |
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committer | GitHub <noreply@github.com> | 2024-07-10 19:34:48 +0800 |
commit | abde52aa667118d18e9551ab87a15b95c267b3b6 (patch) | |
tree | 1bcef533428ab18c5add00ba7ed5c0d4e82d2e95 /llvm/lib/CodeGen/MachinePipeliner.cpp | |
parent | 3e06392c7db0eacfca94a176d430d9988b3ffbd6 (diff) | |
download | llvm-abde52aa667118d18e9551ab87a15b95c267b3b6.zip llvm-abde52aa667118d18e9551ab87a15b95c267b3b6.tar.gz llvm-abde52aa667118d18e9551ab87a15b95c267b3b6.tar.bz2 |
[CodeGen][NewPM] Port `LiveIntervals` to new pass manager (#98118)
- Add `LiveIntervalsAnalysis`.
- Add `LiveIntervalsPrinterPass`.
- Use `LiveIntervalsWrapperPass` in legacy pass manager.
- Use `std::unique_ptr` instead of raw pointer for `LICalc`, so
destructor and default move constructor can handle it correctly.
This would be the last analysis required by `PHIElimination`.
Diffstat (limited to 'llvm/lib/CodeGen/MachinePipeliner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachinePipeliner.cpp | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index 4460f1f..2488f81f 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -236,7 +236,7 @@ INITIALIZE_PASS_BEGIN(MachinePipeliner, DEBUG_TYPE, INITIALIZE_PASS_DEPENDENCY(AAResultsWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineLoopInfoWrapperPass) INITIALIZE_PASS_DEPENDENCY(MachineDominatorTreeWrapperPass) -INITIALIZE_PASS_DEPENDENCY(LiveIntervals) +INITIALIZE_PASS_DEPENDENCY(LiveIntervalsWrapperPass) INITIALIZE_PASS_END(MachinePipeliner, DEBUG_TYPE, "Modulo Software Pipelining", false, false) @@ -437,7 +437,8 @@ bool MachinePipeliner::canPipelineLoop(MachineLoop &L) { void MachinePipeliner::preprocessPhiNodes(MachineBasicBlock &B) { MachineRegisterInfo &MRI = MF->getRegInfo(); - SlotIndexes &Slots = *getAnalysis<LiveIntervals>().getSlotIndexes(); + SlotIndexes &Slots = + *getAnalysis<LiveIntervalsWrapperPass>().getLIS().getSlotIndexes(); for (MachineInstr &PI : B.phis()) { MachineOperand &DefOp = PI.getOperand(0); @@ -472,8 +473,9 @@ void MachinePipeliner::preprocessPhiNodes(MachineBasicBlock &B) { bool MachinePipeliner::swingModuloScheduler(MachineLoop &L) { assert(L.getBlocks().size() == 1 && "SMS works on single blocks only."); - SwingSchedulerDAG SMS(*this, L, getAnalysis<LiveIntervals>(), RegClassInfo, - II_setByPragma, LI.LoopPipelinerInfo.get()); + SwingSchedulerDAG SMS( + *this, L, getAnalysis<LiveIntervalsWrapperPass>().getLIS(), RegClassInfo, + II_setByPragma, LI.LoopPipelinerInfo.get()); MachineBasicBlock *MBB = L.getHeader(); // The kernel should not include any terminator instructions. These @@ -501,7 +503,7 @@ void MachinePipeliner::getAnalysisUsage(AnalysisUsage &AU) const { AU.addPreserved<AAResultsWrapperPass>(); AU.addRequired<MachineLoopInfoWrapperPass>(); AU.addRequired<MachineDominatorTreeWrapperPass>(); - AU.addRequired<LiveIntervals>(); + AU.addRequired<LiveIntervalsWrapperPass>(); AU.addRequired<MachineOptimizationRemarkEmitterPass>(); AU.addRequired<TargetPassConfig>(); MachineFunctionPass::getAnalysisUsage(AU); @@ -514,7 +516,7 @@ bool MachinePipeliner::runWindowScheduler(MachineLoop &L) { Context.MDT = MDT; Context.PassConfig = &getAnalysis<TargetPassConfig>(); Context.AA = &getAnalysis<AAResultsWrapperPass>().getAAResults(); - Context.LIS = &getAnalysis<LiveIntervals>(); + Context.LIS = &getAnalysis<LiveIntervalsWrapperPass>().getLIS(); Context.RegClassInfo->runOnMachineFunction(*MF); WindowScheduler WS(&Context, L); return WS.run(); |