diff options
author | David Green <david.green@arm.com> | 2024-12-16 08:48:57 +0000 |
---|---|---|
committer | David Green <david.green@arm.com> | 2024-12-16 08:48:57 +0000 |
commit | a35db2880a488b62a16f269972ad885fd58033f7 (patch) | |
tree | df8fe6804c79001b1bb8f2642df346d138afac45 /llvm/lib/CodeGen/MachinePipeliner.cpp | |
parent | b4c1f0cc492f1597397dcf0b06b816fa0a2135f1 (diff) | |
download | llvm-a35db2880a488b62a16f269972ad885fd58033f7.zip llvm-a35db2880a488b62a16f269972ad885fd58033f7.tar.gz llvm-a35db2880a488b62a16f269972ad885fd58033f7.tar.bz2 |
[NFC] Remove some unnecessary semicolons
All inside LLVM_DEBUG, some of which have been cleaned up by adding block
scopes to allow them to format more nicely.
Diffstat (limited to 'llvm/lib/CodeGen/MachinePipeliner.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachinePipeliner.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/MachinePipeliner.cpp b/llvm/lib/CodeGen/MachinePipeliner.cpp index 7a10bd3..f4b5f7c 100644 --- a/llvm/lib/CodeGen/MachinePipeliner.cpp +++ b/llvm/lib/CodeGen/MachinePipeliner.cpp @@ -3336,15 +3336,15 @@ void SwingSchedulerDAG::checkValidNodeOrder(const NodeSetType &Circuits) const { bool InCircuit = llvm::any_of( Circuits, [SU](const NodeSet &Circuit) { return Circuit.count(SU); }); if (InCircuit) - LLVM_DEBUG(dbgs() << "In a circuit, predecessor ";); + LLVM_DEBUG(dbgs() << "In a circuit, predecessor "); else { Valid = false; NumNodeOrderIssues++; - LLVM_DEBUG(dbgs() << "Predecessor ";); + LLVM_DEBUG(dbgs() << "Predecessor "); } LLVM_DEBUG(dbgs() << Pred->NodeNum << " and successor " << Succ->NodeNum << " are scheduled before node " << SU->NodeNum - << "\n";); + << "\n"); } } @@ -3573,7 +3573,7 @@ bool ResourceManager::canReserveResources(SUnit &SU, int Cycle) { bool Result = !isOverbooked(); unreserveResources(SCDesc, Cycle); - LLVM_DEBUG(if (SwpDebugResource) dbgs() << "return " << Result << "\n\n";); + LLVM_DEBUG(if (SwpDebugResource) dbgs() << "return " << Result << "\n\n"); return Result; } |