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| author | Sam Parker <sam.parker@arm.com> | 2018-09-28 10:18:02 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2018-09-28 10:18:02 +0000 |
| commit | d476cd304bc4a54e504ff66504928a0e40aca997 (patch) | |
| tree | 7b69fb5936a06fdde5e34c4f6d5caf0701aa0b39 /llvm/lib/CodeGen/MachineOperand.cpp | |
| parent | 0694c159f74da4ecf9363ace149cc8f95d08d576 (diff) | |
| download | llvm-d476cd304bc4a54e504ff66504928a0e40aca997.zip llvm-d476cd304bc4a54e504ff66504928a0e40aca997.tar.gz llvm-d476cd304bc4a54e504ff66504928a0e40aca997.tar.bz2 | |
[ARM] Prevent DSP and SIM32 being set for v6m
My previous change (rL340911) set the two features for architectures
>= 6, which wrongly includes v6m. Now set to >= 6 and not Cortex-M.
Differential Revision: https://reviews.llvm.org/D52644
llvm-svn: 343309
Diffstat (limited to 'llvm/lib/CodeGen/MachineOperand.cpp')
0 files changed, 0 insertions, 0 deletions