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author | Brandon Wu <brandon.wu@sifive.com> | 2024-10-30 09:27:35 +0800 |
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committer | GitHub <noreply@github.com> | 2024-10-30 09:27:35 +0800 |
commit | 8800b739bfe3ddc0bd32c158a016ffd0eee1e352 (patch) | |
tree | 5a03c4c5ff34fa73b8a0013068d7d6701d71bf8d /llvm/lib/CodeGen/MachineModuleSlotTracker.cpp | |
parent | d9268289c3858c4ae877ff3bb90f28c160a977c8 (diff) | |
download | llvm-8800b739bfe3ddc0bd32c158a016ffd0eee1e352.zip llvm-8800b739bfe3ddc0bd32c158a016ffd0eee1e352.tar.gz llvm-8800b739bfe3ddc0bd32c158a016ffd0eee1e352.tar.bz2 |
[RISCV] Refactor FP, SP and RA in RISCVFrameLowering.cpp. NFC (#113818)
Those registers are too fragmented in terms of usage, some are hard
coded and some are retrieved by calling function. Also some have
comments for alias name, some don't.
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleSlotTracker.cpp')
0 files changed, 0 insertions, 0 deletions