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authorlialan <xunli@amd.com>2024-10-29 23:04:48 -0400
committerGitHub <noreply@github.com>2024-10-29 20:04:48 -0700
commit2c313259c65317f097d57ab4c6684b25db98f2e4 (patch)
tree3c76c51eb0aa77b8803a710c16862346e9a2c950 /llvm/lib/CodeGen/MachineModuleSlotTracker.cpp
parentc62130f7b35412e7caadf5fd9547f21a736c4543 (diff)
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[MLIR] VectorEmulateNarrowType to support loading of unaligned vectors (#113411)
Previously, the pass only supported emulation of loading vector sizes that are multiples of the emulated data type. This patch expands its support for emulating sizes that are not multiples of byte sizes. In such cases, the element values are packed back-to-back to preserve memory space. To give a concrete example: if an input has type `memref<3x3xi2>`, it is actually occupying 3 bytes in memory, with the first 18 bits storing the values and the last 6 bits as padding. The slice of `vector<3xi2>` at index `[2, 0]` is stored in memory from bit 12 to bit 18. To properly load the elements from bit 12 to bit 18 from memory, first load byte 2 and byte 3, and convert it to a vector of `i2` type; then extract bits 4 to 10 (element index 2-5) to form a `vector<3xi2>`. A limitation of this patch is that the linearized index of the unaligned vector has to be known at compile time. Extra code needs to be emitted to handle it if the condition does not hold. The following ops are updated: * `vector::LoadOp` * `vector::TransferReadOp` * `vector::MaskedLoadOp`
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