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| author | Craig Topper <craig.topper@sifive.com> | 2024-11-17 11:25:33 -0800 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-11-17 11:39:59 -0800 |
| commit | eed9af95e6133e94449c7be585bc3b5fad8ad769 (patch) | |
| tree | eea474811a25882235c3a5fd02ea400437ef6e92 /llvm/lib/CodeGen/MachineModuleInfo.cpp | |
| parent | a8538b9138574142b9338ad0fce0f8ba1065fcbc (diff) | |
| download | llvm-eed9af95e6133e94449c7be585bc3b5fad8ad769.zip llvm-eed9af95e6133e94449c7be585bc3b5fad8ad769.tar.gz llvm-eed9af95e6133e94449c7be585bc3b5fad8ad769.tar.bz2 | |
[RISCV][GISel] Make loads/stores with s16 register type and s16 memory type legal.
This is needed to support Zfh loads/stores.
This requires supporting extends from sext/zext form i16 and s16
G_FREEZE to support the current tests we have.
Diffstat (limited to 'llvm/lib/CodeGen/MachineModuleInfo.cpp')
0 files changed, 0 insertions, 0 deletions