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author | Kazu Hirata <kazu@google.com> | 2025-05-05 10:08:49 -0700 |
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committer | GitHub <noreply@github.com> | 2025-05-05 10:08:49 -0700 |
commit | cdc9a4b5f81a2bc41b6452585a77f681deb4c53c (patch) | |
tree | 521c79ce3df15bcfbcefa585ced9c7adaa081558 /llvm/lib/CodeGen/MachineCSE.cpp | |
parent | f81193ddfdae8fbdc6e2b4a40c5b8a11c9327939 (diff) | |
download | llvm-cdc9a4b5f81a2bc41b6452585a77f681deb4c53c.zip llvm-cdc9a4b5f81a2bc41b6452585a77f681deb4c53c.tar.gz llvm-cdc9a4b5f81a2bc41b6452585a77f681deb4c53c.tar.bz2 |
[CodeGen] Use range-based for loops (NFC) (#138488)
This is a reland of #138434 except that:
- the bits for llvm/lib/CodeGen/RenameIndependentSubregs.cpp
have been dropped because they caused a test failure under asan, and
- the bits for llvm/lib/CodeGen/SelectionDAG/ScheduleDAGFast.cpp have
been improved with structured bindings.
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
-rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 10 |
1 files changed, 4 insertions, 6 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index 6d14509..bebdead 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -325,9 +325,8 @@ bool MachineCSEImpl::hasLivePhysRegDefUses(const MachineInstr *MI, } // Finally, add all defs to PhysRefs as well. - for (unsigned i = 0, e = PhysDefs.size(); i != e; ++i) - for (MCRegAliasIterator AI(PhysDefs[i].second, TRI, true); AI.isValid(); - ++AI) + for (const auto &Def : PhysDefs) + for (MCRegAliasIterator AI(Def.second, TRI, true); AI.isValid(); ++AI) PhysRefs.insert(*AI); return !PhysRefs.empty(); @@ -348,9 +347,8 @@ bool MachineCSEImpl::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI, if (MBB->pred_size() != 1 || *MBB->pred_begin() != CSMBB) return false; - for (unsigned i = 0, e = PhysDefs.size(); i != e; ++i) { - if (MRI->isAllocatable(PhysDefs[i].second) || - MRI->isReserved(PhysDefs[i].second)) + for (const auto &PhysDef : PhysDefs) { + if (MRI->isAllocatable(PhysDef.second) || MRI->isReserved(PhysDef.second)) // Avoid extending live range of physical registers if they are //allocatable or reserved. return false; |