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| author | Craig Topper <craig.topper@sifive.com> | 2022-08-31 15:05:35 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2022-08-31 15:39:41 -0700 |
| commit | 77dbc5200bb5bf8fbf42d6f183599c2ae9575f29 (patch) | |
| tree | 618dd066d12ef260880f91ab6e3fa0bf1df0bf35 /llvm/lib/CodeGen/MachineCSE.cpp | |
| parent | 53d1ae88f8b52c73654d08f72f03e63c0352ac00 (diff) | |
| download | llvm-77dbc5200bb5bf8fbf42d6f183599c2ae9575f29.zip llvm-77dbc5200bb5bf8fbf42d6f183599c2ae9575f29.tar.gz llvm-77dbc5200bb5bf8fbf42d6f183599c2ae9575f29.tar.bz2 | |
[MachineCSE] Use TargetInstrInfo::isAsCheapAsAMove in isPRECandidate.
Some targets like RISC-V require operands to be inspected to
determine if an instruction is similar to a move.
Spotted while investigating code differences between using an ADDI
vs an ADDIW. RISC-V has the isAsCheapAsAMove flag for ADDI, but
the TII hook checks the immediate is 0 or the register is X0. ADDIW
is never generated with X0 or with an immediate of 0 so it doesn't
have the isAsCheapAsAMove flag.
I don't know enough about the PRE code to write a test for this yet.
Reviewed By: reames
Differential Revision: https://reviews.llvm.org/D132981
Diffstat (limited to 'llvm/lib/CodeGen/MachineCSE.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/MachineCSE.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/CodeGen/MachineCSE.cpp b/llvm/lib/CodeGen/MachineCSE.cpp index c6756b1..da2fd66 100644 --- a/llvm/lib/CodeGen/MachineCSE.cpp +++ b/llvm/lib/CodeGen/MachineCSE.cpp @@ -789,7 +789,7 @@ bool MachineCSE::isPRECandidate(MachineInstr *MI) { if (!isCSECandidate(MI) || MI->isNotDuplicable() || MI->mayLoad() || - MI->isAsCheapAsAMove() || + TII->isAsCheapAsAMove(*MI) || MI->getNumDefs() != 1 || MI->getNumExplicitDefs() != 1) return false; |