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| author | Min-Yih Hsu <min.hsu@sifive.com> | 2024-12-10 17:57:04 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-12-10 17:57:04 -0800 |
| commit | ea76b2d8d83d6885bf5707832cbc4b7655e21b08 (patch) | |
| tree | 480b73414f57090dbe593c926285f2ca6fe3eeb2 /llvm/lib/CodeGen/MachineBasicBlock.cpp | |
| parent | 7987f478be6d9550a6b897536139b4ca82ff03ec (diff) | |
| download | llvm-ea76b2d8d83d6885bf5707832cbc4b7655e21b08.zip llvm-ea76b2d8d83d6885bf5707832cbc4b7655e21b08.tar.gz llvm-ea76b2d8d83d6885bf5707832cbc4b7655e21b08.tar.bz2 | |
[XRay][RISCV] RISCV support for XRay (#117368)
Add RISC-V support for XRay. The RV64 implementation has been tested in
both QEMU and in our hardware environment.
Currently this requires D and C extensions, but since both RV64GC and
RVA22/RVA23 are becoming mainstream, I don't think this requirement will
be a big problem.
Based on the previous work by @a-poduval :
https://reviews.llvm.org/D117929
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Co-authored-by: Ashwin Poduval <ashwin.poduval@gmail.com>
Diffstat (limited to 'llvm/lib/CodeGen/MachineBasicBlock.cpp')
0 files changed, 0 insertions, 0 deletions