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| author | Jack Andersen <jackoalan@gmail.com> | 2021-12-05 14:55:20 -0500 |
|---|---|---|
| committer | Jack Andersen <jackoalan@gmail.com> | 2021-12-05 15:55:59 -0500 |
| commit | f108c7f59dfae5fafbb00fbdef7a0cd31826dcfc (patch) | |
| tree | aa88062fe53569e594ed7e536ccb3f80736c5f80 /llvm/lib/CodeGen/LiveDebugVariables.cpp | |
| parent | 1b44364714981017302f182583a43fda4d28e0eb (diff) | |
| download | llvm-f108c7f59dfae5fafbb00fbdef7a0cd31826dcfc.zip llvm-f108c7f59dfae5fafbb00fbdef7a0cd31826dcfc.tar.gz llvm-f108c7f59dfae5fafbb00fbdef7a0cd31826dcfc.tar.bz2 | |
[GlobalISel] Allow DBG_VALUE to use undefined vregs before LiveDebugValues.
Expanding on D109750.
Since `DBG_VALUE` instructions have final register validity determined in
`LDVImpl::handleDebugValue`, there is no apparent reason to immediately prune
unused register operands as their defs are erased. Consequently, this renders
`MachineInstr::eraseFromParentAndMarkDBGValuesForRemoval` moot; gaining a
substantial performance improvement.
The only necessary changes involve making relevant passes consider invalid
DBG_VALUE vregs uses as valid.
Reviewed By: MatzeB
Differential Revision: https://reviews.llvm.org/D112852
Diffstat (limited to 'llvm/lib/CodeGen/LiveDebugVariables.cpp')
| -rw-r--r-- | llvm/lib/CodeGen/LiveDebugVariables.cpp | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/llvm/lib/CodeGen/LiveDebugVariables.cpp b/llvm/lib/CodeGen/LiveDebugVariables.cpp index 2272a35..e6661e5 100644 --- a/llvm/lib/CodeGen/LiveDebugVariables.cpp +++ b/llvm/lib/CodeGen/LiveDebugVariables.cpp @@ -822,9 +822,6 @@ bool LDVImpl::handleDebugValue(MachineInstr &MI, SlotIndex Idx) { // register that hasn't been defined yet. If we do not remove those here, then // the re-insertion of the DBG_VALUE instruction after register allocation // will be incorrect. - // TODO: If earlier passes are corrected to generate sane debug information - // (and if the machine verifier is improved to catch this), then these checks - // could be removed or replaced by asserts. bool Discard = false; for (const MachineOperand &Op : MI.debug_operands()) { if (Op.isReg() && Register::isVirtualRegister(Op.getReg())) { |