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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2024-04-06 15:27:45 -0400 |
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committer | GitHub <noreply@github.com> | 2024-04-06 15:27:45 -0400 |
commit | 4cb110a84f587d3c65b85d79ab6fc8aa5489fb86 (patch) | |
tree | df02e1df31b98f5b2a241401d465c5ecae304a73 /llvm/lib/CodeGen/DFAPacketizer.cpp | |
parent | bd589f5c7a079d8829fcf994b746634eaaea24ff (diff) | |
download | llvm-4cb110a84f587d3c65b85d79ab6fc8aa5489fb86.zip llvm-4cb110a84f587d3c65b85d79ab6fc8aa5489fb86.tar.gz llvm-4cb110a84f587d3c65b85d79ab6fc8aa5489fb86.tar.bz2 |
[RFC] IR: Support atomicrmw FP ops with vector types (#86796)
Allow using atomicrmw fadd, fsub, fmin, and fmax with vectors of
floating-point type. AMDGPU supports atomic fadd for <2 x half> and <2 x
bfloat> on some targets and address spaces.
Note this only supports the proper floating-point operations; float
vector typed xchg is still not supported. cmpxchg still only supports
integers, so this inserts bitcasts for the loop expansion.
I have support for fp vector typed xchg, and vector of int/ptr
separately implemented but I don't have an immediate need for those
beyond feature consistency.
Diffstat (limited to 'llvm/lib/CodeGen/DFAPacketizer.cpp')
0 files changed, 0 insertions, 0 deletions