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| author | Aart Bik <ajcbik@google.com> | 2024-05-13 14:02:29 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-05-13 14:02:29 -0700 |
| commit | 70e227a404e51f9248c7ad5d79953805b2afacb4 (patch) | |
| tree | d1b01f03ca37ef876b40a1fa07f5dd74d7f16c56 /llvm/lib/Bitcode | |
| parent | ef9090fcb5b8d1c9f56c11d567987ffa1000a486 (diff) | |
| download | llvm-70e227a404e51f9248c7ad5d79953805b2afacb4.zip llvm-70e227a404e51f9248c7ad5d79953805b2afacb4.tar.gz llvm-70e227a404e51f9248c7ad5d79953805b2afacb4.tar.bz2 | |
[mlir][sparse] recognize ReLu operation during sparsification (#92016)
This is a proof of concept recognition of the most basic forms of ReLu
operations, used to show-case sparsification of end-to-end PyTorch
models. In the long run, we must avoid lowering such constructs too
early (with this need for raising them back).
See discussion at
https://discourse.llvm.org/t/min-max-abs-relu-recognition-starter-project/78918
Diffstat (limited to 'llvm/lib/Bitcode')
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